configs: socfpga: soc64: agilex5: Enable QSPI boot with UBI / UBIFS

Add the required configuration in the U-Boot env to enable Linux QSPI
boot with UBI / UBIFS.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>

diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig
index 2b71cca..5b3e812 100644 (file)
--- a/configs/socfpga_agilex5_defconfig
+++ b/configs/socfpga_agilex5_defconfig
@@ -37,6 +37,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_SPL_CACHE=y
 CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_SPL_MTD=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000
 CONFIG_SPL_ATF=y

diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index b7ee1db..5ed1767 100644 (file)
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0
  *
  * Copyright (C) 2017-2024 Intel Corporation <www.intel.com>
+ * Copyright (C) 2025 Altera Corporation <www.altera.com>
  *
  */
 
@@ -56,6 +57,11 @@
 
 #define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
        "bootcmd_qspi=ubi detach; sf probe && " \
+       "setenv mtdids 'nor0=nor0,nand0=nand.0' && " \
+       "setenv mtdparts 'mtdparts=nor0:66m(u-boot),190m(root); " \
+       "nand.0:2m(nand_uboot),500m(nand_root)' && " \
+       "env select UBI; saveenv && " \
+       "ubi part root && " \
        "if ubi part root && ubi readvol ${scriptaddr} script; " \
        "then echo QSPI: Running script from UBIFS; " \
        "elif sf read ${scriptaddr} ${qspiscriptaddr} ${scriptsize}; " \