MIPS: Fix cpu_has_mips_r2_exec_hazard.

Returns a non-zero value if the current processor implementation requires
an IHB instruction to deal with an instruction hazard as per MIPS R2
architecture specification, zero otherwise.

For a discussion, see http://patchwork.linux-mips.org/patch/9539/.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --cc arch/mips/include/asm/cpu-features.h
Simple merge