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drm/nouveau/fifo/nvc0-: use interrupt 31 as an event trigger
author
Ben Skeggs
<bskeggs@redhat.com>
Thu, 31 Jan 2013 03:51:20 +0000
(13:51 +1000)
committer
Ben Skeggs
<bskeggs@redhat.com>
Wed, 20 Feb 2013 06:00:46 +0000
(16:00 +1000)
Generated if you try and use fifo method 0x20 on any subchannel, appears
that it can be safely masked off without stalling the whole GPU.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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git.openpandora.org / pandora-kernel.git / commitdiff