riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B
authorYanhong Wang <yanhong.wang@starfivetech.com>
Thu, 15 Jun 2023 09:36:45 +0000 (17:36 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Wed, 12 Jul 2023 05:21:40 +0000 (13:21 +0800)
The difference between 1.2A and 1.3B is dynamically configured according
to the PCB version, and there is no difference on the board device tree,
so the same DT file can be used.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/dts/Makefile
arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi [moved from arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi with 66% similarity]
arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts [deleted file]
arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi [deleted file]
arch/riscv/dts/jh7110-starfive-visionfive-2.dts [moved from arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts with 65% similarity]
configs/starfive_visionfive2_defconfig

index 1d61eb8..d9c050e 100644 (file)
@@ -7,8 +7,7 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
 dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
-dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2-v1.3b.dtb
-dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2-v1.2a.dtb
+dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb
 include $(srctree)/scripts/Makefile.dts
 
 targets += $(dtb-y)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0 OR MIT
 /*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
  */
 
 #include "binman.dtsi"
        };
 };
 
+&binman {
+       itb {
+               fit {
+                       images {
+                               fdt-1 {
+                                       description = "NAME";
+                                       load = <0x40400000>;
+                                       compression = "none";
+
+                                       uboot_fdt_blob: blob-ext {
+                                               filename = "u-boot.dtb";
+                                       };
+                               };
+                       };
+
+                       configurations {
+                               conf-1 {
+                                       fdt = "fdt-1";
+                               };
+                       };
+               };
+       };
+};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts
deleted file mode 100644 (file)
index b9d26d7..0000000
+++ /dev/null
@@ -1,12 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
- */
-
-/dts-v1/;
-#include "jh7110-starfive-visionfive-2.dtsi"
-
-/ {
-       model = "StarFive VisionFive 2 v1.2A";
-       compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
-};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
deleted file mode 100644 (file)
index 3c322c5..0000000
+++ /dev/null
@@ -1,69 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-/*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
- */
-
-#include "binman.dtsi"
-#include "jh7110-u-boot.dtsi"
-/ {
-       chosen {
-               bootph-pre-ram;
-       };
-
-       firmware {
-               spi0 = &qspi;
-               bootph-pre-ram;
-       };
-
-       config {
-               bootph-pre-ram;
-               u-boot,spl-payload-offset = <0x100000>;
-       };
-
-       memory@40000000 {
-               bootph-pre-ram;
-       };
-};
-
-&uart0 {
-       bootph-pre-ram;
-};
-
-&mmc0 {
-       bootph-pre-ram;
-};
-
-&mmc1 {
-       bootph-pre-ram;
-};
-
-&qspi {
-       bootph-pre-ram;
-
-       nor-flash@0 {
-               bootph-pre-ram;
-       };
-};
-
-&sysgpio {
-       bootph-pre-ram;
-};
-
-&mmc0_pins {
-       bootph-pre-ram;
-       mmc0-pins-rest {
-               bootph-pre-ram;
-       };
-};
-
-&mmc1_pins {
-       bootph-pre-ram;
-       mmc1-pins0 {
-               bootph-pre-ram;
-       };
-
-       mmc1-pins1 {
-               bootph-pre-ram;
-       };
-};
-
@@ -1,12 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0 OR MIT
 /*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
  */
 
 /dts-v1/;
 #include "jh7110-starfive-visionfive-2.dtsi"
 
 / {
-       model = "StarFive VisionFive 2 v1.3B";
        compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
 };
index ffbc4b9..566d2c3 100644 (file)
@@ -7,7 +7,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000000
 CONFIG_SF_DEFAULT_SPEED=100000000
 CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2-v1.3b"
+CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2"
 CONFIG_SPL_TEXT_BASE=0x8000000
 CONFIG_SYS_PROMPT="StarFive #"
 CONFIG_OF_LIBFDT_OVERLAY=y
@@ -31,7 +31,7 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 debug rootwait earlycon=sbi"
 CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
-CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"
+CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_SPL_MAX_SIZE=0x40000