STK ADB4000 is a development board with a SAM9G45 SODIMM CPU module.
These patches are from the manufacturer (In-Circuit).
Resulting kernel boots on the board.
Signed-off-by: Leon Woestenberg <leon@sidebranch.com>
--- /dev/null
+#@TYPE: Machine
+#@Name: In-Circuit STK ADB4000 Starter Kit
+#@DESCRIPTION: Machine configuration for the STK ADB4000 board with AT91SAM9G45 processor
+
+include conf/machine/include/at91-2.6.30.inc
+include conf/machine/include/at91-lcd.inc
+
+PREFERRED_VERSION_linux = "2.6.33"
+
+# Has linux config file in OpenEmbedded
+#
+LINUX26_DEFCONFIG = "at91sam9g45ek_defconfig"
+
+# Supported u-boot machines
+#UBOOT_MACHINE = "at91sam9m10g45ek_dataflash_cs0_config"
+UBOOT_MACHINE = "icnova_arm9sodimm_config"
+UBOOT_ENTRYPOINT = "0x70008000"
+
+AT91BOOTSTRAP_BOARD = "at91sam9g45df at91sam9g45ek at91sam9g45nf"
+
+MACHINE_FEATURES += "usbhost"
+
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.33
+# Thu Jan 27 17:47:10 2011
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+CONFIG_BLK_DEV_BSG=y
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+CONFIG_ARCH_AT91=y
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_U8500 is not set
+CONFIG_HAVE_AT91_USART3=y
+
+#
+# Atmel AT91 System-on-Chip
+#
+# CONFIG_ARCH_AT91RM9200 is not set
+# CONFIG_ARCH_AT91SAM9260 is not set
+# CONFIG_ARCH_AT91SAM9261 is not set
+# CONFIG_ARCH_AT91SAM9G10 is not set
+# CONFIG_ARCH_AT91SAM9263 is not set
+# CONFIG_ARCH_AT91SAM9RL is not set
+# CONFIG_ARCH_AT91SAM9G20 is not set
+CONFIG_ARCH_AT91SAM9G45=y
+# CONFIG_ARCH_AT91CAP9 is not set
+# CONFIG_ARCH_AT91X40 is not set
+CONFIG_AT91_PMC_UNIT=y
+
+#
+# AT91SAM9G45 Board Type
+#
+# CONFIG_MACH_AT91SAM9G45EKES is not set
+# CONFIG_MACH_ICNOVA_ADB1000 is not set
+# CONFIG_MACH_ICNOVA_ADB1002 is not set
+# CONFIG_MACH_ICNOVA_ADB1004 is not set
+# CONFIG_MACH_ICNOVA_ADB3000 is not set
+CONFIG_MACH_ICNOVA_ADB4000=y
+
+#
+# AT91 Board Options
+#
+
+#
+# AT91 Feature Selections
+#
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+CONFIG_AT91_TIMER_HZ=100
+CONFIG_AT91_EARLY_DBGU=y
+# CONFIG_AT91_EARLY_USART0 is not set
+# CONFIG_AT91_EARLY_USART1 is not set
+# CONFIG_AT91_EARLY_USART2 is not set
+# CONFIG_AT91_EARLY_USART3 is not set
+# CONFIG_AT91_EARLY_USART4 is not set
+# CONFIG_AT91_EARLY_USART5 is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_LEDS=y
+CONFIG_LEDS_CPU=y
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=" debug "
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_CFG80211=m
+CONFIG_NL80211_TESTMODE=y
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CFG80211_DEFAULT_PS is not set
+# CONFIG_CFG80211_DEBUGFS is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=m
+CONFIG_LIB80211_DEBUG=y
+CONFIG_MAC80211=m
+CONFIG_MAC80211_RC_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
+# CONFIG_MAC80211_MESH is not set
+CONFIG_MAC80211_LEDS=y
+# CONFIG_MAC80211_DEBUGFS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+CONFIG_MTD_NAND_ATMEL=y
+# CONFIG_MTD_NAND_ATMEL_ECC_HW is not set
+CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
+# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ATMEL_PWM is not set
+# CONFIG_ATMEL_TCLIB is not set
+# CONFIG_ICS932S401 is not set
+CONFIG_ATMEL_SSC=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IWMC3200TOP is not set
+# CONFIG_SPI_COMM is not set
+# CONFIG_SUPERVISOR_ATOI is not set
+# CONFIG_FPGA_SRAM is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+CONFIG_DAVICOM_PHY=y
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+CONFIG_NATIONAL_PHY=y
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_MAC80211_HWSIM is not set
+CONFIG_ATH_COMMON=m
+# CONFIG_ATH_DEBUG is not set
+CONFIG_AR9170_USB=m
+CONFIG_AR9170_LEDS=y
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_IWM is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_P54_COMMON is not set
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800_LIB=m
+CONFIG_RT2X00_LIB_USB=m
+CONFIG_RT2X00_LIB=m
+CONFIG_RT2X00_LIB_HT=y
+CONFIG_RT2X00_LIB_FIRMWARE=y
+CONFIG_RT2X00_LIB_CRYPTO=y
+CONFIG_RT2X00_LIB_LEDS=y
+# CONFIG_RT2X00_DEBUG is not set
+# CONFIG_WL12XX is not set
+# CONFIG_ZD1211RW is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+CONFIG_MOUSE_GPIO=y
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_ATMEL_TSADCC is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_SERIAL_ATMEL_PDC=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+CONFIG_I2C_GPIO=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+CONFIG_W1=y
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+CONFIG_W1_MASTER_GPIO=y
+
+#
+# 1-wire Slaves
+#
+CONFIG_W1_SLAVE_THERM=y
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+# CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_W1_SLAVE_BQ27000 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_MFD_88PM8607 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+CONFIG_HAVE_FB_ATMEL=y
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+# CONFIG_DRAGONRISE_FF is not set
+CONFIG_HID_EZKEY=y
+CONFIG_HID_KYE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_SMARTJOYPLUS=y
+# CONFIG_SMARTJOYPLUS_FF is not set
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+# CONFIG_THRUSTMASTER_FF is not set
+CONFIG_HID_ZEROPLUS=y
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=m
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+# CONFIG_USB_MASS_STORAGE is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+CONFIG_MMC_ATMELMCI=y
+CONFIG_MMC_ATMELMCI_DMA=y
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=m
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT91SAM9=m
+CONFIG_RTC_DRV_AT91SAM9_RTT=0
+CONFIG_RTC_DRV_AT91SAM9_GPBR=0
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_AT_HDMAC=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+CONFIG_NET_DMA=y
+CONFIG_ASYNC_TX_DMA=y
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_XATTR is not set
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=y
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
--- /dev/null
+From 8e60a6bc5c5fb74ed5d42a1f72d1847385b84a29 Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 11:35:36 +0100
+Subject: [PATCH 01/18] [misc/fpga_sram] added driver for a memory-connected FPGA
+
+The ICnova SAM9G45+XC700AN OEM has a FPGA connected to the
+ARM-Chip via the Memory Interface. This driver can be used to
+communicate on the ARM-Site.
+---
+ drivers/misc/Kconfig | 6 +
+ drivers/misc/Makefile | 1 +
+ drivers/misc/fpga_sram.c | 309 ++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 316 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/misc/fpga_sram.c
+
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index e3551d2..072c8a4 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -297,4 +297,10 @@ source "drivers/misc/eeprom/Kconfig"
+ source "drivers/misc/cb710/Kconfig"
+ source "drivers/misc/iwmc3200top/Kconfig"
+
++config FPGA_SRAM
++ tristate "FPGA-SRAM Interface"
++ help
++ Enable this if you need a SRAM-like interface somewhere in your
++ mapping.
++
+ endif # MISC_DEVICES
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index 049ff24..61fe337 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -26,5 +26,6 @@ obj-$(CONFIG_DS1682) += ds1682.o
+ obj-$(CONFIG_TI_DAC7512) += ti_dac7512.o
+ obj-$(CONFIG_C2PORT) += c2port/
+ obj-$(CONFIG_IWMC3200TOP) += iwmc3200top/
++obj-$(CONFIG_FPGA_SRAM) += fpga_sram.o
+ obj-y += eeprom/
+ obj-y += cb710/
+diff --git a/drivers/misc/fpga_sram.c b/drivers/misc/fpga_sram.c
+new file mode 100644
+index 0000000..ca98598
+--- /dev/null
++++ b/drivers/misc/fpga_sram.c
+@@ -0,0 +1,309 @@
++/*
++ * main.c -- the bare fpga_sram char module
++ *
++ * Based on scull
++ * Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet
++ * Copyright (C) 2001 O'Reilly & Associates
++ *
++ * The source code in this file can be freely used, adapted,
++ * and redistributed in source or binary form, so long as an
++ * acknowledgment appears in derived source files. The citation
++ * should list that the code comes from the book "Linux Device
++ * Drivers" by Alessandro Rubini and Jonathan Corbet, published
++ * by O'Reilly & Associates. No warranty is attached;
++ * we cannot take responsibility for errors or fitness for use.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/io.h>
++
++#include <linux/kernel.h> /* printk() */
++#include <linux/slab.h> /* kmalloc() */
++#include <linux/fs.h> /* everything... */
++#include <linux/errno.h> /* error codes */
++#include <linux/types.h> /* size_t */
++#include <linux/proc_fs.h>
++#include <linux/fcntl.h> /* O_ACCMODE */
++#include <linux/seq_file.h>
++#include <linux/cdev.h>
++
++#include <asm/system.h> /* cli(), *_flags */
++#include <asm/uaccess.h> /* copy_*_user */
++
++#define FPGA_MAJOR 0
++#define FPGA_NR_DEVS 1
++
++
++struct fpga_sram_drv;
++
++struct fpga_sram_dev {
++ struct fpga_sram_drv *drv;
++ struct cdev cdev;
++};
++
++struct fpga_sram_drv {
++ struct fpga_sram_dev *devices;
++ void *start;
++ int size;
++ int major;
++ int devs;
++};
++
++static int fpga_sram_major = FPGA_MAJOR;
++static int fpga_sram_minor = 0;
++static int fpga_sram_nr_devs = FPGA_NR_DEVS;
++
++module_param(fpga_sram_major, int, S_IRUGO);
++module_param(fpga_sram_minor, int, S_IRUGO);
++//module_param(fpga_sram_nr_devs, int, S_IRUGO);
++
++MODULE_AUTHOR("Benjamin Tietz");
++MODULE_LICENSE("Dual BSD/GPL");
++
++
++/*
++ * Open and close
++ */
++
++static int fpga_sram_open(struct inode *inode, struct file *filp)
++{
++ struct fpga_sram_dev *dev; /* device information */
++
++ dev = container_of(inode->i_cdev, struct fpga_sram_dev, cdev);
++
++ filp->private_data = dev; /* for other methods */
++
++ return 0; /* success */
++}
++
++static int fpga_sram_release(struct inode *inode, struct file *filp)
++{
++ return 0;
++}
++
++/*
++ * Data management: read and write
++ */
++
++static ssize_t fpga_sram_read(struct file *filp, char __user *buf,
++ size_t count, loff_t *f_pos)
++{
++ struct fpga_sram_dev *dev = filp->private_data;
++ ssize_t res;
++
++ if((count + *f_pos) > dev->drv->size) count = dev->drv->size - *f_pos;
++ if(( res = copy_to_user(buf, dev->drv->start + *f_pos, count)) < 0)
++ return res;
++ return count;
++}
++
++static ssize_t fpga_sram_write(struct file *filp, const char __user *buf,
++ size_t count, loff_t *f_pos)
++{
++ struct fpga_sram_dev *dev = filp->private_data;
++ ssize_t res;
++
++ if((count + *f_pos) > dev->drv->size) count = dev->drv->size - *f_pos;
++ if(( res = copy_from_user(dev->drv->start + *f_pos, buf, count)) < 0)
++ return res;
++ return count;
++}
++
++/*
++ * The "extended" operations -- only seek
++ */
++
++static loff_t fpga_sram_llseek(struct file *filp, loff_t off, int whence)
++{
++ struct fpga_sram_dev *dev = filp->private_data;
++ loff_t newpos;
++
++ switch(whence) {
++ case 0: /* SEEK_SET */
++ newpos = off;
++ break;
++
++ case 1: /* SEEK_CUR */
++ newpos = filp->f_pos + off;
++ break;
++
++ case 2: /* SEEK_END */
++ newpos = dev->drv->size + off;
++ break;
++
++ default: /* can't happen */
++ return -EINVAL;
++ }
++ if ( newpos >= dev->drv->size) return -EINVAL;
++ if (newpos < 0) return -EINVAL;
++ filp->f_pos = newpos;
++ return newpos;
++}
++
++
++
++static struct file_operations fpga_sram_fops = {
++ .owner = THIS_MODULE,
++ .llseek = fpga_sram_llseek,
++ .read = fpga_sram_read,
++ .write = fpga_sram_write,
++ .open = fpga_sram_open,
++ .release = fpga_sram_release,
++};
++
++/*
++ * Finally, the module stuff
++ */
++
++/*
++ * The cleanup function is used to handle initialization failures as well.
++ * Thefore, it must be careful to work correctly even if some of the items
++ * have not been initialized
++ */
++static int __exit fpga_sram_destroy(struct platform_device *pdev)
++{
++ int i;
++ struct fpga_sram_drv *drv = platform_get_drvdata(pdev);
++ dev_t devno = MKDEV(drv->major, fpga_sram_minor);
++
++ /* Get rid of our char dev entries */
++ if(drv->devices) {
++ for (i = 0; i < drv->devs; i++) {
++ cdev_del(&drv->devices[i].cdev);
++ }
++ kfree(drv->devices);
++ }
++
++ /* cleanup_module is never called if registering failed */
++ unregister_chrdev_region(devno, drv->devs);
++ kfree(drv->devices);
++
++ return 0;
++}
++
++
++/*
++ * Set up the char_dev structure for this device.
++ */
++static void fpga_sram_setup_cdev(struct fpga_sram_dev *dev, int index)
++{
++ int err, devno = MKDEV(dev->drv->major, fpga_sram_minor + index);
++
++ cdev_init(&dev->cdev, &fpga_sram_fops);
++ dev->cdev.owner = THIS_MODULE;
++ dev->cdev.ops = &fpga_sram_fops;
++ err = cdev_add (&dev->cdev, devno, 1);
++ /* Fail gracefully if need be */
++ if (err)
++ pr_info("Error %d adding fpga_sram%d", err, index);
++}
++
++
++static int fpga_sram_probe(struct platform_device *pdev)
++{
++ struct fpga_sram_drv *drv;
++ struct resource *fmem;
++
++ dev_t dev = 0;
++ int result;
++ int i;
++
++ /*
++ * allocate the devices -- we can't have them static, as the number
++ * can be specified at load time
++ */
++ drv = kzalloc(sizeof(*drv), GFP_KERNEL);
++ if(!drv) {
++ result = -ENOMEM;
++ goto drv_mem_err;
++ }
++ drv->devs = fpga_sram_nr_devs;
++
++ drv->devices = kzalloc(drv->devs * sizeof(*drv->devices), GFP_KERNEL);
++ if (!drv->devices) {
++ result = -ENOMEM;
++ goto dev_mem_err; /* Make this more graceful */
++ }
++
++ platform_set_drvdata(pdev, drv);
++
++ /*
++ * Get a range of minor numbers to work with, asking for a dynamic
++ * major unless directed otherwise at load time.
++ */
++ if (fpga_sram_major) {
++ dev = MKDEV(fpga_sram_major, fpga_sram_minor);
++ result = register_chrdev_region(dev, drv->devs, "fpga_sram");
++ drv->major = fpga_sram_major;
++ } else {
++ result = alloc_chrdev_region(&dev, fpga_sram_minor,
++ drv->devs, "fpga_sram");
++ drv->major = MAJOR(dev);
++ }
++ if (result < 0) {
++ dev_warn(&pdev->dev, "can't get major %d\n", fpga_sram_major);
++ goto major_err;
++ }
++
++ fmem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if(!fmem) {
++ result = -ENXIO;
++ dev_warn(&pdev->dev, "No memory to work with\n");
++ goto res_err;
++ }
++
++ drv->size = fmem->end - fmem->start + 1;
++
++#if 0
++ if(!request_mem_region(fmem->start, drv->size, "fpga_sram")) {
++ dev_warn(&pdev->dev, "can't request mem_region");
++ goto res_err;
++ }
++#endif
++
++ drv->start = ioremap(fmem->start, drv->size);
++ if(!drv->start) {
++ dev_warn(&pdev->dev, "Can't allocate resource (%i)\n", result);
++ goto res_err;
++ }
++
++ for(i=0; i< drv->devs; i++) {
++ drv->devices[i].drv = drv;
++ fpga_sram_setup_cdev(&drv->devices[i], i);
++ }
++
++ return 0; /* succeed */
++
++ release_mem_region(fmem->start, drv->size);
++res_err:
++ unregister_chrdev_region(dev, drv->devs);
++major_err:
++ kfree(drv->devices);
++dev_mem_err:
++ kfree(drv);
++drv_mem_err:
++ return result;
++}
++
++static struct platform_driver fpga_sram_driver = {
++ .driver = {
++ .name = "fpga_sram",
++ .owner = THIS_MODULE,
++ },
++ .remove = __exit_p(fpga_sram_destroy),
++};
++
++static int __init fpga_sram_init_module(void) {
++ return platform_driver_probe(&fpga_sram_driver, fpga_sram_probe);
++}
++
++static void __exit fpga_sram_cleanup_module(void) {
++ platform_driver_unregister(&fpga_sram_driver);
++}
++
++module_init(fpga_sram_init_module);
++module_exit(fpga_sram_cleanup_module);
+--
+1.7.3.3
+
--- /dev/null
+From 29e785edcbd8e97eadc37bfbb7e22a66c3bbac6d Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 12:42:21 +0100
+Subject: [PATCH 02/18] [tfp410] added driver for tfp410 DVI-Controller
+
+This chip can be configured via I2C.
+Currently the gpio is coded into this driver.
+---
+ drivers/video/backlight/Kconfig | 6 +
+ drivers/video/backlight/Makefile | 1 +
+ drivers/video/backlight/tfp410.c | 218 ++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 225 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/video/backlight/tfp410.c
+
+diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
+index 09bfa96..acf8a64 100644
+--- a/drivers/video/backlight/Kconfig
++++ b/drivers/video/backlight/Kconfig
+@@ -91,6 +91,12 @@ config LCD_TOSA
+ If you have an Sharp SL-6000 Zaurus say Y to enable a driver
+ for its LCD.
+
++config LCD_TFP410
++ tristate "TFP410 support"
++ depends on LCD_CLASS_DEVICE && I2C
++ default n
++
++
+ config LCD_HP700
+ tristate "HP Jornada 700 series LCD Driver"
+ depends on LCD_CLASS_DEVICE
+diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
+index 9a40554..846c2cc 100644
+--- a/drivers/video/backlight/Makefile
++++ b/drivers/video/backlight/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_LCD_PLATFORM) += platform_lcd.o
+ obj-$(CONFIG_LCD_VGG2432A4) += vgg2432a4.o
+ obj-$(CONFIG_LCD_TDO24M) += tdo24m.o
+ obj-$(CONFIG_LCD_TOSA) += tosa_lcd.o
++obj-$(CONFIG_LCD_TFP410) += tfp410.o
+
+ obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
+ obj-$(CONFIG_BACKLIGHT_ATMEL_PWM) += atmel-pwm-bl.o
+diff --git a/drivers/video/backlight/tfp410.c b/drivers/video/backlight/tfp410.c
+new file mode 100644
+index 0000000..347a700
+--- /dev/null
++++ b/drivers/video/backlight/tfp410.c
+@@ -0,0 +1,218 @@
++/*
++ * Driver for the TFP410 DVI-Chip
++ *
++ * This currently just enables the chip
++ *
++ */
++
++#include <linux/i2c.h>
++#include <linux/sysfs.h>
++#include <linux/hwmon-sysfs.h>
++#include <linux/delay.h>
++#include <mach/gpio.h>
++
++#define TFP_VEN_ID 0x00
++#define TFP_VEN_ID1 0x01
++#define TFP_VEN_ID_TFP 0x014C
++#define TFP_DEV_ID 0x02
++#define TFP_DEV_ID1 0x03
++#define TFP_DEV_ID_TFP 0x0410
++#define TFP_REV_ID 0x04
++#define TFP_CTL1 0x08
++#define TFP_CTL1_nPD (1<<0)
++#define TFP_CTL1_EDGE (1<<1)
++#define TFP_CTL1_BSEL (1<<2)
++#define TFP_CTL1_DSEL (1<<3)
++#define TFP_CTL1_HEN (1<<4)
++#define TFP_CTL1_VEN (1<<5)
++#define TFP_CTL1_TDIS (1<<6)
++#define TFP_CTL2 0x09
++#define TFP_CTL2_MDI (1<<0)
++#define TFP_CTL2_HTPLG (1<<1)
++#define TFP_CTL2_RSEN (1<<2)
++#define TFP_CTL2_TSEL (1<<3)
++#define TFP_CTL2_MSEL(x) ((x)<<4)
++#define TFP_MSEL_DIS 0x00
++#define TFP_MSEL_MDI 0x01
++#define TFP_MSEL_RSEN 0x02
++#define TFP_MSEL_HTPLG 0x03
++#define TFP_CTL2_VLOW (1<<7)
++#define TFP_CTL3 0x0A
++#define TFP_CTL3_CTL(x) ((x)<<1)
++#define TFP_CTL3_DKEN (1<<4)
++#define TFP_CTL3_DK(x) ((x)<<5)
++#define TFP_CFG 0x0B
++#define TFP_DE_DLY 0x32
++#define TFP_DE_CTL 0x33
++#define TFP_DE_CTL_DLY8 (1<<0)
++#define TFP_DE_CTL_HS_POL (1<<4)
++#define TFP_DE_CTL_VS_POL (1<<5)
++#define TFP_DE_CTL_DE_GEN (1<<6)
++#define TFP_DE_TOP 0x34
++#define TFP_DE_CNT 0x36
++#define TFP_DE_CNT1 0x37
++#define TFP_DE_LIN 0x38
++#define TFP_DE_LIN1 0x39
++#define TFP_H_RES 0x3A
++#define TFP_H_RES1 0x3B
++#define TFP_V_RES 0x3C
++#define TFP_V_RES1 0x3D
++
++
++static inline int tfp410_write_byte(struct i2c_client *client,
++ char reg, char data) {
++ return i2c_smbus_write_byte_data(client,reg,data);
++}
++
++static inline int tfp410_write_word(struct i2c_client *client,
++ char reg, short data) {
++ int ret;
++ ret = i2c_smbus_write_byte_data(client,reg,(data & 0x00FF));
++ if(ret < 0) return ret;
++ ret = i2c_smbus_write_byte_data(client,reg+1,(data >> 8));
++ if(ret < 0) return ret;
++ return 2;
++}
++
++static inline int tfp410_write_dword(struct i2c_client *client,
++ char reg, long data) {
++ int ret;
++ ret = i2c_smbus_write_byte_data(client,reg+0,((data >> 0) & 0x00FF));
++ if(ret < 0) return ret;
++ ret = i2c_smbus_write_byte_data(client,reg+1,((data >> 8) & 0x00FF));
++ if(ret < 0) return ret;
++ ret = i2c_smbus_write_byte_data(client,reg+2,((data >> 16) & 0x00FF));
++ if(ret < 0) return ret;
++ ret = i2c_smbus_write_byte_data(client,reg+3,((data >> 24) & 0x00FF));
++ if(ret < 0) return ret;
++ return 2;
++}
++
++static inline int tfp410_read_byte(struct i2c_client *client, char reg) {
++ return i2c_smbus_read_byte_data(client, reg);
++}
++
++static inline int tfp410_read_word(struct i2c_client *client, char reg) {
++ int ret, ret2;
++
++ ret = i2c_smbus_read_byte_data(client, reg);
++ if(ret < 0) return ret;
++ ret2 = i2c_smbus_read_byte_data(client, reg+1);
++ if(ret2 < 0) return ret2;
++ return (ret & 0x00FF) | (ret2 << 8);
++}
++
++static ssize_t dump_regs(struct device *dev, struct device_attribute *attr,
++ char *buf) {
++ struct i2c_client *client = to_i2c_client(dev);
++
++ return sprintf(buf,
++ "Vendor: %04x\nDevice: %04x\nRevision: %02x\n"
++ "CTL1: %02x\nCTL2: %02x\nCTL3: %02x\nCFG: %02x\n"
++ "DE_DLY: %04x\nDE_CTL: %02x\nDE_TOP: %02x\n"
++ "DE_CNT: %04i\nDE_LIN: %04i\n"
++ "H_RES: %04i\nV_RES: %04i\n",
++ tfp410_read_word(client, TFP_VEN_ID),
++ tfp410_read_word(client, TFP_DEV_ID),
++ tfp410_read_byte(client, TFP_REV_ID),
++ tfp410_read_byte(client, TFP_CTL1),
++ tfp410_read_byte(client, TFP_CTL2),
++ tfp410_read_byte(client, TFP_CTL3),
++ tfp410_read_byte(client, TFP_CFG),
++ tfp410_read_byte(client, TFP_DE_DLY),
++ tfp410_read_byte(client, TFP_DE_CTL),
++ tfp410_read_byte(client, TFP_DE_TOP),
++ tfp410_read_word(client, TFP_DE_CNT),
++ tfp410_read_word(client, TFP_DE_LIN),
++ tfp410_read_word(client, TFP_H_RES),
++ tfp410_read_word(client, TFP_V_RES));
++
++}
++
++static SENSOR_DEVICE_ATTR(regs, S_IRUGO, dump_regs, NULL, 0);
++
++static struct attribute *tfp410_attributes[] = {
++ &sensor_dev_attr_regs.dev_attr.attr,
++ NULL,
++};
++
++static const struct attribute_group tfp410_group = {
++ .attrs = tfp410_attributes,
++};
++
++#ifdef CONFIG_ARCH_AT91SAM9G45
++#define TFP410_RESET_PIN 65 // PB1
++#else
++#define TFP410_RESET_PIN 1 // PA1
++#endif
++
++static int tfp410_probe(struct i2c_client *client,
++ const struct i2c_device_id *dev_id) {
++ int ret = 0;
++ int reg;
++ if(!i2c_check_functionality(client->adapter,
++ I2C_FUNC_SMBUS_BYTE_DATA))
++ goto exit;
++ dev_info(&client->dev, "chip found\n");
++ gpio_request(TFP410_RESET_PIN, "tfp410.reset");
++ gpio_direction_output(TFP410_RESET_PIN, 0);
++ msleep(4);
++ gpio_set_value(TFP410_RESET_PIN, 1);
++ msleep(4);
++ reg = tfp410_read_word(client, TFP_VEN_ID);
++ if(reg != TFP_VEN_ID_TFP) {
++ dev_warn(&client->dev, "VID doesn't match %04x vs. %04x\n",
++ reg, TFP_VEN_ID_TFP);
++ goto exit;
++ }
++ // Init the chip
++ tfp410_write_byte(client, TFP_CTL1,
++ (TFP_CTL1_nPD | tfp410_read_byte(client, TFP_CTL1))
++ & ~TFP_CTL1_TDIS);
++ tfp410_write_byte(client, TFP_DE_CTL,0
++ |TFP_DE_CTL_VS_POL|TFP_DE_CTL_HS_POL
++ );
++ ret = sysfs_create_group(&client->dev.kobj, &tfp410_group);
++ if(ret) goto exit;
++
++
++ return 0;
++
++ sysfs_remove_group(&client->dev.kobj, &tfp410_group);
++exit:
++ return ret;
++}
++
++static int __devexit tfp410_remove(struct i2c_client *client) {
++ sysfs_remove_group(&client->dev.kobj, &tfp410_group);
++ return 0;
++}
++
++static const struct i2c_device_id tfp410_id[] = {
++ { "tfp410", 0x3F },
++ {},
++};
++
++static struct i2c_driver tfp410_driver = {
++ .driver = {
++ .name = "tfp410",
++ },
++ .probe = tfp410_probe,
++ .remove = __devexit_p(tfp410_remove),
++ .id_table = tfp410_id,
++};
++
++static int __init tfp410_init(void) {
++ return i2c_add_driver(&tfp410_driver);
++}
++module_init(tfp410_init);
++
++static void __exit tfp410_exit(void) {
++ i2c_del_driver(&tfp410_driver);
++}
++module_exit(tfp410_exit);
++
++MODULE_AUTHOR("Benjamin Tietz <benjamin.tietz@in-circuit.de>");
++MODULE_DESCRIPTION("TFP410 Display Driver");
++MODULE_LICENSE("GPL");
++
+--
+1.7.3.3
+
--- /dev/null
+From a581d8cc2ec44930b697a602d22ae6a4179a8bf1 Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 13:40:28 +0100
+Subject: [PATCH 03/18] [drivers/at91_mci] modified MMC-Host to work on G45
+
+---
+ arch/arm/mach-at91/at91sam9g45_devices.c | 170 +++++++++++++++++++++++++++-
+ arch/arm/mach-at91/include/mach/at91_mci.h | 24 ++++
+ arch/arm/mach-at91/include/mach/board.h | 8 +-
+ drivers/mmc/host/Kconfig | 2 +-
+ drivers/mmc/host/at91_mci.c | 147 ++++++++++++++++++------
+ 5 files changed, 308 insertions(+), 43 deletions(-)
+
+diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
+index 809114d..c40e4cd 100644
+--- a/arch/arm/mach-at91/at91sam9g45_devices.c
++++ b/arch/arm/mach-at91/at91sam9g45_devices.c
+@@ -25,6 +25,8 @@
+ #include <mach/at91sam9g45_matrix.h>
+ #include <mach/at91sam9_smc.h>
+ #include <mach/at_hdmac.h>
++#include <mach/atmel-mci.h>
++#include <linux/atmel-mci.h>
+
+ #include "generic.h"
+
+@@ -276,6 +278,168 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {}
+
+
+ /* --------------------------------------------------------------------
++ * MMC / SD
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
++static u64 mmc_dmamask = DMA_BIT_MASK(32);
++static struct mci_platform_data mmc0_data, mmc1_data;
++
++static struct resource mmc0_resources[] = {
++ [0] = {
++ .start = AT91SAM9G45_BASE_MCI0,
++ .end = AT91SAM9G45_BASE_MCI0 + SZ_16K - 1,
++ .flags = IORESOURCE_MEM,
++ },
++ [1] = {
++ .start = AT91SAM9G45_ID_MCI0,
++ .end = AT91SAM9G45_ID_MCI0,
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct platform_device at91sam9g45_mmc0_device = {
++ .name = "atmel_mci",
++ .id = 0,
++ .dev = {
++ .dma_mask = &mmc_dmamask,
++ .coherent_dma_mask = DMA_BIT_MASK(32),
++ .platform_data = &mmc0_data,
++ },
++ .resource = mmc0_resources,
++ .num_resources = ARRAY_SIZE(mmc0_resources),
++};
++
++static struct resource mmc1_resources[] = {
++ [0] = {
++ .start = AT91SAM9G45_BASE_MCI1,
++ .end = AT91SAM9G45_BASE_MCI1 + SZ_16K - 1,
++ .flags = IORESOURCE_MEM,
++ },
++ [1] = {
++ .start = AT91SAM9G45_ID_MCI1,
++ .end = AT91SAM9G45_ID_MCI1,
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct platform_device at91sam9g45_mmc1_device = {
++ .name = "atmel_mci",
++ .id = 1,
++ .dev = {
++ .dma_mask = &mmc_dmamask,
++ .coherent_dma_mask = DMA_BIT_MASK(32),
++ .platform_data = &mmc1_data,
++ },
++ .resource = mmc1_resources,
++ .num_resources = ARRAY_SIZE(mmc1_resources),
++};
++
++/* Consider only one slot : slot 0 */
++void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
++{
++
++ if (!data)
++ return;
++
++ /* Must have at least one usable slot */
++ if (!data->slot[0].bus_width)
++ return;
++
++#if defined(CONFIG_MMC_ATMELMCI_DMA)
++ {
++ struct mci_dma_data *slave;
++
++ slave = kzalloc(sizeof(struct mci_dma_data), GFP_KERNEL);
++
++ /* DMA slave channel configuration */
++ slave->sdata.dma_dev = &at_hdmac_device.dev;
++ slave->sdata.reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
++ slave->sdata.cfg = ATC_FIFOCFG_HALFFIFO
++ | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW;
++ slave->sdata.ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16;
++ if (mmc_id == 0) /* MCI0 */
++ slave->sdata.cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0)
++ | ATC_DST_PER(AT_DMA_ID_MCI0);
++
++ else /* MCI1 */
++ slave->sdata.cfg |= ATC_SRC_PER(AT_DMA_ID_MCI1)
++ | ATC_DST_PER(AT_DMA_ID_MCI1);
++
++ data->dma_slave = slave;
++ }
++#endif
++
++
++ /* input/irq */
++ if (data->slot[0].detect_pin) {
++ at91_set_gpio_input(data->slot[0].detect_pin, 1);
++ at91_set_deglitch(data->slot[0].detect_pin, 1);
++ }
++ if (data->slot[0].wp_pin)
++ at91_set_gpio_input(data->slot[0].wp_pin, 1);
++
++ if (mmc_id == 0) { /* MCI0 */
++
++ /* CLK */
++ at91_set_A_periph(AT91_PIN_PA0, 0);
++
++ /* CMD */
++ at91_set_A_periph(AT91_PIN_PA1, 1);
++
++ /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
++ at91_set_A_periph(AT91_PIN_PA2, 1);
++ if (data->slot[0].bus_width == 4) {
++ at91_set_A_periph(AT91_PIN_PA3, 1);
++ at91_set_A_periph(AT91_PIN_PA4, 1);
++ at91_set_A_periph(AT91_PIN_PA5, 1);
++ if (data->slot[0].bus_width == 8) {
++ at91_set_A_periph(AT91_PIN_PA6, 1);
++ at91_set_A_periph(AT91_PIN_PA7, 1);
++ at91_set_A_periph(AT91_PIN_PA8, 1);
++ at91_set_A_periph(AT91_PIN_PA9, 1);
++ }
++ }
++
++ mmc0_data = *data;
++ at91_clock_associate("mci0_clk", &at91sam9g45_mmc0_device.dev, "mci_clk");
++ platform_device_register(&at91sam9g45_mmc0_device);
++
++ } else { /* MCI1 */
++
++ /* CLK */
++ at91_set_A_periph(AT91_PIN_PA31, 0);
++
++ /* CMD */
++ at91_set_A_periph(AT91_PIN_PA22, 1);
++
++ /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
++ at91_set_A_periph(AT91_PIN_PA23, 1);
++ if (data->slot[0].bus_width == 4) {
++ at91_set_A_periph(AT91_PIN_PA24, 1);
++ at91_set_A_periph(AT91_PIN_PA25, 1);
++ at91_set_A_periph(AT91_PIN_PA26, 1);
++ if (data->slot[0].bus_width == 8) {
++ at91_set_A_periph(AT91_PIN_PA27, 1);
++ at91_set_A_periph(AT91_PIN_PA28, 1);
++ at91_set_A_periph(AT91_PIN_PA29, 1);
++ at91_set_A_periph(AT91_PIN_PA30, 1);
++ }
++ }
++
++ mmc1_data = *data;
++ at91_clock_associate("mci1_clk", &at91sam9g45_mmc1_device.dev, "mci_clk");
++ platform_device_register(&at91sam9g45_mmc1_device);
++
++ }
++}
++
++#else
++void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
+ * Ethernet
+ * -------------------------------------------------------------------- */
+
+@@ -746,13 +910,17 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
+ if (!data)
+ return;
+
+- at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
++ //at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
+
+ at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
+ at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
+ at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
+ at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
++#ifndef CONFIG_MACH_ICNOVA_ADB1004
++#ifndef CONFIG_MACH_ICNOVA_ADB3000
+ at91_set_A_periph(AT91_PIN_PE6, 0); /* LCDDEN */
++#endif
++#endif
+ at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
+ at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
+ at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
+diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
+index 550d503..6cabe7d 100644
+--- a/arch/arm/mach-at91/include/mach/at91_mci.h
++++ b/arch/arm/mach-at91/include/mach/at91_mci.h
+@@ -79,6 +79,18 @@
+ #define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */
+ #define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block lenght */
+
++#define AT91_MCI_CSTOR 0x08 /* Complete Signal Timeout Register */
++#define AT91_MCI_CSTOCYC (0xf << 0) /* CS Timeout Cycle Number */
++#define AT91_MCI_CSTOMUL (7 << 4) /* CS Timeout Multiplier */
++#define AT91_MCI_CSTOMUL_1 (0 << 4)
++#define AT91_MCI_CSTOMUL_16 (1 << 4)
++#define AT91_MCI_CSTOMUL_128 (2 << 4)
++#define AT91_MCI_CSTOMUL_256 (3 << 4)
++#define AT91_MCI_CSTOMUL_1K (4 << 4)
++#define AT91_MCI_CSTOMUL_4K (5 << 4)
++#define AT91_MCI_CSTOMUL_64K (6 << 4)
++#define AT91_MCI_CSTOMUL_1M (7 << 4)
++
+ #define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */
+ #define AT91_MCR_RDR 0x30 /* Receive Data Register */
+ #define AT91_MCR_TDR 0x34 /* Transmit Data Register */
+@@ -103,6 +115,8 @@
+ #define AT91_MCI_RTOE (1 << 20) /* Reponse Time-out Error */
+ #define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */
+ #define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */
++#define AT91_MCI_FIFOEMPTY (1 << 26) /* FIFO Empty (g45) */
++#define AT91_MCI_XFRDONE (1 << 27) /* Transfer Done (g45) */
+ #define AT91_MCI_OVRE (1 << 30) /* Overrun */
+ #define AT91_MCI_UNRE (1 << 31) /* Underrun */
+
+@@ -110,4 +124,14 @@
+ #define AT91_MCI_IDR 0x48 /* Interrupt Disable Register */
+ #define AT91_MCI_IMR 0x4c /* Interrupt Mask Register */
+
++#define AT91_MCI_HSDMA 0x50 /* DMA-Register on HSMCI */
++#define AT91_MCI_OFFSET (3<<0) /* DMA Write Buffer Offset */
++#define AT91_MCI_CHKSIZE (3<<4) /* DMA Channel Read and Write Chunk Size */
++#define AT91_MCI_CHKSIZE1 (0<<4) /* DMA Channel Read and Write Chunk Size */
++#define AT91_MCI_CHKSIZE4 (1<<4) /* DMA Channel Read and Write Chunk Size */
++#define AT91_MCI_CHKSIZE8 (2<<4) /* DMA Channel Read and Write Chunk Size */
++#define AT91_MCI_CHKSIZE16 (3<<4) /* DMA Channel Read and Write Chunk Size */
++#define AT91_MCI_DMAEN (1<<8) /* DMA Hardware Handshaking Enable */
++#define AT91_MCI_ROPT (1<<12) /* Read Optimization with padding */
++
+ #endif
+diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
+index bb6f6a7..b0d0e12 100644
+--- a/arch/arm/mach-at91/include/mach/board.h
++++ b/arch/arm/mach-at91/include/mach/board.h
+@@ -39,6 +39,7 @@
+ #include <linux/usb/atmel_usba_udc.h>
+ #include <linux/atmel-mci.h>
+ #include <sound/atmel-ac97c.h>
++#include <linux/serial.h>
+
+ /* USB Device */
+ struct at91_udc_data {
+@@ -143,9 +144,10 @@ extern struct platform_device *atmel_default_console_device;
+ extern void __init __deprecated at91_init_serial(struct at91_uart_config *config);
+
+ struct atmel_uart_data {
+- short use_dma_tx; /* use transmit DMA? */
+- short use_dma_rx; /* use receive DMA? */
+- void __iomem *regs; /* virtual base address, if any */
++ short use_dma_tx; /* use transmit DMA? */
++ short use_dma_rx; /* use receive DMA? */
++ void __iomem *regs; /* virt. base address, if any */
++ struct serial_rs485 rs485; /* rs485 settings */
+ };
+ extern void __init at91_add_device_serial(void);
+
+diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
+index ce1d288..1454a9d 100644
+--- a/drivers/mmc/host/Kconfig
++++ b/drivers/mmc/host/Kconfig
+@@ -219,7 +219,7 @@ endchoice
+
+ config MMC_ATMELMCI_DMA
+ bool "Atmel MCI DMA support (EXPERIMENTAL)"
+- depends on MMC_ATMELMCI && AVR32 && DMA_ENGINE && EXPERIMENTAL
++ depends on MMC_ATMELMCI && (AVR32 || ARCH_AT91SAM9G45) && DMA_ENGINE && EXPERIMENTAL
+ help
+ Say Y here to have the Atmel MCI driver use a DMA engine to
+ do data transfers and thus increase the throughput and
+diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
+index 63924e0..90fda9e 100644
+--- a/drivers/mmc/host/at91_mci.c
++++ b/drivers/mmc/host/at91_mci.c
+@@ -53,6 +53,7 @@
+ Gets the status of the write protect pin, if available.
+ */
+
++#define DEBUG
+ #include <linux/module.h>
+ #include <linux/moduleparam.h>
+ #include <linux/init.h>
+@@ -268,44 +269,77 @@ static void at91_mci_pre_dma_read(struct at91mci_host *host)
+ return;
+ }
+
+- for (i = 0; i < 2; i++) {
+- /* nothing left to transfer */
+- if (host->transfer_index >= data->sg_len) {
+- pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
+- break;
+- }
+-
+- /* Check to see if this needs filling */
+- if (i == 0) {
+- if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
+- pr_debug("Transfer active in current\n");
+- continue;
+- }
+- }
+- else {
+- if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
+- pr_debug("Transfer active in next\n");
+- continue;
+- }
+- }
++ if(cpu_is_at91sam9g45()) {
++ /*if(at91_mci_read(host, AT91_MCI_HSDMA) & AT91_MCI_DMAEN) {
++ pr_warning("DMA Transfer in progress\n");
++ return;
++ }*/
+
+- /* Setup the next transfer */
+ pr_debug("Using transfer index %d\n", host->transfer_index);
+
+ sg = &data->sg[host->transfer_index++];
+ pr_debug("sg = %p\n", sg);
+
++ i = 0;
++ switch(sg->length) {
++ case 1:
++ i |= AT91_MCI_CHKSIZE1;
++ break;
++ case 4:
++ i |= AT91_MCI_CHKSIZE4;
++ break;
++ case 8:
++ i |= AT91_MCI_CHKSIZE8;
++ break;
++ case 16:
++ i |= AT91_MCI_CHKSIZE16;
++ break;
++ }
++ at91_mci_write(host, AT91_MCI_HSDMA, i|AT91_MCI_DMAEN);
++
+ sg->dma_address = dma_map_page(NULL, sg_page(sg), sg->offset, sg->length, DMA_FROM_DEVICE);
+
+ pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
++ } else {
++ for (i = 0; i < 2; i++) {
++ /* nothing left to transfer */
++ if (host->transfer_index >= data->sg_len) {
++ pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
++ break;
++ }
+
+- if (i == 0) {
+- at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
+- at91_mci_write(host, ATMEL_PDC_RCR, (data->blksz & 0x3) ? sg->length : sg->length / 4);
+- }
+- else {
+- at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
+- at91_mci_write(host, ATMEL_PDC_RNCR, (data->blksz & 0x3) ? sg->length : sg->length / 4);
++ /* Check to see if this needs filling */
++ if (i == 0) {
++ if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
++ pr_debug("Transfer active in current\n");
++ continue;
++ }
++ }
++ else {
++ if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
++ pr_debug("Transfer active in next\n");
++ continue;
++ }
++ }
++
++ /* Setup the next transfer */
++ pr_debug("Using transfer index %d\n", host->transfer_index);
++
++ sg = &data->sg[host->transfer_index++];
++ pr_debug("sg = %p\n", sg);
++
++ sg->dma_address = dma_map_page(NULL, sg_page(sg), sg->offset, sg->length, DMA_FROM_DEVICE);
++
++ pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
++
++ if (i == 0) {
++ at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
++ at91_mci_write(host, ATMEL_PDC_RCR, (data->blksz & 0x3) ? sg->length : sg->length / 4);
++ }
++ else {
++ at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
++ at91_mci_write(host, ATMEL_PDC_RNCR, (data->blksz & 0x3) ? sg->length : sg->length / 4);
++ }
+ }
+ }
+
+@@ -358,6 +392,9 @@ static void at91_mci_post_dma_read(struct at91mci_host *host)
+
+ kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
+ }
++ if (cpu_is_at91sam9g45()) {
++ at91_mci_write(host, AT91_MCI_HSDMA, 0);
++ }
+
+ flush_dcache_page(sg_page(sg));
+
+@@ -368,8 +405,13 @@ static void at91_mci_post_dma_read(struct at91mci_host *host)
+ if (host->transfer_index < data->sg_len)
+ at91_mci_pre_dma_read(host);
+ else {
+- at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
+- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
++ if(cpu_is_at91sam9g45()) {
++ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_FIFOEMPTY);
++ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_XFRDONE);
++ } else {
++ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
++ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
++ }
+ }
+
+ pr_debug("post dma read done\n");
+@@ -399,7 +441,11 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host)
+
+ if (cmd->data->blocks > 1) {
+ pr_debug("multiple write : wait for BLKE...\n");
+- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
++ if(cpu_is_at91sam9g45()) {
++ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_XFRDONE);
++ } else {
++ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
++ }
+ } else
+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
+ }
+@@ -461,7 +507,7 @@ static void at91_mci_enable(struct at91mci_host *host)
+ at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
+ mr = AT91_MCI_PDCMODE | 0x34a;
+
+- if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
++ if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g45())
+ mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
+
+ at91_mci_write(host, AT91_MCI_MR, mr);
+@@ -592,7 +638,8 @@ static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command
+ /*
+ * Disable the PDC controller
+ */
+- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
++ if(!cpu_is_at91sam9g45())
++ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
+
+ if (cmdr & AT91_MCI_TRCMD_START) {
+ data->bytes_xfered = 0;
+@@ -606,7 +653,11 @@ static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command
+ host->total_length = 0;
+
+ at91_mci_pre_dma_read(host);
+- ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
++ if(cpu_is_at91sam9g45()) {
++ ier = AT91_MCI_FIFOEMPTY;
++ } else {
++ ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
++ }
+ }
+ else {
+ /*
+@@ -655,8 +706,13 @@ static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command
+ at91_mci_write(host, AT91_MCI_CMDR, cmdr);
+
+ if (cmdr & AT91_MCI_TRCMD_START) {
+- if (cmdr & AT91_MCI_TRDIR)
+- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
++ if (cmdr & AT91_MCI_TRDIR) {
++ if(cpu_is_at91sam9g45()) {
++ //at91_mci_write(host, AT91_MCI_HSDMA, AT91_MCI_DMAEN);
++ } else {
++ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
++ }
++ }
+ }
+
+ /* Enable selected interrupts */
+@@ -668,6 +724,7 @@ static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command
+ */
+ static void at91_mci_process_next(struct at91mci_host *host)
+ {
++ pr_debug("process next\n");
+ if (!(host->flags & FL_SENT_COMMAND)) {
+ host->flags |= FL_SENT_COMMAND;
+ at91_mci_send_command(host, host->request->cmd);
+@@ -676,6 +733,7 @@ static void at91_mci_process_next(struct at91mci_host *host)
+ host->flags |= FL_SENT_STOP;
+ at91_mci_send_command(host, host->request->stop);
+ } else {
++ pr_debug("del timer\n");
+ del_timer(&host->timer);
+ /* the at91rm9200 mci controller hangs after some transfers,
+ * and the workaround is to reset it after each transfer.
+@@ -742,6 +800,7 @@ static void at91_mci_completed_command(struct at91mci_host *host, unsigned int s
+ else
+ cmd->error = 0;
+
++ pr_debug("command_complete");
+ at91_mci_process_next(host);
+ }
+
+@@ -756,6 +815,7 @@ static void at91_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
+
+ mod_timer(&host->timer, jiffies + HZ);
+
++ pr_debug("request\n");
+ at91_mci_process_next(host);
+ }
+
+@@ -862,10 +922,21 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
+ at91_mci_handle_transmitted(host);
+ }
+
+- if (int_status & AT91_MCI_ENDRX) {
++ if ((int_status & AT91_MCI_ENDRX) && !cpu_is_at91sam9g45()) {
+ pr_debug("ENDRX\n");
+ at91_mci_post_dma_read(host);
+ }
++ if ((int_status & AT91_MCI_XFRDONE) && cpu_is_at91sam9g45()) {
++ pr_debug("XFRDONE\n");
++ at91_mci_write(host, AT91_MCI_HSDMA, 0);
++ completed = 1;
++ }
++ if ((int_status & AT91_MCI_FIFOEMPTY) && cpu_is_at91sam9g45()) {
++ pr_debug("FIFOEMPTY\n");
++ at91_mci_post_dma_read(host);
++ if (host->transfer_index >= host->cmd->data->sg_len)
++ completed = 1;
++ }
+
+ if (int_status & AT91_MCI_RXBUFF) {
+ pr_debug("RX buffer full\n");
+@@ -1017,7 +1088,7 @@ static int __init at91_mci_probe(struct platform_device *pdev)
+ host->bus_mode = 0;
+ host->board = pdev->dev.platform_data;
+ if (host->board->wire4) {
+- if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
++ if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g45())
+ mmc->caps |= MMC_CAP_4_BIT_DATA;
+ else
+ dev_warn(&pdev->dev, "4 wire bus mode not supported"
+--
+1.7.3.3
+
--- /dev/null
+From 85507d9d515fb864112d5b0785fad0d34c49efc2 Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 13:41:06 +0100
+Subject: [PATCH 04/18] [.gitignore] ignore arm image output
+
+---
+ .gitignore | 1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+
+diff --git a/.gitignore b/.gitignore
+index de6344e..e218170 100644
+--- a/.gitignore
++++ b/.gitignore
+@@ -71,3 +71,4 @@ GTAGS
+ *.orig
+ *~
+ \#*#
++arch/arm/boot/compressed/*
+--
+1.7.3.3
+
--- /dev/null
+From 1584e8044f709bef0e9a30fa0ee18c72e9555f4b Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 13:48:30 +0100
+Subject: [PATCH 05/18] [arm/mach-at91] Add support for icnova-boards
+
+This patch adds support for the Boards ICnova ADB1000, ADB1002, ADB1004
+and ADB3000; each equipped by an ICnova SAM9G45 OEM.
+The ADB3000 can be equipped by an ICnova SAM9G45+XC700AN OEM, too.
+---
+ arch/arm/mach-at91/Kconfig | 25 ++
+ arch/arm/mach-at91/Makefile | 6 +-
+ arch/arm/mach-at91/board-icnova_adb1000.c | 328 +++++++++++++++++++++++++
+ arch/arm/mach-at91/board-icnova_adb1002.c | 276 +++++++++++++++++++++
+ arch/arm/mach-at91/board-icnova_adb1004.c | 270 +++++++++++++++++++++
+ arch/arm/mach-at91/board-icnova_adb3000.c | 375 +++++++++++++++++++++++++++++
+ 6 files changed, 1279 insertions(+), 1 deletions(-)
+ create mode 100644 arch/arm/mach-at91/board-icnova_adb1000.c
+ create mode 100644 arch/arm/mach-at91/board-icnova_adb1002.c
+ create mode 100644 arch/arm/mach-at91/board-icnova_adb1004.c
+ create mode 100644 arch/arm/mach-at91/board-icnova_adb3000.c
+
+diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
+index 0b2ee95..bc1221d 100644
+--- a/arch/arm/mach-at91/Kconfig
++++ b/arch/arm/mach-at91/Kconfig
+@@ -370,6 +370,31 @@ config MACH_AT91SAM9G45EKES
+ "ES" at the end of the name means that this board is an
+ Engineering Sample.
+
++config MACH_ICNOVA_ADB1000
++ bool "In-Circuit ADB1000 G45 Evaluation Kit"
++ help
++ Select this if you are using In-Circuit's ICnova G45 on an ADB1000
++ Development Board.
++
++config MACH_ICNOVA_ADB1002
++ bool "In-Circuit ADB1002 G45 Evaluation Kit"
++ help
++ Select this if you are using In-Circuit's ICnova G45 on an ADB1002
++ Development Board.
++
++config MACH_ICNOVA_ADB1004
++ bool "In-Circuit ADB1004 G45 Evaluation Kit"
++ help
++ Select this if you are using In-Circuit's ICnova G45 on an ADB1004
++ Development Board. The Configration currently supports the version
++ using the 4.3inch Display
++
++config MACH_ICNOVA_ADB3000
++ bool "In-Circuit ADB3000 G45/FPGA Evaluation Kit"
++ help
++ Select this if you are using In-Circuit's ICnova G45 on an ADB3000
++ Development Board.
++
+ endif
+
+ # ----------------------------------------------------------
+diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
+index 709fbad..be44d7f 100644
+--- a/arch/arm/mach-at91/Makefile
++++ b/arch/arm/mach-at91/Makefile
+@@ -17,7 +17,7 @@ obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_d
+ obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
+ obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
+ obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+- obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
++obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
+ obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
+ obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
+
+@@ -65,6 +65,10 @@ obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
+
+ # AT91SAM9G45 board-specific support
+ obj-$(CONFIG_MACH_AT91SAM9G45EKES) += board-sam9m10g45ek.o
++obj-$(CONFIG_MACH_ICNOVA_ADB1000) += board-icnova_adb1000.o
++obj-$(CONFIG_MACH_ICNOVA_ADB1002) += board-icnova_adb1002.o
++obj-$(CONFIG_MACH_ICNOVA_ADB1004) += board-icnova_adb1004.o
++obj-$(CONFIG_MACH_ICNOVA_ADB3000) += board-icnova_adb3000.o
+
+ # AT91CAP9 board-specific support
+ obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o
+diff --git a/arch/arm/mach-at91/board-icnova_adb1000.c b/arch/arm/mach-at91/board-icnova_adb1000.c
+new file mode 100644
+index 0000000..d07a5c2
+--- /dev/null
++++ b/arch/arm/mach-at91/board-icnova_adb1000.c
+@@ -0,0 +1,328 @@
++/*
++ * Board-specific setup code for the AT91SAM9M10G45 Evaluation Kit family
++ *
++ * Covers: * AT91SAM9G45-EKES board
++ * * AT91SAM9M10G45-EK board
++ *
++ * Copyright (C) 2009 Atmel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/ads7846.h>
++#include <linux/fb.h>
++#include <linux/gpio_keys.h>
++#include <linux/input.h>
++#include <linux/leds.h>
++#include <linux/clk.h>
++
++#include <mach/hardware.h>
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <mach/hardware.h>
++#include <mach/board.h>
++#include <mach/gpio.h>
++#include <mach/at91sam9_smc.h>
++#include <mach/at91_shdwc.h>
++
++#include "sam9_smc.h"
++#include "generic.h"
++
++
++static void __init ek_map_io(void)
++{
++ /* Initialize processor: 12.000 MHz crystal */
++ at91sam9g45_initialize(12000000);
++
++ /* DGBU on ttyS0. (Rx & Tx only) */
++ at91_register_uart(0, 0, 0);
++
++ // For RS485 you might enable ATMEL_UART_RTS instead of 0
++ at91_register_uart(AT91SAM9G45_ID_US0, 1, 0);
++ at91_register_uart(AT91SAM9G45_ID_US1, 2, 0);
++ at91_register_uart(AT91SAM9G45_ID_US2, 3, 0);
++ //at91_register_uart(AT91SAM9G45_ID_US3, 4, 0);
++
++ /* set serial console to ttyS0 (ie, DBGU) */
++ at91_set_serial_console(0);
++}
++
++static void __init ek_init_irq(void)
++{
++ at91sam9g45_init_interrupts(NULL);
++}
++
++
++/*
++ * USB HS Host port (common to OHCI & EHCI)
++ */
++static struct at91_usbh_data __initdata ek_usbh_hs_data = {
++ .ports = 2,
++ .vbus_pin = {AT91_PIN_PC9, AT91_PIN_PC0, },
++};
++
++/*
++ * I2C devices
++ */
++static struct i2c_board_info icnova_i2c[] = {
++ {
++ .type = "m41t82",
++ .addr = 0x68,
++ },
++};
++
++/*
++ * SPI devices.
++ */
++
++#define CONFIG_BOARD_ICNOVA_ADS7846_IRQ AT91_PIN_PB17
++#define CONFIG_BOARD_ICNOVA_ADS7846_CS 2
++static struct ads7846_platform_data ads_info = {
++ .model = 7846,
++ .vref_delay_usecs = 100,
++ .gpio_pendown = CONFIG_BOARD_ICNOVA_ADS7846_IRQ,
++ .x_min = 330,
++ .y_min = 3700,
++ .x_max = 3700,
++ .y_max = 330,
++ .settle_delay_usecs = 50,
++};
++
++static struct spi_board_info ek_spi_devices[] = {
++ {
++ .modalias = "ads7846",
++ .max_speed_hz = 125000 * 26,
++ .chip_select = CONFIG_BOARD_ICNOVA_ADS7846_CS,
++ .platform_data = &ads_info,
++ .bus_num = 0,
++ .controller_data = AT91_PIN_PD25,
++ },
++};
++
++
++/*
++ * MACB Ethernet device
++ */
++static struct at91_eth_data __initdata ek_macb_data = {
++ .phy_irq_pin = AT91_PIN_PC6,
++};
++
++
++/*
++ * NAND flash
++ */
++static struct mtd_partition __initdata ek_nand_partition[] = {
++ {
++ .name = "Kernel",
++ .offset = 0,
++ .size = SZ_2M,
++ },
++ {
++ .name = "Root",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = SZ_16M,
++ },
++ {
++ .name = "Data",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = MTDPART_SIZ_FULL,
++ },
++};
++
++static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
++{
++ *num_partitions = ARRAY_SIZE(ek_nand_partition);
++ return ek_nand_partition;
++}
++
++/* det_pin is not connected */
++static struct atmel_nand_data __initdata ek_nand_data = {
++ .ale = 21,
++ .cle = 22,
++ .rdy_pin = AT91_PIN_PC11,
++ .enable_pin = AT91_PIN_PC8,
++ .partition_info = nand_partitions,
++ .bus_width_16 = 0,
++};
++
++static struct sam9_smc_config __initdata ek_nand_smc_config = {
++ .ncs_read_setup = 0,
++ .nrd_setup = 10,
++ .ncs_write_setup = 0,
++ .nwe_setup = 10,
++
++ .ncs_read_pulse = 50,
++ .nrd_pulse = 30,
++ .ncs_write_pulse = 50,
++ .nwe_pulse = 30,
++
++ .read_cycle = 60,
++ .write_cycle = 60,
++
++ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
++ .tdf_cycles = 4,
++};
++
++static void __init ek_add_device_nand(void)
++{
++ /* configure chip-select 3 (NAND) */
++ sam9_smc_configure(3, &ek_nand_smc_config);
++
++ at91_add_device_nand(&ek_nand_data);
++}
++
++/*
++ * MCI (SD/MMC)
++ */
++static struct mci_platform_data __initdata ek_mmc_data = {
++ .slot[0] = {
++ .bus_width = 4,
++ .detect_pin = AT91_PIN_PD29,
++ .wp_pin = AT91_PIN_PD5,
++ }
++};
++
++
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++ {
++ .name = "QVGA",
++ .refresh = 50,
++ .xres = 320, .yres = 240,
++ .pixclock = KHZ2PICOS(6500),
++
++ .left_margin = 34, .right_margin = 20,
++ .upper_margin = 9, .lower_margin = 4,
++ .hsync_len = 34, .vsync_len = 9,
++
++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++ .vmode = FB_VMODE_NONINTERLACED,
++ },
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++ .manufacturer = "ET",
++ .monitor = "ET035009DH6",
++
++ .modedb = at91_tft_vga_modes,
++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
++ .hfmin = 10000,
++ .hfmax = 30000,
++ .vfmin = 50,
++ .vfmax = 80,
++};
++
++#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
++ | ATMEL_LCDC_DISTYPE_TFT \
++ | ATMEL_LCDC_INVCLK \
++ | ATMEL_LCDC_INVDVAL \
++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++ .lcdcon_is_backlight = true,
++ .default_bpp = 24,
++ .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
++ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
++ .default_monspecs = &at91fb_default_monspecs,
++ .guard_time = 9,
++ .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++
++/*
++ * LEDs ... these could all be PWM-driven, for variable brightness
++ */
++static struct gpio_led ek_leds[] = {
++ {
++ .name = "pwr",
++ .gpio = AT91_PIN_PD28,
++ .default_trigger = "heartbeat",
++ },
++ {
++ .name = "LED1",
++ .gpio = AT91_PIN_PA22,
++ .default_trigger = "nand-disk",
++ },
++ {
++ .name = "LED2",
++ .gpio = AT91_PIN_PA23,
++ .default_trigger = "mmc0",
++ },
++ {
++ .name = "LED3",
++ .gpio = AT91_PIN_PD23,
++ },
++ {
++ .name = "LED4",
++ .gpio = AT91_PIN_PD26,
++ },
++};
++
++
++static void __init ek_board_init(void)
++{
++ /* Serial */
++ at91_add_device_serial();
++ /* USB HS Host */
++ at91_add_device_usbh_ehci(&ek_usbh_hs_data);
++ at91_add_device_usbh_ohci(&ek_usbh_hs_data);
++ /* USB HS Device */
++ at91_add_device_usba(NULL);
++ /* SPI */
++ ek_spi_devices[0].irq = gpio_to_irq(CONFIG_BOARD_ICNOVA_ADS7846_IRQ),
++ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
++ /* MMC */
++ at91_add_device_mci(0, &ek_mmc_data);
++ /* Ethernet */
++ at91_add_device_eth(&ek_macb_data);
++ /* NAND */
++ ek_add_device_nand();
++ /* I2C */
++ at91_add_device_i2c(0, icnova_i2c, ARRAY_SIZE(icnova_i2c));
++ /* LCD Controller */
++ gpio_request(AT91_PIN_PE1, "lcdc.mode");
++ gpio_direction_output(AT91_PIN_PE1, 1);
++ gpio_request(AT91_PIN_PE0, "lcdc.pwr");
++ gpio_direction_output(AT91_PIN_PE0, 0);
++
++ at91_add_device_lcdc(&ek_lcdc_data);
++ /* LEDs */
++ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
++}
++
++MACHINE_START(AT91SAM9G45EKES, "In-Circuit ICnova G45")
++ /* Maintainer: Atmel */
++ .phys_io = AT91_BASE_SYS,
++ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++ .boot_params = AT91_SDRAM_BASE + 0x100,
++ .timer = &at91sam926x_timer,
++ .map_io = ek_map_io,
++ .init_irq = ek_init_irq,
++ .init_machine = ek_board_init,
++MACHINE_END
+diff --git a/arch/arm/mach-at91/board-icnova_adb1002.c b/arch/arm/mach-at91/board-icnova_adb1002.c
+new file mode 100644
+index 0000000..2a81b45
+--- /dev/null
++++ b/arch/arm/mach-at91/board-icnova_adb1002.c
+@@ -0,0 +1,276 @@
++/*
++ * Board-specific setup code for the AT91SAM9M10G45 Evaluation Kit family
++ *
++ * Covers: * AT91SAM9G45-EKES board
++ * * AT91SAM9M10G45-EK board
++ *
++ * Copyright (C) 2009 Atmel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/fb.h>
++#include <linux/gpio_keys.h>
++#include <linux/input.h>
++#include <linux/leds.h>
++#include <linux/clk.h>
++
++#include <mach/hardware.h>
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <mach/hardware.h>
++#include <mach/board.h>
++#include <mach/gpio.h>
++#include <mach/at91sam9_smc.h>
++#include <mach/at91_shdwc.h>
++
++#include "sam9_smc.h"
++#include "generic.h"
++
++
++static void __init ek_map_io(void)
++{
++ /* Initialize processor: 12.000 MHz crystal */
++ at91sam9g45_initialize(12000000);
++
++ /* DGBU on ttyS0. (Rx & Tx only) */
++ at91_register_uart(0, 0, 0);
++
++ at91_register_uart(AT91SAM9G45_ID_US0, 1, 0);
++ at91_register_uart(AT91SAM9G45_ID_US1, 2, 0);
++ at91_register_uart(AT91SAM9G45_ID_US2, 3, 0);
++
++ /* set serial console to ttyS0 (ie, DBGU) */
++ at91_set_serial_console(0);
++}
++
++static void __init ek_init_irq(void)
++{
++ at91sam9g45_init_interrupts(NULL);
++}
++
++
++/*
++ * USB HS Host port (common to OHCI & EHCI)
++ */
++static struct at91_usbh_data __initdata ek_usbh_hs_data = {
++ .ports = 2,
++ .vbus_pin = {AT91_PIN_PC9, AT91_PIN_PC0, },
++};
++
++/*
++ * I2C devices
++ */
++static struct i2c_board_info icnova_i2c[] = {
++ {
++ .type = "m41t82",
++ .addr = 0x68,
++ },
++ {
++ .type = "tfp410",
++ .addr = 0x38,
++ },
++};
++
++/*
++ * MACB Ethernet device
++ */
++static struct at91_eth_data __initdata ek_macb_data = {
++ .phy_irq_pin = AT91_PIN_PC6,
++};
++
++
++/*
++ * NAND flash
++ */
++static struct mtd_partition __initdata ek_nand_partition[] = {
++ {
++ .name = "Kernel",
++ .offset = 0,
++ .size = SZ_2M,
++ },
++ {
++ .name = "Root",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = SZ_16M,
++ },
++ {
++ .name = "Data",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = MTDPART_SIZ_FULL,
++ },
++};
++
++static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
++{
++ *num_partitions = ARRAY_SIZE(ek_nand_partition);
++ return ek_nand_partition;
++}
++
++/* det_pin is not connected */
++static struct atmel_nand_data __initdata ek_nand_data = {
++ .ale = 21,
++ .cle = 22,
++ .rdy_pin = AT91_PIN_PC11,
++ .enable_pin = AT91_PIN_PC8,
++ .partition_info = nand_partitions,
++ .bus_width_16 = 0,
++};
++
++static struct sam9_smc_config __initdata ek_nand_smc_config = {
++ .ncs_read_setup = 0,
++ .nrd_setup = 10,
++ .ncs_write_setup = 0,
++ .nwe_setup = 10,
++
++ .ncs_read_pulse = 50,
++ .nrd_pulse = 30,
++ .ncs_write_pulse = 50,
++ .nwe_pulse = 30,
++
++ .read_cycle = 60,
++ .write_cycle = 60,
++
++ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
++ .tdf_cycles = 4,
++};
++
++static void __init ek_add_device_nand(void)
++{
++ /* configure chip-select 3 (NAND) */
++ sam9_smc_configure(3, &ek_nand_smc_config);
++
++ at91_add_device_nand(&ek_nand_data);
++}
++
++/*
++ * MCI (SD/MMC)
++ */
++static struct mci_platform_data __initdata ek_mmc_data = {
++ .slot[0] = {
++ .bus_width = 4,
++ .detect_pin = AT91_PIN_PD29,
++ }
++};
++
++
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++ /* 15 1024x768-75 VESA */
++ { "1024x768-75", 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
++ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++ FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
++ /* 16 1024x768-85 VESA */
++ { "1024x768-85", 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
++ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++ FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++ .manufacturer = "ET",
++ .monitor = "ET035009DH6",
++
++ .modedb = at91_tft_vga_modes,
++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
++ .hfmin = 10000,
++ .hfmax = 30000,
++ .vfmin = 50,
++ .vfmax = 80,
++};
++
++#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
++ | ATMEL_LCDC_DISTYPE_TFT \
++ | ATMEL_LCDC_INVCLK \
++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++ .lcdcon_is_backlight = true,
++ .default_bpp = 24,
++ .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
++ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
++ .default_monspecs = &at91fb_default_monspecs,
++ .guard_time = 9,
++ .lcd_wiring_mode = ATMEL_LCDC_WIRING_BGR,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++
++/*
++ * LEDs ... these could all be PWM-driven, for variable brightness
++ */
++static struct gpio_led ek_leds[] = {
++ {
++ .name = "pwr",
++ .gpio = AT91_PIN_PD28,
++ .default_trigger = "heartbeat",
++ },
++ {
++ .name = "LED1",
++ .gpio = AT91_PIN_PD30,
++ .default_trigger = "mmc0",
++ },
++};
++
++static void __init ek_board_init(void)
++{
++ /* Serial */
++ at91_add_device_serial();
++ /* USB HS Host */
++ at91_add_device_usbh_ehci(&ek_usbh_hs_data);
++ at91_add_device_usbh_ohci(&ek_usbh_hs_data);
++ /* USB HS Device */
++ at91_add_device_usba(NULL);
++ /* MMC */
++ at91_add_device_mci(0, &ek_mmc_data);
++ /* Ethernet */
++ at91_add_device_eth(&ek_macb_data);
++ /* NAND */
++ ek_add_device_nand();
++ /* I2C */
++ at91_add_device_i2c(0, icnova_i2c, ARRAY_SIZE(icnova_i2c));
++ /* LCD Controller */
++ gpio_request(AT91_PIN_PE1, "lcdc.mode");
++ gpio_direction_output(AT91_PIN_PE1, 1);
++ gpio_request(AT91_PIN_PE0, "lcdc.pwr");
++ gpio_direction_output(AT91_PIN_PE0, 0);
++
++ at91_add_device_lcdc(&ek_lcdc_data);
++ /* LEDs */
++ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
++}
++
++MACHINE_START(AT91SAM9G45EKES, "In-Circuit ICnova G45")
++ /* Maintainer: Atmel */
++ .phys_io = AT91_BASE_SYS,
++ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++ .boot_params = AT91_SDRAM_BASE + 0x100,
++ .timer = &at91sam926x_timer,
++ .map_io = ek_map_io,
++ .init_irq = ek_init_irq,
++ .init_machine = ek_board_init,
++MACHINE_END
+diff --git a/arch/arm/mach-at91/board-icnova_adb1004.c b/arch/arm/mach-at91/board-icnova_adb1004.c
+new file mode 100644
+index 0000000..60934db
+--- /dev/null
++++ b/arch/arm/mach-at91/board-icnova_adb1004.c
+@@ -0,0 +1,270 @@
++/*
++ * Board-specific setup code for the AT91SAM9M10G45 Evaluation Kit family
++ *
++ * Covers: * AT91SAM9G45-EKES board
++ * * AT91SAM9M10G45-EK board
++ *
++ * Copyright (C) 2009 Atmel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/fb.h>
++#include <linux/gpio_keys.h>
++#include <linux/input.h>
++#include <linux/leds.h>
++#include <linux/clk.h>
++
++#include <mach/hardware.h>
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <mach/hardware.h>
++#include <mach/board.h>
++#include <mach/gpio.h>
++#include <mach/at91sam9_smc.h>
++#include <mach/at91_shdwc.h>
++
++#include "sam9_smc.h"
++#include "generic.h"
++
++
++static void __init ek_map_io(void)
++{
++ /* Initialize processor: 12.000 MHz crystal */
++ at91sam9g45_initialize(12000000);
++
++ /* DGBU on ttyS0. (Rx & Tx only) */
++ at91_register_uart(0, 0, 0);
++
++ at91_register_uart(AT91SAM9G45_ID_US0, 1, 0);
++ at91_register_uart(AT91SAM9G45_ID_US1, 2, 0);
++ at91_register_uart(AT91SAM9G45_ID_US2, 3, 0);
++
++ /* set serial console to ttyS0 (ie, DBGU) */
++ at91_set_serial_console(0);
++}
++
++static void __init ek_init_irq(void)
++{
++ at91sam9g45_init_interrupts(NULL);
++}
++
++
++/*
++ * USB HS Host port (common to OHCI & EHCI)
++ */
++static struct at91_usbh_data __initdata ek_usbh_hs_data = {
++ .ports = 2,
++ .vbus_pin = {AT91_PIN_PC9, AT91_PIN_PC0, },
++};
++
++/*
++ * I2C devices
++ */
++static struct i2c_board_info icnova_i2c[] = {
++ {
++ .type = "m41t82",
++ .addr = 0x68,
++ },
++};
++
++/*
++ * SPI devices.
++ */
++
++static struct spi_board_info ek_spi_devices[] = {
++};
++
++
++/*
++ * NAND flash
++ */
++static struct mtd_partition __initdata ek_nand_partition[] = {
++ {
++ .name = "Kernel",
++ .offset = 0,
++ .size = SZ_2M,
++ },
++ {
++ .name = "Root",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = MTDPART_SIZ_FULL,
++ },
++};
++
++static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
++{
++ *num_partitions = ARRAY_SIZE(ek_nand_partition);
++ return ek_nand_partition;
++}
++
++/* det_pin is not connected */
++static struct atmel_nand_data __initdata ek_nand_data = {
++ .ale = 21,
++ .cle = 22,
++ .rdy_pin = AT91_PIN_PC11,
++ .enable_pin = AT91_PIN_PC8,
++ .partition_info = nand_partitions,
++ .bus_width_16 = 0,
++};
++
++static struct sam9_smc_config __initdata ek_nand_smc_config = {
++ .ncs_read_setup = 0,
++ .nrd_setup = 10,
++ .ncs_write_setup = 0,
++ .nwe_setup = 10,
++
++ .ncs_read_pulse = 50,
++ .nrd_pulse = 30,
++ .ncs_write_pulse = 50,
++ .nwe_pulse = 30,
++
++ .read_cycle = 60,
++ .write_cycle = 60,
++
++ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
++ .tdf_cycles = 4,
++};
++
++static void __init ek_add_device_nand(void)
++{
++ /* configure chip-select 3 (NAND) */
++ sam9_smc_configure(3, &ek_nand_smc_config);
++
++ at91_add_device_nand(&ek_nand_data);
++}
++
++/*
++ * MCI (SD/MMC)
++ */
++static struct mci_platform_data __initdata ek_mmc_data = {
++ .slot[0] = {
++ .bus_width = 4,
++ .detect_pin = AT91_PIN_PD29,
++ }
++};
++
++
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++ {
++ .name = "QVGA",
++ .refresh = 50,
++ .xres = 480, .yres = 272,
++ .pixclock = KHZ2PICOS(10000),
++
++ .left_margin = 43, .right_margin = 11,
++ .upper_margin = 22, .lower_margin = 6,
++ .hsync_len = 34, .vsync_len = 9,
++
++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++ .vmode = FB_VMODE_NONINTERLACED,
++ },
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++ .manufacturer = "ET",
++ .monitor = "ET035009DH6",
++
++ .modedb = at91_tft_vga_modes,
++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
++ .hfmin = 10000,
++ .hfmax = 40000,
++ .vfmin = 50,
++ .vfmax = 120,
++};
++
++#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
++ | ATMEL_LCDC_DISTYPE_TFT \
++ | ATMEL_LCDC_INVCLK \
++ | ATMEL_LCDC_INVDVAL \
++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++ .lcdcon_is_backlight = true,
++ .default_bpp = 24,
++ .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
++ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
++ .default_monspecs = &at91fb_default_monspecs,
++ .guard_time = 9,
++ .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++/*
++ * Touchscreen
++ */
++static struct at91_tsadcc_data ek_tsadcc_data = {
++ .adc_clock = 300000,
++ .pendet_debounce = 0x0d,
++ .ts_sample_hold_time = 0x0a,
++};
++
++
++static void __init ek_board_init(void)
++{
++ /* Serial */
++ at91_add_device_serial();
++ /* USB HS Host */
++ at91_add_device_usbh_ehci(&ek_usbh_hs_data);
++ at91_add_device_usbh_ohci(&ek_usbh_hs_data);
++ /* USB HS Device */
++ at91_add_device_usba(NULL);
++ /* SPI */
++ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
++ /* MMC */
++ at91_add_device_mci(0, &ek_mmc_data);
++ /* NAND */
++ ek_add_device_nand();
++ /* I2C */
++ at91_add_device_i2c(0, icnova_i2c, ARRAY_SIZE(icnova_i2c));
++ /* LCD Controller */
++ gpio_request(AT91_PIN_PB10, "lcdc.ud");
++ gpio_direction_output(AT91_PIN_PB10, 0);
++ gpio_request(AT91_PIN_PB11, "lcdc.lr");
++ gpio_direction_output(AT91_PIN_PB11, 0);
++ gpio_request(AT91_PIN_PE0, "lcdc.mode");
++ gpio_direction_output(AT91_PIN_PE0, 1);
++ gpio_request(AT91_PIN_PE1, "lcdc.pwr");
++ gpio_direction_output(AT91_PIN_PE1, 0);
++
++ at91_add_device_lcdc(&ek_lcdc_data);
++ /* Touch Screen */
++ at91_add_device_tsadcc(&ek_tsadcc_data);
++}
++
++MACHINE_START(AT91SAM9G45EKES, "In-Circuit ICnova G45")
++ /* Maintainer: Atmel */
++ .phys_io = AT91_BASE_SYS,
++ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++ .boot_params = AT91_SDRAM_BASE + 0x100,
++ .timer = &at91sam926x_timer,
++ .map_io = ek_map_io,
++ .init_irq = ek_init_irq,
++ .init_machine = ek_board_init,
++MACHINE_END
+diff --git a/arch/arm/mach-at91/board-icnova_adb3000.c b/arch/arm/mach-at91/board-icnova_adb3000.c
+new file mode 100644
+index 0000000..6006faa
+--- /dev/null
++++ b/arch/arm/mach-at91/board-icnova_adb3000.c
+@@ -0,0 +1,375 @@
++/*
++ * Board-specific setup code for the AT91SAM9M10G45 Evaluation Kit family
++ *
++ * Covers: * AT91SAM9G45-EKES board
++ * * AT91SAM9M10G45-EK board
++ *
++ * Copyright (C) 2009 Atmel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/ads7846.h>
++#include <linux/fb.h>
++#include <linux/gpio_keys.h>
++#include <linux/input.h>
++#include <linux/leds.h>
++#include <linux/clk.h>
++
++#include <mach/hardware.h>
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <mach/hardware.h>
++#include <mach/board.h>
++#include <mach/gpio.h>
++#include <mach/at91sam9_smc.h>
++#include <mach/at91_shdwc.h>
++
++#include "sam9_smc.h"
++#include "generic.h"
++
++#define FPGA_MEM_BASE 0x20000000
++
++static struct resource fpga_res = {
++ .start = FPGA_MEM_BASE,
++ .end = FPGA_MEM_BASE + SZ_1K - 1,
++ .flags = IORESOURCE_MEM,
++};
++
++static struct platform_device fpga_dev = {
++ .name = "fpga_sram",
++ .id = -1,
++ .dev = {
++ .platform_data = NULL,
++ },
++ .resource = &fpga_res,
++ .num_resources = 1,
++};
++
++static struct sam9_smc_config __initdata fpga_smc_config = {
++ .ncs_read_setup = 0,
++ .nrd_setup = 2,
++ .ncs_write_setup = 0,
++ .nwe_setup = 2,
++
++ .ncs_read_pulse = 10,
++ .nrd_pulse = 5,
++ .ncs_write_pulse = 10,
++ .nwe_pulse = 5,
++
++ .read_cycle = 12,
++ .write_cycle = 12,
++
++ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_32,
++ .tdf_cycles = 4,
++};
++
++
++static void __init ek_map_io(void)
++{
++ /* Initialize processor: 12.000 MHz crystal */
++ at91sam9g45_initialize(12000000);
++
++ /* DGBU on ttyS0. (Rx & Tx only) */
++ at91_register_uart(0, 0, 0);
++
++ at91_register_uart(AT91SAM9G45_ID_US0, 1, 0);
++ at91_register_uart(AT91SAM9G45_ID_US1, 2, 0);
++ at91_register_uart(AT91SAM9G45_ID_US2, 3, 0);
++ at91_register_uart(AT91SAM9G45_ID_US3, 4, 0);
++
++ /* set serial console to ttyS0 (ie, DBGU) */
++ at91_set_serial_console(0);
++}
++
++static void __init ek_init_irq(void)
++{
++ at91sam9g45_init_interrupts(NULL);
++}
++
++
++/*
++ * USB HS Host port (common to OHCI & EHCI)
++ */
++static struct at91_usbh_data __initdata ek_usbh_hs_data = {
++ .ports = 2,
++ .vbus_pin = {AT91_PIN_PC9, AT91_PIN_PC0, },
++};
++
++/*
++ * I2C devices
++ */
++static struct i2c_board_info icnova_i2c[] = {
++};
++
++/*
++ * SPI devices.
++ */
++
++static struct spi_board_info ek_spi_devices[] = {
++};
++
++
++/*
++ * MACB Ethernet device
++ */
++static struct at91_eth_data __initdata ek_macb_data = {
++ .phy_irq_pin = AT91_PIN_PC6,
++};
++
++
++/*
++ * NAND flash
++ */
++static struct mtd_partition __initdata ek_nand_partition[] = {
++ {
++ .name = "Kernel",
++ .offset = 0,
++ .size = SZ_2M,
++ },
++ {
++ .name = "Root",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = SZ_16M,
++ },
++ {
++ .name = "Data",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = MTDPART_SIZ_FULL,
++ },
++};
++
++static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
++{
++ *num_partitions = ARRAY_SIZE(ek_nand_partition);
++ return ek_nand_partition;
++}
++
++/* det_pin is not connected */
++static struct atmel_nand_data __initdata ek_nand_data = {
++ .ale = 21,
++ .cle = 22,
++ .rdy_pin = AT91_PIN_PC11,
++ .enable_pin = AT91_PIN_PC8,
++ .partition_info = nand_partitions,
++ .bus_width_16 = 0,
++};
++
++static struct sam9_smc_config __initdata ek_nand_smc_config = {
++ .ncs_read_setup = 0,
++ .nrd_setup = 10,
++ .ncs_write_setup = 0,
++ .nwe_setup = 10,
++
++ .ncs_read_pulse = 50,
++ .nrd_pulse = 30,
++ .ncs_write_pulse = 50,
++ .nwe_pulse = 30,
++
++ .read_cycle = 60,
++ .write_cycle = 60,
++
++ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
++ .tdf_cycles = 4,
++};
++
++static void __init ek_add_device_nand(void)
++{
++ /* configure chip-select 3 (NAND) */
++ sam9_smc_configure(3, &ek_nand_smc_config);
++
++ at91_add_device_nand(&ek_nand_data);
++}
++
++/*
++ * MCI (SD/MMC)
++ */
++static struct mci_platform_data __initdata ek_mmc_data = {
++ .slot[0] = {
++ .bus_width = 4,
++ .detect_pin = AT91_PIN_PD5,
++ }
++};
++
++
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++ {
++ .name = "VGA",
++ .refresh = 50,
++ .xres = 800, .yres = 480,
++ .pixclock = KHZ2PICOS(33260),
++
++ .left_margin = 128, .right_margin = 88,
++ .upper_margin = 27, .lower_margin = 16,
++ .hsync_len = 40, .vsync_len = 2,
++
++ .vmode = FB_VMODE_NONINTERLACED,
++ },
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++ .manufacturer = "ET",
++ .monitor = "ET050000DH6",
++
++ .modedb = at91_tft_vga_modes,
++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
++ .hfmin = 10000,
++ .hfmax = 30000,
++ .vfmin = 50,
++ .vfmax = 80,
++};
++
++#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
++ | ATMEL_LCDC_DISTYPE_TFT \
++ | ATMEL_LCDC_INVCLK \
++ | ATMEL_LCDC_INVDVAL \
++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++ .lcdcon_is_backlight = true,
++ .default_bpp = 24,
++ .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
++ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
++ .default_monspecs = &at91fb_default_monspecs,
++ .guard_time = 9,
++ .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++
++/*
++ * Touchscreen
++ */
++static struct at91_tsadcc_data ek_tsadcc_data = {
++ .adc_clock = 300000,
++ .pendet_debounce = 0x0d,
++ .ts_sample_hold_time = 0x0a,
++};
++
++/*
++ * LEDs
++ */
++static struct gpio_led ek_leds[] = {
++ {
++ .name = "LED1",
++ .gpio = AT91_PIN_PD28,
++ .default_trigger = "heartbeat",
++ },
++ {
++ .name = "LED2",
++ .gpio = AT91_PIN_PD30,
++ .default_trigger = "nand-disk",
++ },
++ {
++ .name = "LED3",
++ .gpio = AT91_PIN_PD31,
++ .default_trigger = "mmc0",
++ },
++ {
++ .name = "LED4",
++ .gpio = AT91_PIN_PE31,
++ },
++};
++
++
++static void __init ek_board_init(void)
++{
++ /* Serial */
++ at91_add_device_serial();
++ /* FPGA */
++ at91_set_gpio_input(AT91_PIN_PC7, 0);
++ at91_set_gpio_input(AT91_PIN_PC10, 0);
++ at91_set_gpio_input(AT91_PIN_PC12, 0);
++ at91_set_gpio_input(AT91_PIN_PA31, 0);
++ at91_set_gpio_input(AT91_PIN_PD10, 0);
++ at91_set_gpio_input(AT91_PIN_PD11, 0);
++ at91_set_gpio_input(AT91_PIN_PD12, 0);
++ at91_set_gpio_input(AT91_PIN_PD13, 0);
++ at91_set_gpio_input(AT91_PIN_PD14, 0);
++ at91_set_gpio_input(AT91_PIN_PD15, 0);
++ at91_set_gpio_output(AT91_PIN_PD29, 1);
++ at91_set_A_periph(AT91_PIN_PC16, 0);
++ at91_set_A_periph(AT91_PIN_PC17, 0);
++ at91_set_A_periph(AT91_PIN_PC18, 0);
++ at91_set_A_periph(AT91_PIN_PC19, 0);
++ at91_set_A_periph(AT91_PIN_PC20, 0);
++ at91_set_A_periph(AT91_PIN_PC21, 0);
++ at91_set_A_periph(AT91_PIN_PC22, 0);
++ at91_set_A_periph(AT91_PIN_PC23, 0);
++ at91_set_A_periph(AT91_PIN_PC24, 0);
++ at91_set_A_periph(AT91_PIN_PC25, 0);
++ at91_set_A_periph(AT91_PIN_PC26, 0);
++ at91_set_A_periph(AT91_PIN_PC27, 0);
++ at91_set_A_periph(AT91_PIN_PC28, 0);
++ at91_set_A_periph(AT91_PIN_PC29, 0);
++ at91_set_A_periph(AT91_PIN_PC30, 0);
++ at91_set_A_periph(AT91_PIN_PC31, 0);
++ /* USB HS Host */
++ at91_add_device_usbh_ehci(&ek_usbh_hs_data);
++ at91_add_device_usbh_ohci(&ek_usbh_hs_data);
++ /* USB HS Device */
++ at91_add_device_usba(NULL);
++ /* SPI */
++ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
++ /* MMC */
++ at91_add_device_mci(0, &ek_mmc_data);
++ /* Ethernet */
++ at91_add_device_eth(&ek_macb_data);
++ /* NAND */
++ ek_add_device_nand();
++ /* I2C */
++ at91_add_device_i2c(0, icnova_i2c, ARRAY_SIZE(icnova_i2c));
++ /* LCD Controller */
++ gpio_request(AT91_PIN_PE1, "lcdc.mode");
++ gpio_direction_output(AT91_PIN_PE1, 1);
++ gpio_request(AT91_PIN_PE0, "lcdc.pwr");
++ gpio_direction_output(AT91_PIN_PE0, 1);
++ gpio_request(AT91_PIN_PE6, "lcdc.enb");
++ gpio_direction_output(AT91_PIN_PE6, 1);
++
++ at91_add_device_lcdc(&ek_lcdc_data);
++ /* Touch Screen */
++ at91_add_device_tsadcc(&ek_tsadcc_data);
++ /* LEDs */
++ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
++ /* FPGA-Interface */
++ sam9_smc_configure(1, &fpga_smc_config);
++ platform_device_register(&fpga_dev);
++}
++
++MACHINE_START(AT91SAM9G45EKES, "In-Circuit ICnova G45")
++ /* Maintainer: Atmel */
++ .phys_io = AT91_BASE_SYS,
++ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++ .boot_params = AT91_SDRAM_BASE + 0x100,
++ .timer = &at91sam926x_timer,
++ .map_io = ek_map_io,
++ .init_irq = ek_init_irq,
++ .init_machine = ek_board_init,
++MACHINE_END
+--
+1.7.3.3
+
--- /dev/null
+From f49b7c1f79472aa88dcfd2ff7d892a29953d0918 Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 13:56:13 +0100
+Subject: [PATCH 06/18] [ICnova] Add support for ADB1004revB and 5In Displays
+
+It is now possible to change between an 5In Display and default
+Display in menuconfig, if the board supports it.
+
+The Changes on ADB1004 Revision B are merged now, too.
+---
+ arch/arm/mach-at91/Kconfig | 10 +++
+ arch/arm/mach-at91/at91sam9g45_devices.c | 2 +
+ arch/arm/mach-at91/board-icnova_adb1000.c | 25 ++++++++
+ arch/arm/mach-at91/board-icnova_adb1004.c | 90 ++++++++++++++++++++++++++---
+ 4 files changed, 119 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
+index bc1221d..3c984e1 100644
+--- a/arch/arm/mach-at91/Kconfig
++++ b/arch/arm/mach-at91/Kconfig
+@@ -397,6 +397,16 @@ config MACH_ICNOVA_ADB3000
+
+ endif
+
++config ICNOVA_ET050000
++ depends on MACH_ICNOVA_ADB1000 || MACH_ICNOVA_ADB1004
++ bool "5Inch Display ET050000DH6"
++ help
++ Select this if you have a 5" Display connected to your Board.
++
++config ICNOVA_ADB1004B
++ depends on MACH_ICNOVA_ADB1004
++ bool "ADB1004 is Revision B"
++
+ # ----------------------------------------------------------
+
+ if ARCH_AT91CAP9
+diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
+index c40e4cd..0f9955f 100644
+--- a/arch/arm/mach-at91/at91sam9g45_devices.c
++++ b/arch/arm/mach-at91/at91sam9g45_devices.c
+@@ -918,9 +918,11 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
+ at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
+ #ifndef CONFIG_MACH_ICNOVA_ADB1004
+ #ifndef CONFIG_MACH_ICNOVA_ADB3000
++#ifndef CONFIG_ICNOVA_ET050000
+ at91_set_A_periph(AT91_PIN_PE6, 0); /* LCDDEN */
+ #endif
+ #endif
++#endif
+ at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
+ at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
+ at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
+diff --git a/arch/arm/mach-at91/board-icnova_adb1000.c b/arch/arm/mach-at91/board-icnova_adb1000.c
+index d07a5c2..b292acf 100644
+--- a/arch/arm/mach-at91/board-icnova_adb1000.c
++++ b/arch/arm/mach-at91/board-icnova_adb1000.c
+@@ -206,6 +206,20 @@ static struct mci_platform_data __initdata ek_mmc_data = {
+ */
+ #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+ static struct fb_videomode at91_tft_vga_modes[] = {
++#ifdef CONFIG_ICNOVA_ET050000
++ {
++ .name = "VGA",
++ .refresh = 50,
++ .xres = 800, .yres = 480,
++ .pixclock = KHZ2PICOS(33260),
++
++ .left_margin = 178, .right_margin = 38,
++ .upper_margin = 35, .lower_margin = 8,
++ .hsync_len = 40, .vsync_len = 2,
++
++ .vmode = FB_VMODE_NONINTERLACED,
++ }
++#else
+ {
+ .name = "QVGA",
+ .refresh = 50,
+@@ -219,11 +233,16 @@ static struct fb_videomode at91_tft_vga_modes[] = {
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .vmode = FB_VMODE_NONINTERLACED,
+ },
++#endif
+ };
+
+ static struct fb_monspecs at91fb_default_monspecs = {
+ .manufacturer = "ET",
++#ifdef CONFIG_ICNOVA_ET050000
++ .monitor = "ET050000DH6",
++#else
+ .monitor = "ET035009DH6",
++#endif
+
+ .modedb = at91_tft_vga_modes,
+ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
+@@ -309,7 +328,13 @@ static void __init ek_board_init(void)
+ gpio_request(AT91_PIN_PE1, "lcdc.mode");
+ gpio_direction_output(AT91_PIN_PE1, 1);
+ gpio_request(AT91_PIN_PE0, "lcdc.pwr");
++#ifdef CONFIG_ICNOVA_ET050000
++ gpio_direction_output(AT91_PIN_PE0, 1);
++ gpio_request(AT91_PIN_PE1, "lcdc.enb");
++ gpio_direction_output(AT91_PIN_PE6, 1);
++#else
+ gpio_direction_output(AT91_PIN_PE0, 0);
++#endif
+
+ at91_add_device_lcdc(&ek_lcdc_data);
+ /* LEDs */
+diff --git a/arch/arm/mach-at91/board-icnova_adb1004.c b/arch/arm/mach-at91/board-icnova_adb1004.c
+index 60934db..ffb4eba 100644
+--- a/arch/arm/mach-at91/board-icnova_adb1004.c
++++ b/arch/arm/mach-at91/board-icnova_adb1004.c
+@@ -19,6 +19,9 @@
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/spi/spi.h>
++#ifdef CONFIG_ICNOVA_ADB1004B
++#include <linux/spi/ads7846.h>
++#endif
+ #include <linux/fb.h>
+ #include <linux/gpio_keys.h>
+ #include <linux/input.h>
+@@ -54,9 +57,11 @@ static void __init ek_map_io(void)
+ /* DGBU on ttyS0. (Rx & Tx only) */
+ at91_register_uart(0, 0, 0);
+
++ // For RS485 you might enable ATMEL_UART_RTS instead of 0
+ at91_register_uart(AT91SAM9G45_ID_US0, 1, 0);
+ at91_register_uart(AT91SAM9G45_ID_US1, 2, 0);
+ at91_register_uart(AT91SAM9G45_ID_US2, 3, 0);
++ //at91_register_uart(AT91SAM9G45_ID_US3, 4, 0);
+
+ /* set serial console to ttyS0 (ie, DBGU) */
+ at91_set_serial_console(0);
+@@ -90,7 +95,40 @@ static struct i2c_board_info icnova_i2c[] = {
+ * SPI devices.
+ */
+
++#ifdef CONFIG_ICNOVA_ADB1004B
++#define CONFIG_BOARD_ICNOVA_ADS7846_IRQ AT91_PIN_PB17
++#define CONFIG_BOARD_ICNOVA_ADS7846_CS 2
++static struct ads7846_platform_data ads_info = {
++ .model = 7846,
++ .vref_delay_usecs = 100,
++ .gpio_pendown = CONFIG_BOARD_ICNOVA_ADS7846_IRQ,
++ .x_min = 330,
++ .y_min = 3700,
++ .x_max = 3700,
++ .y_max = 330,
++ .settle_delay_usecs = 50,
++};
++#endif
++
+ static struct spi_board_info ek_spi_devices[] = {
++#ifdef CONFIG_ICNOVA_ADB1004B
++ {
++ .modalias = "ads7846",
++ .max_speed_hz = 125000 * 26,
++ .chip_select = CONFIG_BOARD_ICNOVA_ADS7846_CS,
++ .platform_data = &ads_info,
++ .bus_num = 0,
++ .controller_data = (void *) AT91_PIN_PD25,
++ },
++#endif
++};
++
++
++/*
++ * MACB Ethernet device
++ */
++static struct at91_eth_data __initdata ek_macb_data = {
++ .phy_irq_pin = AT91_PIN_PC6,
+ };
+
+
+@@ -159,6 +197,9 @@ static struct mci_platform_data __initdata ek_mmc_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = AT91_PIN_PD29,
++#ifdef CONFIG_ICNOVA_ADB1004B
++ .wp_pin = AT91_PIN_PD5,
++#endif
+ }
+ };
+
+@@ -168,6 +209,20 @@ static struct mci_platform_data __initdata ek_mmc_data = {
+ */
+ #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+ static struct fb_videomode at91_tft_vga_modes[] = {
++#ifdef CONFIG_ICNOVA_ET050000
++ {
++ .name = "VGA",
++ .refresh = 50,
++ .xres = 800, .yres = 480,
++ .pixclock = KHZ2PICOS(33260),
++
++ .left_margin = 178, .right_margin = 38,
++ .upper_margin = 35, .lower_margin = 8,
++ .hsync_len = 40, .vsync_len = 2,
++
++ .vmode = FB_VMODE_NONINTERLACED,
++ },
++#else
+ {
+ .name = "QVGA",
+ .refresh = 50,
+@@ -181,11 +236,16 @@ static struct fb_videomode at91_tft_vga_modes[] = {
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .vmode = FB_VMODE_NONINTERLACED,
+ },
++#endif
+ };
+
+ static struct fb_monspecs at91fb_default_monspecs = {
+ .manufacturer = "ET",
++#ifdef CONFIG_ICNOVA_ET050000
++ .monitor = "ET050000DH6",
++#else
+ .monitor = "ET035009DH6",
++#endif
+
+ .modedb = at91_tft_vga_modes,
+ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
+@@ -219,12 +279,13 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
+ /*
+ * Touchscreen
+ */
++#ifndef CONFIG_ICNOVA_ADB1004B
+ static struct at91_tsadcc_data ek_tsadcc_data = {
+- .adc_clock = 300000,
+- .pendet_debounce = 0x0d,
+- .ts_sample_hold_time = 0x0a,
++ .adc_clock = 200000,
++ .pendet_debounce = 0x02,
++ .ts_sample_hold_time = 0x0f,
+ };
+-
++#endif
+
+ static void __init ek_board_init(void)
+ {
+@@ -236,26 +297,39 @@ static void __init ek_board_init(void)
+ /* USB HS Device */
+ at91_add_device_usba(NULL);
+ /* SPI */
++#ifdef CONFIG_ICNOVA_ADB1004B
++ ek_spi_devices[0].irq = gpio_to_irq(CONFIG_BOARD_ICNOVA_ADS7846_IRQ),
++#endif
+ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
+ /* MMC */
+ at91_add_device_mci(0, &ek_mmc_data);
++ /* Ethernet */
++ at91_add_device_eth(&ek_macb_data);
+ /* NAND */
+ ek_add_device_nand();
+ /* I2C */
+ at91_add_device_i2c(0, icnova_i2c, ARRAY_SIZE(icnova_i2c));
+ /* LCD Controller */
++ gpio_request(AT91_PIN_PE0, "lcdc.pwr");
++#ifdef CONFIG_ICNOVA_ET050000
++ gpio_direction_output(AT91_PIN_PE0, 1);
++ gpio_request(AT91_PIN_PE6, "lcdc.enb");
++ gpio_direction_output(AT91_PIN_PE6, 1);
++#else
++ gpio_direction_output(AT91_PIN_PE0, 0);
+ gpio_request(AT91_PIN_PB10, "lcdc.ud");
+ gpio_direction_output(AT91_PIN_PB10, 0);
+ gpio_request(AT91_PIN_PB11, "lcdc.lr");
+ gpio_direction_output(AT91_PIN_PB11, 0);
+- gpio_request(AT91_PIN_PE0, "lcdc.mode");
+- gpio_direction_output(AT91_PIN_PE0, 1);
+- gpio_request(AT91_PIN_PE1, "lcdc.pwr");
+- gpio_direction_output(AT91_PIN_PE1, 0);
++#endif
++ gpio_request(AT91_PIN_PE1, "lcdc.mode");
++ gpio_direction_output(AT91_PIN_PE1, 1);
+
+ at91_add_device_lcdc(&ek_lcdc_data);
++#ifndef CONFIG_ICNOVA_ADB1004B
+ /* Touch Screen */
+ at91_add_device_tsadcc(&ek_tsadcc_data);
++#endif
+ }
+
+ MACHINE_START(AT91SAM9G45EKES, "In-Circuit ICnova G45")
+--
+1.7.3.3
+
--- /dev/null
+From e301c6a08d806a0afe79681c5ff55282def3f0ba Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 13:57:22 +0100
+Subject: [PATCH 07/18] [atmel_tsadcc] adding support for pressure-measurement
+
+Needed for a properly working tslib.
+---
+ drivers/input/touchscreen/atmel_tsadcc.c | 123 ++++++++++++++++++++----------
+ 1 files changed, 84 insertions(+), 39 deletions(-)
+
+diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c
+index 3d9b516..722fba5 100644
+--- a/drivers/input/touchscreen/atmel_tsadcc.c
++++ b/drivers/input/touchscreen/atmel_tsadcc.c
+@@ -12,6 +12,7 @@
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
++#define DEBUG
+ #include <linux/init.h>
+ #include <linux/err.h>
+ #include <linux/kernel.h>
+@@ -25,6 +26,8 @@
+ #include <mach/board.h>
+ #include <mach/cpu.h>
+
++#define CONFIG_ATMEL_TSADCC_PRESS 1
++
+ /* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */
+
+ #define ATMEL_TSADCC_CR 0x00 /* Control register */
+@@ -74,6 +77,9 @@
+ #define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */
+ #define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */
+ #define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */
++#define ATMEL_TSADCC_EOCXP (1 << 24) /* End of conversion Xposition */
++#define ATMEL_TSADCC_EOCZ1 (1 << 25) /* End of conversion Z1 */
++#define ATMEL_TSADCC_EOCZ2 (1 << 26) /* End of conversion Z2 */
+
+ #define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */
+ #define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */
+@@ -103,6 +109,7 @@ struct atmel_tsadcc {
+ int irq;
+ unsigned int prev_absx;
+ unsigned int prev_absy;
++ unsigned int prev_press;
+ unsigned char bufferedmeasure;
+ };
+
+@@ -110,6 +117,47 @@ static void __iomem *tsc_base;
+
+ #define atmel_tsadcc_read(reg) __raw_readl(tsc_base + (reg))
+ #define atmel_tsadcc_write(reg, val) __raw_writel((val), tsc_base + (reg))
++#ifdef CONFIG_ATMEL_TSADCC_PRESS
++#define ATMEL_TSADCC_IRQ_MASK \
++ (ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_EOC(1) | ATMEL_TSADCC_EOCXP | ATMEL_TSADCC_NOCNT)
++#else
++#define ATMEL_TSADCC_IRQ_MASK \
++ (ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_EOC(1) | ATMEL_TSADCC_NOCNT)
++#endif
++
++
++static inline void atmel_tsadcc_irq_nocnt(struct input_dev *input_dev) {
++ unsigned int reg;
++ /* Contact lost */
++ reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC;
++
++ atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
++ atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
++ atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_IRQ_MASK);
++ atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
++
++ input_report_abs(input_dev, ABS_PRESSURE, 0);
++ input_report_key(input_dev, BTN_TOUCH, 0);
++ input_sync(input_dev);
++ return;
++}
++
++static inline void atmel_tsadcc_irq_pencnt(struct input_dev *input_dev) {
++ unsigned int reg;
++ /* Pen detected */
++ reg = atmel_tsadcc_read(ATMEL_TSADCC_MR);
++ reg &= ~ATMEL_TSADCC_PENDBC;
++
++ atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT);
++ atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
++ atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_IRQ_MASK);
++ atmel_tsadcc_write(ATMEL_TSADCC_TRGR,
++ ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16));
++ return;
++}
++
++#define atmel_tsadcc_irq_posresult(reg0, reg1) \
++ ((atmel_tsadcc_read(reg1) << 10) / atmel_tsadcc_read(reg0))
+
+ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
+ {
+@@ -117,59 +165,48 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
+ struct input_dev *input_dev = ts_dev->input;
+
+ unsigned int status;
+- unsigned int reg;
++
++ unsigned int z1, z2, xp;
+
+ status = atmel_tsadcc_read(ATMEL_TSADCC_SR);
+ status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR);
+
+ if (status & ATMEL_TSADCC_NOCNT) {
+- /* Contact lost */
+- reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC;
+-
+- atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
+- atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
+- atmel_tsadcc_write(ATMEL_TSADCC_IDR,
+- ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
+- atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
+-
+- input_report_key(input_dev, BTN_TOUCH, 0);
++ atmel_tsadcc_irq_nocnt(input_dev);
+ ts_dev->bufferedmeasure = 0;
+- input_sync(input_dev);
+-
++ pr_debug("no contact\n");
+ } else if (status & ATMEL_TSADCC_PENCNT) {
+- /* Pen detected */
+- reg = atmel_tsadcc_read(ATMEL_TSADCC_MR);
+- reg &= ~ATMEL_TSADCC_PENDBC;
+-
+- atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT);
+- atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
+- atmel_tsadcc_write(ATMEL_TSADCC_IER,
+- ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
+- atmel_tsadcc_write(ATMEL_TSADCC_TRGR,
+- ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16));
+-
++ atmel_tsadcc_irq_pencnt(input_dev);
++ pr_debug("contact\n");
++#ifdef CONFIG_ATMEL_TSADCC_PRESS
++ } else if (status & ATMEL_TSADCC_EOCXP) {
++ z1 = atmel_tsadcc_read(ATMEL_TSADCC_Z1DAT);
++ z2 = atmel_tsadcc_read(ATMEL_TSADCC_Z2DAT);
++ xp = atmel_tsadcc_read(ATMEL_TSADCC_XPOS);
++ pr_debug("z = %i/%i*%i\n", z2, z1, xp);
++ ts_dev->prev_press = ((z2 - z1) * xp)/z1;
++#endif
++ } else if (status & ATMEL_TSADCC_EOC(1)) {
++ ts_dev->prev_absy = atmel_tsadcc_irq_posresult(
++ ATMEL_TSADCC_CDR0, ATMEL_TSADCC_CDR1);
+ } else if (status & ATMEL_TSADCC_EOC(3)) {
+- /* Conversion finished */
+-
+- if (ts_dev->bufferedmeasure) {
++ ts_dev->prev_absx = atmel_tsadcc_irq_posresult(
++ ATMEL_TSADCC_CDR2, ATMEL_TSADCC_CDR3);
++ //if (ts_dev->bufferedmeasure) {
+ /* Last measurement is always discarded, since it can
+ * be erroneous.
+ * Always report previous measurement */
++ pr_debug("send x=%i, y=%i, z=%i\n", ts_dev->prev_absx,
++ ts_dev->prev_absy, ts_dev->prev_press);
+ input_report_abs(input_dev, ABS_X, ts_dev->prev_absx);
+ input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy);
++ input_report_abs(input_dev, ABS_PRESSURE,
++ 3072 - ts_dev->prev_press);
+ input_report_key(input_dev, BTN_TOUCH, 1);
+ input_sync(input_dev);
+- } else
+- ts_dev->bufferedmeasure = 1;
+-
+- /* Now make new measurement */
+- ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10;
+- ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2);
+-
+- ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10;
+- ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0);
++ //} else
++ // ts_dev->bufferedmeasure = 1;
+ }
+-
+ return IRQ_HANDLED;
+ }
+
+@@ -254,8 +291,11 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev)
+ input_dev->dev.parent = &pdev->dev;
+
+ __set_bit(EV_ABS, input_dev->evbit);
++ __set_bit(EV_KEY, input_dev->evbit);
++ input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
+ input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0);
+ input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0);
++ input_set_abs_params(input_dev, ABS_PRESSURE, 0, 3072, 0, 0);
+
+ input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
+
+@@ -284,9 +324,14 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev)
+
+ dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc);
+
++ ts_dev->prev_press = 1024;
++
+ reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE |
+- ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */
+- ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */
++ // (ATMEL_TSADCC_SLEEP) |
++#ifdef CONFIG_ATMEL_TSADCC_PRESS
++ (ATMEL_TSADCC_PRES) |
++#endif
++ (ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */
+ (prsc << 8) |
+ ((0x26 << 16) & ATMEL_TSADCC_STARTUP) |
+ ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC);
+--
+1.7.3.3
+
--- /dev/null
+From 68cb211d548457278f6d5f16eb6a42bb4d67a024 Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 13:58:30 +0100
+Subject: [PATCH 08/18] [atmel_serial] adding support for RS485
+
+---
+ arch/arm/include/asm/ioctls.h | 3 +
+ drivers/serial/atmel_serial.c | 238 +++++++++++++++++++++++++++++++++++------
+ include/linux/atmel_serial.h | 5 +
+ 3 files changed, 211 insertions(+), 35 deletions(-)
+
+diff --git a/arch/arm/include/asm/ioctls.h b/arch/arm/include/asm/ioctls.h
+index a91d8a1..7f0b6d1 100644
+--- a/arch/arm/include/asm/ioctls.h
++++ b/arch/arm/include/asm/ioctls.h
+@@ -53,6 +53,9 @@
+ #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
+ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
+
++#define TIOCGRS485 0x542E
++#define TIOCSRS485 0x542F
++
+ #define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
+ #define FIOCLEX 0x5451
+ #define FIOASYNC 0x5452
+diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
+index 9d948bc..23f201f 100644
+--- a/drivers/serial/atmel_serial.c
++++ b/drivers/serial/atmel_serial.c
+@@ -38,12 +38,15 @@
+ #include <linux/dma-mapping.h>
+ #include <linux/atmel_pdc.h>
+ #include <linux/atmel_serial.h>
++#include <linux/uaccess.h>
+
+ #include <asm/io.h>
+
+ #include <asm/mach/serial_at91.h>
+ #include <mach/board.h>
+
++#include <asm/gpio.h>
++
+ #ifdef CONFIG_ARM
+ #include <mach/cpu.h>
+ #include <mach/gpio.h>
+@@ -59,6 +62,9 @@
+
+ #include <linux/serial_core.h>
+
++static void atmel_start_rx(struct uart_port *port);
++static void atmel_stop_rx(struct uart_port *port);
++
+ #ifdef CONFIG_SERIAL_ATMEL_TTYAT
+
+ /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
+@@ -93,6 +99,7 @@
+ #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
+ #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
+ #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
++#define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
+
+ /* PDC registers */
+ #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
+@@ -147,6 +154,12 @@ struct atmel_uart_port {
+ unsigned int irq_status_prev;
+
+ struct circ_buf rx_ring;
++
++ struct serial_rs485 rs485; /* rs485 settings */
++ unsigned int tx_done_mask;
++
++ int txe_gpio;
++ int active_low;
+ };
+
+ static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
+@@ -187,6 +200,49 @@ static bool atmel_use_dma_tx(struct uart_port *port)
+ }
+ #endif
+
++static void atmel_txe(struct uart_port *port, int onoff) {
++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
++ if(!gpio_is_valid(atmel_port->txe_gpio))
++ return;
++ if(atmel_port->active_low)
++ onoff = !onoff;
++ gpio_set_value(atmel_port->txe_gpio, onoff);
++}
++
++/* Enable or disable the rs485 support */
++void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
++{
++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
++ unsigned long flags;
++ unsigned int mode;
++
++ spin_lock_irqsave(&port->lock, flags);
++
++ mode = UART_GET_MR(port);
++
++ /* Resetting serial mode to RS232 (0x0) */
++ mode &= ~ATMEL_US_USMODE;
++
++ atmel_port->rs485 = *rs485conf;
++
++ if (rs485conf->flags & SER_RS485_ENABLED) {
++ dev_dbg(port->dev, "Setting UART to RS485\n");
++ atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
++ UART_PUT_TTGR(port, rs485conf->delay_rts_before_send);
++ mode |= ATMEL_US_USMODE_RS485;
++ } else {
++ dev_dbg(port->dev, "Setting UART to RS232\n");
++ if (atmel_use_dma_tx(port))
++ atmel_port->tx_done_mask = ATMEL_US_ENDTX |
++ ATMEL_US_TXBUFE;
++ else
++ atmel_port->tx_done_mask = ATMEL_US_TXRDY;
++ }
++ UART_PUT_MR(port, mode);
++
++ spin_unlock_irqrestore(&port->lock, flags);
++}
++
+ /*
+ * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
+ */
+@@ -202,6 +258,7 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
+ {
+ unsigned int control = 0;
+ unsigned int mode;
++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+
+ #ifdef CONFIG_ARCH_AT91RM9200
+ if (cpu_is_at91rm9200()) {
+@@ -236,6 +293,17 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
+ mode |= ATMEL_US_CHMODE_LOC_LOOP;
+ else
+ mode |= ATMEL_US_CHMODE_NORMAL;
++
++ /* Resetting serial mode to RS232 (0x0) */
++ mode &= ~ATMEL_US_USMODE;
++
++ if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
++ dev_dbg(port->dev, "Setting UART to RS485\n");
++ UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send);
++ mode |= ATMEL_US_USMODE_RS485;
++ } else {
++ dev_dbg(port->dev, "Setting UART to RS232\n");
++ }
+ UART_PUT_MR(port, mode);
+ }
+
+@@ -268,12 +336,17 @@ static u_int atmel_get_mctrl(struct uart_port *port)
+ */
+ static void atmel_stop_tx(struct uart_port *port)
+ {
++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
++
+ if (atmel_use_dma_tx(port)) {
+ /* disable PDC transmit */
+ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
+- UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
+- } else
+- UART_PUT_IDR(port, ATMEL_US_TXRDY);
++ }
++ /* Disable interrupts */
++ UART_PUT_IDR(port, atmel_port->tx_done_mask);
++
++ if (atmel_port->rs485.flags & SER_RS485_ENABLED)
++ atmel_start_rx(port);
+ }
+
+ /*
+@@ -281,17 +354,41 @@ static void atmel_stop_tx(struct uart_port *port)
+ */
+ static void atmel_start_tx(struct uart_port *port)
+ {
++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
++
+ if (atmel_use_dma_tx(port)) {
+ if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
+ /* The transmitter is already running. Yes, we
+ really need this.*/
+ return;
+
+- UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
++ if (atmel_port->rs485.flags & SER_RS485_ENABLED)
++ atmel_stop_rx(port);
++
+ /* re-enable PDC transmit */
+ UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
+- } else
+- UART_PUT_IER(port, ATMEL_US_TXRDY);
++ }
++ /* Enable interrupts */
++ UART_PUT_IER(port, atmel_port->tx_done_mask);
++ atmel_txe(port, 1);
++}
++
++
++/*
++ * start receiving - port is in process of being opened.
++ */
++static void atmel_start_rx(struct uart_port *port)
++{
++ UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
++
++ if (atmel_use_dma_rx(port)) {
++ /* enable PDC controller */
++ UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
++ port->read_status_mask);
++ UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
++ } else {
++ UART_PUT_IER(port, ATMEL_US_RXRDY);
++ }
+ }
+
+ /*
+@@ -302,9 +399,12 @@ static void atmel_stop_rx(struct uart_port *port)
+ if (atmel_use_dma_rx(port)) {
+ /* disable PDC receive */
+ UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
+- UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
+- } else
++ UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
++ port->read_status_mask);
++ } else {
+ UART_PUT_IDR(port, ATMEL_US_RXRDY);
++ }
++ atmel_txe(port, 1);
+ }
+
+ /*
+@@ -428,8 +528,9 @@ static void atmel_rx_chars(struct uart_port *port)
+ static void atmel_tx_chars(struct uart_port *port)
+ {
+ struct circ_buf *xmit = &port->state->xmit;
++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+
+- if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
++ if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
+ UART_PUT_CHAR(port, port->x_char);
+ port->icount.tx++;
+ port->x_char = 0;
+@@ -437,7 +538,7 @@ static void atmel_tx_chars(struct uart_port *port)
+ if (uart_circ_empty(xmit) || uart_tx_stopped(port))
+ return;
+
+- while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
++ while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
+ UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ port->icount.tx++;
+@@ -449,7 +550,8 @@ static void atmel_tx_chars(struct uart_port *port)
+ uart_write_wakeup(port);
+
+ if (!uart_circ_empty(xmit))
+- UART_PUT_IER(port, ATMEL_US_TXRDY);
++ /* Enable interrupts */
++ UART_PUT_IER(port, atmel_port->tx_done_mask);
+ }
+
+ /*
+@@ -501,18 +603,10 @@ atmel_handle_transmit(struct uart_port *port, unsigned int pending)
+ {
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+
+- if (atmel_use_dma_tx(port)) {
+- /* PDC transmit */
+- if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
+- UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
+- tasklet_schedule(&atmel_port->tasklet);
+- }
+- } else {
+- /* Interrupt transmit */
+- if (pending & ATMEL_US_TXRDY) {
+- UART_PUT_IDR(port, ATMEL_US_TXRDY);
+- tasklet_schedule(&atmel_port->tasklet);
+- }
++ if (pending & atmel_port->tx_done_mask) {
++ /* Either PDC or interrupt transmission */
++ UART_PUT_IDR(port, atmel_port->tx_done_mask);
++ tasklet_schedule(&atmel_port->tasklet);
+ }
+ }
+
+@@ -590,9 +684,15 @@ static void atmel_tx_dma(struct uart_port *port)
+
+ UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
+ UART_PUT_TCR(port, count);
+- /* re-enable PDC transmit and interrupts */
++ /* re-enable PDC transmit */
+ UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
+- UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
++ /* Enable interrupts */
++ UART_PUT_IER(port, atmel_port->tx_done_mask);
++ } else {
++ if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
++ /* DMA done, stop TX, start RX for RS485 */
++ atmel_start_rx(port);
++ }
+ }
+
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+@@ -1017,6 +1117,7 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
+ {
+ unsigned long flags;
+ unsigned int mode, imr, quot, baud;
++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+
+ /* Get current mode register */
+ mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
+@@ -1115,6 +1216,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
+ /* disable receiver and transmitter */
+ UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
+
++ /* Resetting serial mode to RS232 (0x0) */
++ mode &= ~ATMEL_US_USMODE;
++
++ if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
++ dev_dbg(port->dev, "Setting UART to RS485\n");
++ UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send);
++ mode |= ATMEL_US_USMODE_RS485;
++ } else {
++ dev_dbg(port->dev, "Setting UART to RS232\n");
++ }
++
+ /* set the parity, stop bits and data size */
+ UART_PUT_MR(port, mode);
+
+@@ -1213,6 +1325,35 @@ static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
+ return ret;
+ }
+
++static int
++atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
++{
++ struct serial_rs485 rs485conf;
++
++ switch (cmd) {
++ case TIOCSRS485:
++ if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
++ sizeof(rs485conf)))
++ return -EFAULT;
++
++ atmel_config_rs485(port, &rs485conf);
++ break;
++
++ case TIOCGRS485:
++ if (copy_to_user((struct serial_rs485 *) arg,
++ &(to_atmel_uart_port(port)->rs485),
++ sizeof(rs485conf)))
++ return -EFAULT;
++ break;
++
++ default:
++ return -ENOIOCTLCMD;
++ }
++ return 0;
++}
++
++
++
+ static struct uart_ops atmel_pops = {
+ .tx_empty = atmel_tx_empty,
+ .set_mctrl = atmel_set_mctrl,
+@@ -1232,6 +1373,7 @@ static struct uart_ops atmel_pops = {
+ .config_port = atmel_config_port,
+ .verify_port = atmel_verify_port,
+ .pm = atmel_serial_pm,
++ .ioctl = atmel_ioctl,
+ };
+
+ /*
+@@ -1243,13 +1385,12 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
+ struct uart_port *port = &atmel_port->uart;
+ struct atmel_uart_data *data = pdev->dev.platform_data;
+
+- port->iotype = UPIO_MEM;
+- port->flags = UPF_BOOT_AUTOCONF;
+- port->ops = &atmel_pops;
+- port->fifosize = 1;
+- port->line = pdev->id;
+- port->dev = &pdev->dev;
+-
++ port->iotype = UPIO_MEM;
++ port->flags = UPF_BOOT_AUTOCONF;
++ port->ops = &atmel_pops;
++ port->fifosize = 1;
++ port->line = pdev->id;
++ port->dev = &pdev->dev;
+ port->mapbase = pdev->resource[0].start;
+ port->irq = pdev->resource[1].start;
+
+@@ -1277,8 +1418,16 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
+
+ atmel_port->use_dma_rx = data->use_dma_rx;
+ atmel_port->use_dma_tx = data->use_dma_tx;
+- if (atmel_use_dma_tx(port))
++ atmel_port->rs485 = data->rs485;
++ /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
++ if (atmel_port->rs485.flags & SER_RS485_ENABLED)
++ atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
++ else if (atmel_use_dma_tx(port)) {
+ port->fifosize = PDC_BUFFER_SIZE;
++ atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
++ } else {
++ atmel_port->tx_done_mask = ATMEL_US_TXRDY;
++ }
+ }
+
+ /*
+@@ -1312,6 +1461,7 @@ static void atmel_console_putchar(struct uart_port *port, int ch)
+ static void atmel_console_write(struct console *co, const char *s, u_int count)
+ {
+ struct uart_port *port = &atmel_ports[co->index].uart;
++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+ unsigned int status, imr;
+ unsigned int pdc_tx;
+
+@@ -1319,7 +1469,7 @@ static void atmel_console_write(struct console *co, const char *s, u_int count)
+ * First, save IMR and then disable interrupts
+ */
+ imr = UART_GET_IMR(port);
+- UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
++ UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
+
+ /* Store PDC transmit status and disable it */
+ pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
+@@ -1333,7 +1483,7 @@ static void atmel_console_write(struct console *co, const char *s, u_int count)
+ */
+ do {
+ status = UART_GET_CSR(port);
+- } while (!(status & ATMEL_US_TXRDY));
++ } while (!(status & atmel_port->tx_done_mask));
+
+ /* Restore PDC transmit status */
+ if (pdc_tx)
+@@ -1530,6 +1680,7 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
+ struct atmel_uart_port *port;
+ void *data;
+ int ret;
++ struct atmel_serial_data *pdata;
+
+ BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
+
+@@ -1561,12 +1712,27 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
+ clk_disable(port->clk);
+ }
+ #endif
++ pdata = NULL;
++ //pdata = pdev->private_data;
++ if(pdata) {
++ port->txe_gpio = pdata->txe_gpio;
++ port->active_low = pdata->active_low;
++ if(gpio_is_valid(port->txe_gpio)) {
++ gpio_request(port->txe_gpio, "TXE");
++ gpio_direction_output(port->txe_gpio, port->active_low);
++ }
++ } else {
++ port->txe_gpio = -ENODEV;
++ }
+
+ device_init_wakeup(&pdev->dev, 1);
+ platform_set_drvdata(pdev, port);
+
++
+ return 0;
+
++ if(gpio_is_valid(port->txe_gpio))
++ gpio_free(port->txe_gpio);
+ err_add_port:
+ kfree(port->rx_ring.buf);
+ port->rx_ring.buf = NULL;
+@@ -1585,6 +1751,8 @@ static int __devexit atmel_serial_remove(struct platform_device *pdev)
+ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
+ int ret = 0;
+
++ if(gpio_is_valid(atmel_port->txe_gpio))
++ gpio_free(atmel_port->txe_gpio);
+ device_init_wakeup(&pdev->dev, 0);
+ platform_set_drvdata(pdev, NULL);
+
+diff --git a/include/linux/atmel_serial.h b/include/linux/atmel_serial.h
+index fd68337..ac15147 100644
+--- a/include/linux/atmel_serial.h
++++ b/include/linux/atmel_serial.h
+@@ -124,4 +124,9 @@
+ #define ATMEL_US_NER 0x44 /* Number of Errors Register */
+ #define ATMEL_US_IF 0x4c /* IrDA Filter Register */
+
++struct atmel_serial_data {
++ int txe_gpio;
++ int active_low;
++};
++
+ #endif
+--
+1.7.3.3
+
--- /dev/null
+From 44a7e4c328dc2d1d40525fead5d80d28c3e8758c Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 14:00:48 +0100
+Subject: [PATCH 09/18] [ICnova] add support for ADB3000 revB
+
+This changed the numbering of UARTs and the atmel-tsadcc was
+replaced by a ads7846.
+---
+ arch/arm/mach-at91/board-icnova_adb3000.c | 42 +++++++++++++++++++++++++---
+ 1 files changed, 37 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-at91/board-icnova_adb3000.c b/arch/arm/mach-at91/board-icnova_adb3000.c
+index 6006faa..7bbe786 100644
+--- a/arch/arm/mach-at91/board-icnova_adb3000.c
++++ b/arch/arm/mach-at91/board-icnova_adb3000.c
+@@ -89,14 +89,14 @@ static void __init ek_map_io(void)
+ at91sam9g45_initialize(12000000);
+
+ /* DGBU on ttyS0. (Rx & Tx only) */
+- at91_register_uart(0, 0, 0);
++ at91_register_uart(0, 4, 0);
+
+ at91_register_uart(AT91SAM9G45_ID_US0, 1, 0);
+ at91_register_uart(AT91SAM9G45_ID_US1, 2, 0);
+ at91_register_uart(AT91SAM9G45_ID_US2, 3, 0);
+- at91_register_uart(AT91SAM9G45_ID_US3, 4, 0);
++ at91_register_uart(AT91SAM9G45_ID_US3, 0, 0);
+
+- /* set serial console to ttyS0 (ie, DBGU) */
++ /* set serial console to ttyS0 */
+ at91_set_serial_console(0);
+ }
+
+@@ -124,7 +124,32 @@ static struct i2c_board_info icnova_i2c[] = {
+ * SPI devices.
+ */
+
++#ifndef CONFIG_BOARD_ICNOVA_TOUCH_INT
++#define CONFIG_BOARD_ICNOVA_ADS7846_IRQ AT91_PIN_PD18
++#define CONFIG_BOARD_ICNOVA_ADS7846_CS 2
++static struct ads7846_platform_data ads_info = {
++ .model = 7846,
++ .vref_delay_usecs = 100,
++ .gpio_pendown = CONFIG_BOARD_ICNOVA_ADS7846_IRQ,
++ .x_min = 330,
++ .y_min = 3700,
++ .x_max = 3700,
++ .y_max = 330,
++ .settle_delay_usecs = 50,
++};
++#endif
++
+ static struct spi_board_info ek_spi_devices[] = {
++#ifndef CONFIG_BOARD_ICNOVA_TOUCH_INT
++ {
++ .modalias = "ads7846",
++ .max_speed_hz = 125000 * 26,
++ .chip_select = CONFIG_BOARD_ICNOVA_ADS7846_CS,
++ .platform_data = &ads_info,
++ .bus_num = 0,
++ .controller_data = (void *)AT91_PIN_PD25,
++ },
++#endif
+ };
+
+
+@@ -221,8 +246,8 @@ static struct fb_videomode at91_tft_vga_modes[] = {
+ .xres = 800, .yres = 480,
+ .pixclock = KHZ2PICOS(33260),
+
+- .left_margin = 128, .right_margin = 88,
+- .upper_margin = 27, .lower_margin = 16,
++ .left_margin = 178, .right_margin = 38,
++ .upper_margin = 35, .lower_margin = 8,
+ .hsync_len = 40, .vsync_len = 2,
+
+ .vmode = FB_VMODE_NONINTERLACED,
+@@ -263,6 +288,7 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
+ #endif
+
+
++#ifdef CONFIG_BOARD_ICNOVA_TOUCH_INT
+ /*
+ * Touchscreen
+ */
+@@ -271,6 +297,7 @@ static struct at91_tsadcc_data ek_tsadcc_data = {
+ .pendet_debounce = 0x0d,
+ .ts_sample_hold_time = 0x0a,
+ };
++#endif
+
+ /*
+ * LEDs
+@@ -336,6 +363,9 @@ static void __init ek_board_init(void)
+ /* USB HS Device */
+ at91_add_device_usba(NULL);
+ /* SPI */
++#ifndef CONFIG_BOARD_ICNOVA_TOUCH_INT
++ ek_spi_devices[0].irq = gpio_to_irq(CONFIG_BOARD_ICNOVA_ADS7846_IRQ),
++#endif
+ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
+ /* MMC */
+ at91_add_device_mci(0, &ek_mmc_data);
+@@ -354,8 +384,10 @@ static void __init ek_board_init(void)
+ gpio_direction_output(AT91_PIN_PE6, 1);
+
+ at91_add_device_lcdc(&ek_lcdc_data);
++#ifdef CONFIG_BOARD_ICNOVA_TOUCH_INT
+ /* Touch Screen */
+ at91_add_device_tsadcc(&ek_tsadcc_data);
++#endif
+ /* LEDs */
+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
+ /* FPGA-Interface */
+--
+1.7.3.3
+
--- /dev/null
+From 636100a205fc74fe9a580792e0c81753faa827cf Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 14:03:02 +0100
+Subject: [PATCH 10/18] [atmel-pwm] Making driver selectable for SAM9G45
+
+The Core of the AT91SAM9G45 is compatible with this PWMdriver.
+---
+ drivers/misc/Kconfig | 2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 072c8a4..8d0a517 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -29,7 +29,7 @@ config AD525X_DPOT
+
+ config ATMEL_PWM
+ tristate "Atmel AT32/AT91 PWM support"
+- depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9
++ depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_AT91SAM9G45
+ help
+ This option enables device driver support for the PWM channels
+ on certain Atmel processors. Pulse Width Modulation is used for
+--
+1.7.3.3
+
--- /dev/null
+From c1196b5a31f90c0af0efbf8b2e9263b7cafab767 Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 14:16:18 +0100
+Subject: [PATCH 11/18] [hwmon/atm_pwm] adding new Userspace<->atmel-pwm interface
+
+Now the PWM-Outputs can be configured from userspace, if the
+board-file does set up these pins.
+---
+ drivers/hwmon/Kconfig | 8 ++
+ drivers/hwmon/Makefile | 1 +
+ drivers/hwmon/atm_pwm.c | 246 +++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 255 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/hwmon/atm_pwm.c
+
+diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
+index 68cf877..6cdc1af 100644
+--- a/drivers/hwmon/Kconfig
++++ b/drivers/hwmon/Kconfig
+@@ -216,6 +216,14 @@ config SENSORS_ADT7475
+ This driver can also be build as a module. If so, the module
+ will be called adt7475.
+
++config SENSORS_ATM_PWM
++ tristate "Atmel PWM"
++ depends on ATMEL_PWM
++ help
++ This is some kind of userspace-interface for the PWMs found in some
++ Atmel Processors (like AP7000)
++ Your Board-Code must set the needed Pins to be PWM!
++
+ config SENSORS_K8TEMP
+ tristate "AMD Athlon64/FX or Opteron temperature sensor"
+ depends on X86 && PCI && EXPERIMENTAL
+diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
+index 4bc215c..33ee45f 100644
+--- a/drivers/hwmon/Makefile
++++ b/drivers/hwmon/Makefile
+@@ -34,6 +34,7 @@ obj-$(CONFIG_SENSORS_ADT7470) += adt7470.o
+ obj-$(CONFIG_SENSORS_ADT7473) += adt7473.o
+ obj-$(CONFIG_SENSORS_ADT7475) += adt7475.o
+ obj-$(CONFIG_SENSORS_APPLESMC) += applesmc.o
++obj-$(CONFIG_SENSORS_ATM_PWM) += atm_pwm.o
+ obj-$(CONFIG_SENSORS_AMS) += ams/
+ obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o
+ obj-$(CONFIG_SENSORS_CORETEMP) += coretemp.o
+diff --git a/drivers/hwmon/atm_pwm.c b/drivers/hwmon/atm_pwm.c
+new file mode 100644
+index 0000000..1f5bc8f
+--- /dev/null
++++ b/drivers/hwmon/atm_pwm.c
+@@ -0,0 +1,246 @@
++/*
++ * Copyright (C) 2009 by Benjamin Tietz <benjamin.tietz@in-circuit.de>
++ * based on the atmel-pwm-bl.c
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#define DEBUG
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/fb.h>
++#include <linux/clk.h>
++#include <linux/gpio.h>
++#include <linux/atmel_pwm.h>
++#include <linux/hwmon.h>
++#include <linux/hwmon-sysfs.h>
++#include <linux/sysfs.h>
++
++#define ATMEL_PWM_NCHN 4
++#define ATMEL_PWM_MAX 1000
++
++struct atmel_pwm_hwmon {
++ unsigned int pwm_channel;
++ struct hwmon_device *hwdev;
++ struct platform_device *pdev;
++ struct pwm_channel pwmc[ATMEL_PWM_NCHN];
++ struct device dev;
++};
++
++static ssize_t atmel_pwm_hwmon_set_duty(struct device *dev,
++ struct device_attribute *devattr, const char *buf, size_t count)
++{
++ struct platform_device *pdev =
++ container_of(dev, struct platform_device, dev);
++ struct atmel_pwm_hwmon *pwmhw = platform_get_drvdata(pdev);
++ unsigned int pwm_duty = simple_strtoul(buf, NULL, 10);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
++ struct pwm_channel *pwmc = &(pwmhw->pwmc[attr->index]);
++
++ if(pwm_duty > ATMEL_PWM_MAX)
++ pwm_duty = ATMEL_PWM_MAX;
++ pwm_channel_writel(pwmc, PWM_CUPD, pwm_duty);
++
++ return count;
++}
++
++static ssize_t atmel_pwm_hwmon_get_duty(struct device *dev,
++ struct device_attribute *devattr, char *buf)
++{
++ struct platform_device *pdev =
++ container_of(dev, struct platform_device, dev);
++ struct atmel_pwm_hwmon *pwmhw = platform_get_drvdata(pdev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
++ struct pwm_channel *pwmc = &(pwmhw->pwmc[attr->index]);
++
++ return sprintf(buf, "%d\n", pwm_channel_readl(pwmc, PWM_CDTY));
++}
++
++static ssize_t atmel_pwm_hwmon_set_freq(struct device *dev,
++ struct device_attribute *devattr, const char *buf, size_t count)
++{
++ struct platform_device *pdev =
++ container_of(dev, struct platform_device, dev);
++ struct atmel_pwm_hwmon *pwmhw = platform_get_drvdata(pdev);
++ int pwm_freq = simple_strtoul(buf, NULL, 10);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
++ struct pwm_channel *pwmc = &(pwmhw->pwmc[attr->index]);
++ unsigned long pwm_rate = pwmc->mck;
++ unsigned long prescale;
++
++
++ pwm_channel_disable(pwmc);
++ if(!pwm_freq)
++ return count;
++
++ prescale = DIV_ROUND_UP(pwm_rate, (pwm_freq * ATMEL_PWM_MAX)) -1;
++ /*
++ * Prescale must be power of two and maximum 0xf in size because of
++ * hardware limit. PWM speed will be:
++ * PWM module clock speed / (2 ^ prescale).
++ */
++ prescale = fls(prescale);
++ if (prescale > 0xa)
++ prescale = 0xa;
++
++ pwm_channel_writel(pwmc, PWM_CPRD, ATMEL_PWM_MAX);
++ pwm_channel_writel(pwmc, PWM_CMR, prescale);
++ pwm_channel_enable(pwmc);
++
++ return count;
++}
++
++static ssize_t atmel_pwm_hwmon_get_freq(struct device *dev,
++ struct device_attribute *devattr, char *buf)
++{
++ struct platform_device *pdev =
++ container_of(dev, struct platform_device, dev);
++ struct atmel_pwm_hwmon *pwmhw = platform_get_drvdata(pdev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
++ struct pwm_channel *pwmc = &(pwmhw->pwmc[attr->index]);
++ unsigned long pwm_freq = pwm_channel_readl(pwmc, PWM_CMR);
++ pwm_freq = 1<<pwm_freq;
++ pwm_freq = pwmc->mck / pwm_freq / ATMEL_PWM_MAX;
++
++ return sprintf(buf, "%lu\n", pwm_freq);
++}
++
++static SENSOR_DEVICE_ATTR(pwm0_freq, S_IWUSR | S_IRUGO,
++ atmel_pwm_hwmon_get_freq, atmel_pwm_hwmon_set_freq, 0);
++static SENSOR_DEVICE_ATTR(pwm0, S_IWUSR | S_IRUGO,
++ atmel_pwm_hwmon_get_duty, atmel_pwm_hwmon_set_duty, 0);
++static SENSOR_DEVICE_ATTR(pwm1_freq, S_IWUSR | S_IRUGO,
++ atmel_pwm_hwmon_get_freq, atmel_pwm_hwmon_set_freq, 1);
++static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO,
++ atmel_pwm_hwmon_get_duty, atmel_pwm_hwmon_set_duty, 1);
++static SENSOR_DEVICE_ATTR(pwm2_freq, S_IWUSR | S_IRUGO,
++ atmel_pwm_hwmon_get_freq, atmel_pwm_hwmon_set_freq, 2);
++static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO,
++ atmel_pwm_hwmon_get_duty, atmel_pwm_hwmon_set_duty, 2);
++static SENSOR_DEVICE_ATTR(pwm3_freq, S_IWUSR | S_IRUGO,
++ atmel_pwm_hwmon_get_freq, atmel_pwm_hwmon_set_freq, 3);
++static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO,
++ atmel_pwm_hwmon_get_duty, atmel_pwm_hwmon_set_duty, 3);
++
++static struct attribute *atmel_pwm_hwmon_attributes[] = {
++ &sensor_dev_attr_pwm0_freq.dev_attr.attr,
++ &sensor_dev_attr_pwm0.dev_attr.attr,
++ NULL,
++ &sensor_dev_attr_pwm1_freq.dev_attr.attr,
++ &sensor_dev_attr_pwm1.dev_attr.attr,
++ NULL,
++ &sensor_dev_attr_pwm2_freq.dev_attr.attr,
++ &sensor_dev_attr_pwm2.dev_attr.attr,
++ NULL,
++ &sensor_dev_attr_pwm3_freq.dev_attr.attr,
++ &sensor_dev_attr_pwm3.dev_attr.attr,
++ NULL,
++};
++
++static const struct attribute_group atmel_pwm_hwmon_group[] = {
++ {
++ .attrs = &(atmel_pwm_hwmon_attributes[0]),
++ },
++ {
++ .attrs = &(atmel_pwm_hwmon_attributes[3]),
++ },
++ {
++ .attrs = &(atmel_pwm_hwmon_attributes[6]),
++ },
++ {
++ .attrs = &(atmel_pwm_hwmon_attributes[9]),
++ },
++};
++
++static int atmel_pwm_hwmon_probe(struct platform_device *pdev)
++{
++ struct atmel_pwm_hwmon *pwmhw;
++ int retval;
++ int i;
++
++ pwmhw = kzalloc(sizeof(struct atmel_pwm_hwmon), GFP_KERNEL);
++ if (!pwmhw)
++ return -ENOMEM;
++
++ pwmhw->pdev = pdev;
++
++ for(i=0; i< ATMEL_PWM_NCHN; i++) {
++ retval = pwm_channel_alloc(i, &pwmhw->pwmc[i]);
++ if(retval) continue;
++
++ retval = sysfs_create_group(&pdev->dev.kobj,
++ &(atmel_pwm_hwmon_group[i]));
++ if(retval)
++ goto err_free_pwm;
++ }
++
++ pwmhw->hwdev = hwmon_device_register(&pdev->dev);
++ if(IS_ERR(pwmhw->hwdev)) {
++ dev_dbg(&pdev->dev, "Can't register hwmon-device\n");
++ retval = PTR_ERR(pwmhw->hwdev);
++ goto err_hwmon;
++ }
++
++ platform_set_drvdata(pdev, pwmhw);
++
++ return 0;
++
++//err_free_hwmon_dev:
++ platform_set_drvdata(pdev, NULL);
++ hwmon_device_unregister(pwmhw->hwdev);
++err_hwmon:
++ i = ATMEL_PWM_NCHN;
++err_free_pwm:
++ for(i--;i>=0;i--) {
++ sysfs_remove_group(&pdev->dev.kobj,
++ &(atmel_pwm_hwmon_group[i]));
++ pwm_channel_free(&pwmhw->pwmc[i]);
++ }
++//err_free_mem:
++ kfree(pwmhw);
++ return retval;
++}
++
++static int __exit atmel_pwm_hwmon_remove(struct platform_device *pdev)
++{
++ struct atmel_pwm_hwmon *pwmhw = platform_get_drvdata(pdev);
++ int i;
++
++ platform_set_drvdata(pdev, NULL);
++ hwmon_device_unregister(pwmhw->hwdev);
++ for(i=0;i<ATMEL_PWM_NCHN;i++) {
++ sysfs_remove_group(&pdev->dev.kobj,
++ &(atmel_pwm_hwmon_group[i]));
++ pwm_channel_disable(&pwmhw->pwmc[i]);
++ pwm_channel_free(&pwmhw->pwmc[i]);
++ }
++ kfree(pwmhw);
++ return 0;
++}
++
++static struct platform_driver atmel_pwm_hwmon_driver = {
++ .driver = {
++ .name = "atmel-pwm-hwmon",
++ },
++ /* REVISIT add suspend() and resume() */
++ .remove = __exit_p(atmel_pwm_hwmon_remove),
++};
++
++static int __init atmel_pwm_hwmon_init(void)
++{
++ return platform_driver_probe(&atmel_pwm_hwmon_driver, atmel_pwm_hwmon_probe);
++}
++module_init(atmel_pwm_hwmon_init);
++
++static void __exit atmel_pwm_hwmon_exit(void)
++{
++ platform_driver_unregister(&atmel_pwm_hwmon_driver);
++}
++module_exit(atmel_pwm_hwmon_exit);
++
++MODULE_AUTHOR("Benjamin Tietz <benjamin.tietz@in-circuit.de>");
++MODULE_DESCRIPTION("Atmel PWM hwmon driver");
++MODULE_LICENSE("GPL");
+--
+1.7.3.3
+
--- /dev/null
+From d88aa9d978fd2eca603204e33e452437dad8ce70 Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin@marvin.local.in-circuit.de>
+Date: Wed, 15 Dec 2010 14:16:58 +0100
+Subject: [PATCH 12/18] [ICnova] configuring the buzzer
+
+The buzzer is now accessible via the hwmon interface
+---
+ arch/arm/mach-at91/board-icnova_adb1000.c | 7 +++++++
+ 1 files changed, 7 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-at91/board-icnova_adb1000.c b/arch/arm/mach-at91/board-icnova_adb1000.c
+index b292acf..dec1597 100644
+--- a/arch/arm/mach-at91/board-icnova_adb1000.c
++++ b/arch/arm/mach-at91/board-icnova_adb1000.c
+@@ -303,6 +303,10 @@ static struct gpio_led ek_leds[] = {
+ },
+ };
+
++static struct platform_device icnova_pwmdev = {
++ .name = "atmel-pwm-hwmon",
++ .id = 0,
++};
+
+ static void __init ek_board_init(void)
+ {
+@@ -339,6 +343,9 @@ static void __init ek_board_init(void)
+ at91_add_device_lcdc(&ek_lcdc_data);
+ /* LEDs */
+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
++ /* Buzzer */
++ at91_add_device_pwm(1<<AT91_PWM1);
++ platform_device_register(&icnova_pwmdev);
+ }
+
+ MACHINE_START(AT91SAM9G45EKES, "In-Circuit ICnova G45")
+--
+1.7.3.3
+
--- /dev/null
+From 8e5d4b938e4aeb0e091eaccfdfa4824a23a007aa Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin.tietz@in-circuit.de>
+Date: Thu, 16 Dec 2010 13:42:52 +0100
+Subject: [PATCH 13/18] [sound/soc] adding ssm2603 attached to atmel-ssc
+
+This will add support for an SSM2603 I2S-Codec connected to
+an Atmel SSC-Interface.
+---
+ sound/soc/atmel/Kconfig | 9 ++
+ sound/soc/atmel/Makefile | 1 +
+ sound/soc/atmel/atmel_ssc_dai.c | 9 +-
+ sound/soc/atmel/snd-soc-ssm2603.c | 254 +++++++++++++++++++++++++++++++++++++
+ 4 files changed, 270 insertions(+), 3 deletions(-)
+ create mode 100644 sound/soc/atmel/snd-soc-ssm2603.c
+
+diff --git a/sound/soc/atmel/Kconfig b/sound/soc/atmel/Kconfig
+index e720d5e..ad2b560 100644
+--- a/sound/soc/atmel/Kconfig
++++ b/sound/soc/atmel/Kconfig
+@@ -14,6 +14,15 @@ config SND_ATMEL_SOC_SSC
+ ATMEL SSC interface. You will also needs to select the individual
+ machine drivers to support below.
+
++config SND_AT91_SOC_ICNOVA_SSM2603
++ tristate "SoC Audio support for SSM2603-based ICnova board"
++ depends on ATMEL_SSC && ( MACH_ICNOVA_ADB1000 || MACH_ICNOVA_ADB4000) && SND_ATMEL_SOC
++ select SND_ATMEL_SOC_SSC
++ select SND_SOC_SSM2602
++ help
++ Say Y or M if you want to add support for SoC audio on SSM2603
++ based board.
++
+ config SND_AT91_SOC_SAM9G20_WM8731
+ tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
+ depends on ATMEL_SSC && ARCH_AT91SAM9G20 && SND_ATMEL_SOC
+diff --git a/sound/soc/atmel/Makefile b/sound/soc/atmel/Makefile
+index e7ea56b..85f553e 100644
+--- a/sound/soc/atmel/Makefile
++++ b/sound/soc/atmel/Makefile
+@@ -14,3 +14,4 @@ snd-soc-playpaq-objs := playpaq_wm8510.o
+ obj-$(CONFIG_SND_AT91_SOC_SAM9G20_WM8731) += snd-soc-sam9g20-wm8731.o
+ obj-$(CONFIG_SND_AT32_SOC_PLAYPAQ) += snd-soc-playpaq.o
+ obj-$(CONFIG_SND_AT91_SOC_AFEB9260) += snd-soc-afeb9260.o
++obj-$(CONFIG_SND_AT91_SOC_ICNOVA_SSM2603) += snd-soc-ssm2603.o
+diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c
+index e588e63..fc2da03 100644
+--- a/sound/soc/atmel/atmel_ssc_dai.c
++++ b/sound/soc/atmel/atmel_ssc_dai.c
+@@ -48,7 +48,7 @@
+ #include "atmel_ssc_dai.h"
+
+
+-#if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
++#if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91SAM9G45)
+ #define NUM_SSC_DEVICES 1
+ #else
+ #define NUM_SSC_DEVICES 3
+@@ -165,11 +165,14 @@ static irqreturn_t atmel_ssc_interrupt(int irq, void *dev_id)
+ struct atmel_ssc_info *ssc_p = dev_id;
+ struct atmel_pcm_dma_params *dma_params;
+ u32 ssc_sr;
++ u32 ssc_imr;
+ u32 ssc_substream_mask;
+ int i;
+
+- ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR)
+- & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR);
++ ssc_imr = (unsigned long) ssc_readl(ssc_p->ssc->regs, IMR);
++ ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR);
++ pr_debug("SSC_DAI got IRQ: %08lx & %08lx\n", ssc_sr, ssc_imr);
++ ssc_sr &= ssc_imr;
+
+ /*
+ * Loop through the substreams attached to this SSC. If
+diff --git a/sound/soc/atmel/snd-soc-ssm2603.c b/sound/soc/atmel/snd-soc-ssm2603.c
+new file mode 100644
+index 0000000..c471102
+--- /dev/null
++++ b/sound/soc/atmel/snd-soc-ssm2603.c
+@@ -0,0 +1,254 @@
++/*
++ * File: sound/soc/atmel/snd-soc-ssm2602.c
++ * Author: Benjamin Tietz <benjamin.tietz@in-circuit.de>
++ *
++ * Created: Thu Octobre 21 2010
++ * Description: board driver for SSM2603 sound chip
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, see the file COPYING, or write
++ * to the Free Software Foundation, Inc.,
++ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++ */
++
++#define DEBUG
++
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/device.h>
++
++#include <linux/atmel-ssc.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/soc.h>
++#include <sound/soc-dapm.h>
++#include <sound/pcm_params.h>
++
++#include <asm/dma.h>
++#include <linux/gpio.h>
++#include "../codecs/ssm2602.h"
++#include "atmel-pcm.h"
++#include "atmel_ssc_dai.h"
++
++static struct snd_soc_card atmel_ssm2603;
++
++static int atmel_ssm2603_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
++ struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
++ unsigned int clk = 0;
++ int ret = 0;
++
++ pr_debug("%s rate %d format %x\n", __func__, params_rate(params),
++ params_format(params));
++ /*
++ * If you are using a crystal source which frequency is not 12MHz
++ * then modify the below case statement with frequency of the crystal.
++ *
++ * If you are using the SPORT to generate clocking then this is
++ * where to do it.
++ */
++
++ switch (params_rate(params)) {
++ case 8000:
++ case 16000:
++ case 48000:
++ case 96000:
++ case 11025:
++ case 22050:
++ case 44100:
++ clk = 12000000;
++ break;
++ }
++
++ /*
++ * CODEC is master for BCLK and LRC in this configuration.
++ */
++
++ /* set codec DAI configuration */
++ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
++ if (ret < 0)
++ return ret;
++ /* set cpu DAI configuration */
++ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
++ if (ret < 0)
++ return ret;
++
++ ret = snd_soc_dai_set_sysclk(codec_dai, SSM2602_SYSCLK, clk,
++ SND_SOC_CLOCK_IN);
++ if (ret < 0)
++ return ret;
++
++ return 0;
++}
++
++#if 0
++static const struct snd_soc_dapm_widget at91sam9g20ek_dapm_widgets[] = {
++ SND_SOC_DAPM_MIC("Int Mic", NULL),
++ SND_SOC_DAPM_SPK("Ext Spk", NULL),
++};
++
++static const struct snd_soc_dapm_route intercon[] = {
++
++ /* speaker connected to LHPOUT */
++ {"Ext Spk", NULL, "LHPOUT"},
++
++ /* mic is connected to Mic Jack, with WM8731 Mic Bias */
++ {"MICIN", NULL, "Mic Bias"},
++ {"Mic Bias", NULL, "Int Mic"},
++};
++
++/*
++ * Logic for a wm8731 as connected on a at91sam9g20ek board.
++ */
++static int at91sam9g20ek_wm8731_init(struct snd_soc_codec *codec)
++{
++ struct snd_soc_dai *codec_dai = &codec->dai[0];
++ int ret;
++
++ printk(KERN_DEBUG
++ "at91sam9g20ek_wm8731 "
++ ": at91sam9g20ek_wm8731_init() called\n");
++
++ ret = snd_soc_dai_set_sysclk(codec_dai, SSM2602_SYSCLK, 12000000,
++ SND_SOC_CLOCK_IN);
++ if (ret < 0) {
++ printk(KERN_ERR "Failed to set WM8731 SYSCLK: %d\n", ret);
++ return ret;
++ }
++
++ /* Add specific widgets */
++ snd_soc_dapm_new_controls(codec, at91sam9g20ek_dapm_widgets,
++ ARRAY_SIZE(at91sam9g20ek_dapm_widgets));
++ /* Set up specific audio path interconnects */
++ snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
++
++ /* not connected */
++ snd_soc_dapm_nc_pin(codec, "RLINEIN");
++ snd_soc_dapm_nc_pin(codec, "LLINEIN");
++
++ snd_soc_dapm_enable_pin(codec, "Int Mic");
++
++ /* always connected */
++ snd_soc_dapm_enable_pin(codec, "Ext Spk");
++
++ snd_soc_dapm_sync(codec);
++
++ return 0;
++}
++#endif
++
++static struct snd_soc_ops atmel_ssm2603_ops = {
++ .hw_params = atmel_ssm2603_hw_params,
++};
++
++static struct snd_soc_dai_link atmel_ssm2603_dai = {
++ .name = "ssm2603",
++ .stream_name = "SSM2603",
++ .cpu_dai = &atmel_ssc_dai[0],
++ .codec_dai = &ssm2602_dai,
++#if 0
++ .init = at91sam9g20ek_wm8731_init,
++#endif
++ .ops = &atmel_ssm2603_ops,
++};
++
++/*
++ * SSM2603 2 wire address is determined by CSB
++ * state during powerup.
++ * low = 0x1a
++ * high = 0x1b
++ */
++
++static struct ssm2602_setup_data atmel_ssm2603_setup = {
++ .i2c_bus = 1,
++ .i2c_address = 0x1b,
++};
++
++static struct snd_soc_card atmel_ssm2603 = {
++ .name = "atmel_ssm2603",
++ .platform = &atmel_soc_platform,
++ .dai_link = &atmel_ssm2603_dai,
++ .num_links = 1,
++};
++
++static struct snd_soc_device atmel_ssm2603_snd_devdata = {
++ .card = &atmel_ssm2603,
++ .codec_dev = &soc_codec_dev_ssm2602,
++ .codec_data = &atmel_ssm2603_setup,
++};
++
++static struct platform_device *atmel_ssm2603_snd_device;
++
++static int __init atmel_ssm2603_init(void)
++{
++ struct atmel_ssc_info *ssc_p = atmel_ssm2603_dai.cpu_dai->private_data;
++ struct ssc_device *ssc = NULL;
++ int ret;
++
++ pr_debug("%s enter\n", __func__);
++ /*
++ * Request SSC device
++ */
++ ssc = ssc_request(0);
++ if (IS_ERR(ssc)) {
++ printk(KERN_ERR "ASoC: Failed to request SSC 0\n");
++ ret = PTR_ERR(ssc);
++ ssc = NULL;
++ goto err_ssc;
++ }
++ ssc_p->ssc = ssc;
++
++ atmel_ssm2603_snd_device = platform_device_alloc("soc-audio", -1);
++ if (!atmel_ssm2603_snd_device) {
++ pr_debug("Can't allocate device\n");
++ return -ENOMEM;
++ }
++
++ platform_set_drvdata(atmel_ssm2603_snd_device,
++ &atmel_ssm2603_snd_devdata);
++ atmel_ssm2603_snd_devdata.dev = &atmel_ssm2603_snd_device->dev;
++ ret = platform_device_add(atmel_ssm2603_snd_device);
++
++ if (ret) {
++ pr_debug("Can't add device\n");
++ platform_device_put(atmel_ssm2603_snd_device);
++ }
++
++ return ret;
++
++ ssc_free(ssc);
++ ssc_p->ssc = NULL;
++err_ssc:
++ return ret;
++}
++
++static void __exit atmel_ssm2603_exit(void)
++{
++ pr_debug("%s enter\n", __func__);
++ platform_device_unregister(atmel_ssm2603_snd_device);
++}
++
++module_init(atmel_ssm2603_init);
++module_exit(atmel_ssm2603_exit);
++
++/* Module information */
++MODULE_AUTHOR("Benjamin Tietz");
++MODULE_DESCRIPTION("ALSA SoC SSM2603 ADB4000");
++MODULE_LICENSE("GPL");
++
+--
+1.7.3.3
+
--- /dev/null
+From c500d362b621070c95ed85a5bf9b2ed4e8797d14 Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin.tietz@in-circuit.de>
+Date: Thu, 16 Dec 2010 13:44:47 +0100
+Subject: [PATCH 14/18] [ICnova ADB1000] Adding BPP to 16
+
+As this increases the overall system-performance massivly, the
+BitsPerPixel where reduced to 16.
+---
+ arch/arm/mach-at91/board-icnova_adb1000.c | 2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-at91/board-icnova_adb1000.c b/arch/arm/mach-at91/board-icnova_adb1000.c
+index dec1597..c6c0d50 100644
+--- a/arch/arm/mach-at91/board-icnova_adb1000.c
++++ b/arch/arm/mach-at91/board-icnova_adb1000.c
+@@ -261,7 +261,7 @@ static struct fb_monspecs at91fb_default_monspecs = {
+ /* Driver datas */
+ static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
+ .lcdcon_is_backlight = true,
+- .default_bpp = 24,
++ .default_bpp = 16,
+ .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
+ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
+ .default_monspecs = &at91fb_default_monspecs,
+--
+1.7.3.3
+
--- /dev/null
+From 5a9ad893301d24de3b9c3c43ddd8948dc426817b Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin.tietz@in-circuit.de>
+Date: Thu, 16 Dec 2010 13:46:55 +0100
+Subject: [PATCH 15/18] [ADS7846] Adding option to support fuzz on input.
+
+To calm down the reactness of the touch input, the fuzzing can be
+set. Now the board-driver is able to set this value for a specific
+board, too.
+---
+ drivers/input/touchscreen/ads7846.c | 4 ++--
+ include/linux/spi/ads7846.h | 2 ++
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
+index 52d2ca1..64d6f04 100644
+--- a/drivers/input/touchscreen/ads7846.c
++++ b/drivers/input/touchscreen/ads7846.c
+@@ -968,11 +968,11 @@ static int __devinit ads7846_probe(struct spi_device *spi)
+ input_set_abs_params(input_dev, ABS_X,
+ pdata->x_min ? : 0,
+ pdata->x_max ? : MAX_12BIT,
+- 0, 0);
++ pdata->xy_fuzz, 0);
+ input_set_abs_params(input_dev, ABS_Y,
+ pdata->y_min ? : 0,
+ pdata->y_max ? : MAX_12BIT,
+- 0, 0);
++ pdata->xy_fuzz, 0);
+ input_set_abs_params(input_dev, ABS_PRESSURE,
+ pdata->pressure_min, pdata->pressure_max, 0, 0);
+
+diff --git a/include/linux/spi/ads7846.h b/include/linux/spi/ads7846.h
+index 51948eb..c52a1e6 100644
+--- a/include/linux/spi/ads7846.h
++++ b/include/linux/spi/ads7846.h
+@@ -39,6 +39,8 @@ struct ads7846_platform_data {
+ u16 y_min, y_max;
+ u16 pressure_min, pressure_max;
+
++ u16 xy_fuzz;
++
+ u16 debounce_max; /* max number of additional readings
+ * per sample */
+ u16 debounce_tol; /* tolerance used for filtering */
+--
+1.7.3.3
+
--- /dev/null
+From babb2d6e7ec94f3ff102298a34862baf47eb466f Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin.tietz@in-circuit.de>
+Date: Thu, 16 Dec 2010 13:53:13 +0100
+Subject: [PATCH 16/18] [ADB4000] Adding support for the IO-Processor
+
+The ICnova ADB4000 is equipped with an IO-Processor, adding more IOs,
+analog inputs and a buzzer.
+---
+ drivers/misc/Kconfig | 1 +
+ drivers/misc/Makefile | 1 +
+ drivers/misc/adb4000/Kconfig | 86 +++
+ drivers/misc/adb4000/Makefile | 2 +
+ drivers/misc/adb4000/spi_comm.c | 107 +++
+ drivers/misc/adb4000/spi_comm.h | 49 ++
+ drivers/misc/adb4000/supervisor.c | 1411 +++++++++++++++++++++++++++++++++++++
+ drivers/misc/adb4000/supervisor.h | 46 ++
+ 8 files changed, 1703 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/misc/adb4000/Kconfig
+ create mode 100644 drivers/misc/adb4000/Makefile
+ create mode 100644 drivers/misc/adb4000/spi_comm.c
+ create mode 100644 drivers/misc/adb4000/spi_comm.h
+ create mode 100644 drivers/misc/adb4000/supervisor.c
+ create mode 100644 drivers/misc/adb4000/supervisor.h
+
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 8d0a517..c8aa1e2 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -296,6 +296,7 @@ source "drivers/misc/c2port/Kconfig"
+ source "drivers/misc/eeprom/Kconfig"
+ source "drivers/misc/cb710/Kconfig"
+ source "drivers/misc/iwmc3200top/Kconfig"
++source "drivers/misc/adb4000/Kconfig"
+
+ config FPGA_SRAM
+ tristate "FPGA-SRAM Interface"
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index 61fe337..1b1e4f4 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -29,3 +29,4 @@ obj-$(CONFIG_IWMC3200TOP) += iwmc3200top/
+ obj-$(CONFIG_FPGA_SRAM) += fpga_sram.o
+ obj-y += eeprom/
+ obj-y += cb710/
++obj-y += adb4000/
+diff --git a/drivers/misc/adb4000/Kconfig b/drivers/misc/adb4000/Kconfig
+new file mode 100644
+index 0000000..945b643
+--- /dev/null
++++ b/drivers/misc/adb4000/Kconfig
+@@ -0,0 +1,86 @@
++config SPI_COMM
++ tristate
++ default n
++ help
++ Communication-layer for supervisor
++
++config SUPERVISOR
++ depends on SPI
++ select SPI_COMM
++ tristate "ADB4000 Supervisor"
++ default y
++ help
++ The supervisor expands the board by a couple of UART-lines as
++ well as some buttons and GPIOs.
++
++config SUPERVISOR_ATOI
++ bool
++ default n
++ help
++ Provide a simple str2int function
++
++config SUPERVISOR_LED
++ depends on SUPERVISOR
++ bool "Support LEDs on Supervisor"
++ default y
++ help
++ This will utilize the Supervisors LEDs as those and not as GPIO.
++
++config SUPERVISOR_IRQ
++ depends on SUPERVISOR
++ bool "Support for Interrupt driven GPIOs on Supervisor"
++ default y
++ help
++ This will make the GPIOs on the Supervisor be able to trigger
++ interrupts on the system.
++
++config SUPERVISOR_UART
++ depends on SUPERVISOR
++ bool "Make UARTs available"
++ default y
++ help
++ The Supervisor can provide a set of UART, connected to some
++ Radios or utilized for RS232/RS422/RS485
++
++config SUPERVISOR_SYSFS
++ depends on SUPERVISOR
++ bool
++ default n
++
++config SUPERVISOR_BUZZER
++ depends on SUPERVISOR
++ select SUPERVISOR_SYSFS
++ select SUPERVISOR_ATOI
++ bool "Give access to the buzzer"
++ default y
++ help
++ This will give access to the supervisor's buzzer via a sysfs-file
++
++config SUPERVISOR_ADC
++ depends on SUPERVISOR
++ select SUPERVISOR_SYSFS
++ select SUPERVISOR_ATOI
++ bool "Utilize the Analog input Streams"
++ default y
++ help
++ To use the analog inputs and switch them from 0-10V to 4-20mA and
++ vice versa, this will be needed.
++
++config SUPERVISOR_CNTIN
++ depends on SUPERVISOR
++ select SUPERVISOR_SYSFS
++ select SUPERVISOR_ATOI
++ bool "Use digital inputs as counter"
++ default y
++
++config SUPERVISOR_NOCHECK
++ depends on SUPERVISOR
++ bool "Do not test for the presence of the Supervisor"
++ default n
++
++config SUPERVISOR_BOOTLOADER
++ depends on SUPERVISOR
++ select SUPERVISOR_SYSFS
++ bool "Allow Firmwareupgrades to the Supervisor"
++ default y
++
+diff --git a/drivers/misc/adb4000/Makefile b/drivers/misc/adb4000/Makefile
+new file mode 100644
+index 0000000..7857f0a
+--- /dev/null
++++ b/drivers/misc/adb4000/Makefile
+@@ -0,0 +1,2 @@
++obj-$(CONFIG_SPI_COMM) += spi_comm.o
++obj-$(CONFIG_SUPERVISOR)+= supervisor.o
+diff --git a/drivers/misc/adb4000/spi_comm.c b/drivers/misc/adb4000/spi_comm.c
+new file mode 100644
+index 0000000..daed9c9
+--- /dev/null
++++ b/drivers/misc/adb4000/spi_comm.c
+@@ -0,0 +1,107 @@
++#define DEBUG
++#include "spi_comm.h"
++#include <linux/crc32.h>
++
++#define CRC32_SEED 0x04C11DB7UL
++
++static int spi_comm_resend(struct spi_comm *spi) {
++ return spi_async(spi->spi, &spi->msg);
++}
++
++static int spi_comm_recv(struct spi_comm *spi, char buf[XM_SPI_BUF_SIZE]) {
++ u32 crc, crcr;
++ crc = crc32(CRC32_SEED, spi->rx+1, XM_SPI_BUF_SIZE);
++ pr_debug("Got %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
++ spi->rx[1], spi->rx[2], spi->rx[3], spi->rx[4],
++ spi->rx[5], spi->rx[6], spi->rx[7], spi->rx[8],
++ spi->rx[9], spi->rx[10], spi->rx[11], spi->rx[12]);
++ memcpy(&crcr, spi->rx + XM_SPI_BUF_SIZE+1, sizeof(crc));
++ pr_debug("CRC %08X vs %08X\n", crc, crcr);
++ if(crc == crcr) {
++ memcpy(buf, spi->rx, XM_SPI_BUF_SIZE);
++ return 1;
++ }
++ return 0;
++}
++
++static inline void spi_comm_cb(struct spi_comm *spi, char buf[XM_SPI_BUF_SIZE]) {
++ if(spi->cb == NULL) return;
++ if(spi->cb(buf, spi) >= 0) return;
++ if(spi->pckretry == 0) {
++ dev_warn(&spi->spi->dev, "Msg timed out\n");
++ return;
++ }
++ spi->pckretry--;
++ spi_comm_resend(spi);
++}
++
++static void spi_comm_complete(void *ctx) {
++ struct spi_comm *spi = ctx;
++ char buf[XM_SPI_BUF_SIZE];
++
++ if(spi->msg.status) {
++ spi->state = SPIC_ERR;
++ spi_comm_cb(spi, NULL);
++ return;
++ }
++ if(!spi_comm_recv(spi, buf)) {
++ if(spi->pckretry) {
++ spi->pckretry--;
++ spi_comm_resend(spi);
++ return;
++ }
++ spi->state = SPIC_CRCERR;
++ spi_comm_cb(spi, NULL);
++ return;
++ }
++ spi_comm_cb(spi, spi->rx + 1);
++ return;
++}
++
++int spi_comm_msg(struct spi_comm *spi, char buf[XM_SPI_BUF_SIZE]) {
++ u32 crc;
++
++ pr_debug("Msg %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
++ buf[0], buf[1], buf[2], buf[3],
++ buf[4], buf[5], buf[6], buf[7],
++ buf[8], buf[9], buf[10], buf[11]);
++ memcpy(spi->tx, buf, XM_SPI_BUF_SIZE);
++ crc = crc32(CRC32_SEED, buf, XM_SPI_BUF_SIZE);
++ pr_debug("CRC 0x%08x size %i+%i\n", crc, XM_SPI_BUF_SIZE, sizeof(crc));
++ memcpy(spi->tx + XM_SPI_BUF_SIZE, &crc, sizeof(crc));
++ spi->trans.tx_buf = spi->tx;
++ spi->trans.rx_buf = spi->rx;
++ spi->trans.len = sizeof(spi->tx);
++ spi_message_init(&spi->msg);
++ spi->msg.spi = spi->spi;
++ spi->msg.complete = spi_comm_complete;
++ spi->msg.context = spi;
++ spi->pckretry = spi->retries;
++ spi_message_add_tail(&spi->trans, &spi->msg);
++ return spi_comm_resend(spi);
++}
++
++int spi_comm_init(struct spi_comm *spic, struct spi_device *spi, int retries,
++ int busypin) {
++ spic->spi = spi;
++ spic->retries = retries;
++ spic->pckretry = retries;
++ return 0;
++}
++
++void spi_comm_destroy(struct spi_comm *spic) {
++ return;
++}
++
++int spi_comm_busy(struct spi_comm *spic) {
++ return 0;
++}
++
++EXPORT_SYMBOL(spi_comm_msg);
++EXPORT_SYMBOL(spi_comm_destroy);
++EXPORT_SYMBOL(spi_comm_init);
++EXPORT_SYMBOL(spi_comm_busy);
++
++MODULE_AUTHOR("Benjamin Tietz <benjamin.tietz@in-circuit.de>");
++MODULE_DESCRIPTION("XMEGA-SPI Communication Protocol");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/misc/adb4000/spi_comm.h b/drivers/misc/adb4000/spi_comm.h
+new file mode 100644
+index 0000000..a9e3619
+--- /dev/null
++++ b/drivers/misc/adb4000/spi_comm.h
+@@ -0,0 +1,49 @@
++#ifndef __SPI_COMM_H
++#define __SPI_COMM_H
++
++#include <linux/spi/spi.h>
++#include <linux/wait.h>
++
++#define XM_SPI_BUF_SIZE 12
++//#define XM_SPI_BUF_SIZE 28
++#define CRC32_SEED 0x04C11DB7UL
++
++struct spi_comm;
++struct spi_comm {
++ /* These fields must be initialized by the driver */
++ struct spi_device *spi;
++ int (*cb)(char buf[XM_SPI_BUF_SIZE], struct spi_comm *);
++ int retries;
++ /* This imposes the actual state of the received msg */
++ enum {
++ SPIC_OK,
++ SPIC_CRCERR,
++ SPIC_ERR,
++ } state;
++ int msg_state;
++ /* These should be ignored and handled internally */
++#ifdef CONFIG_SPI_COMM_V2
++ int busypin, busyirq, sending;
++ wait_queue_head_t busywaiter;
++#else
++ int pckretry;
++ struct spi_message msg;
++ struct spi_transfer trans;
++ char rx[XM_SPI_BUF_SIZE + 5], tx[XM_SPI_BUF_SIZE + 5];
++#endif
++};
++
++/*
++ * This intializes and set up a spi_comm struct.
++ */
++int spi_comm_init(struct spi_comm *spic, struct spi_device *spi, int retries,
++ int busypin);
++void spi_comm_destroy(struct spi_comm *spic);
++
++int spi_comm_busy(struct spi_comm *spic);
++/*
++ * This set up a new message and queues it to be send
++ */
++int spi_comm_msg(struct spi_comm *spi, char buf[XM_SPI_BUF_SIZE]);
++
++#endif
+diff --git a/drivers/misc/adb4000/supervisor.c b/drivers/misc/adb4000/supervisor.c
+new file mode 100644
+index 0000000..f5c3b2a
+--- /dev/null
++++ b/drivers/misc/adb4000/supervisor.c
+@@ -0,0 +1,1411 @@
++/*
++ * This is the kernel-driver for the ADB4000 Supervisor
++ *
++ * (C) 2010 by Benjamin Tietz <benjamin.tietz@in-circuit.de>
++ */
++
++//#define DEBUG
++
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/errno.h>
++#include <linux/timer.h>
++#include <linux/wait.h>
++#include <linux/sched.h>
++#include <linux/leds.h>
++#include <linux/platform_device.h>
++#ifdef CONFIG_SUPERVISOR_IRQ
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#endif
++#ifdef CONFIG_SUPERVISOR_UART
++#include <linux/serial_core.h>
++#endif
++#ifdef CONFIG_SUPERVISOR_SYSFS
++#include <linux/hwmon-sysfs.h>
++#endif
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++#include <linux/firmware.h>
++#include <linux/crc32.h>
++#endif
++#include <linux/delay.h>
++#include <linux/gpio.h>
++#include "spi_comm.h"
++#include "supervisor.h"
++
++#define UART_NAME "ttyU"
++#define UART_MAJOR 204
++#define UART_MINOR 160
++#define UART_NR 4
++#define PORT_UARTEXTENDER 0xCBC
++#define UART_BUFSIZE 1024
++
++#define SUPERVISOR_SENDTO 20
++
++#define SUP_ADC_NUM 2
++#define SPI_VERSION_STRING "ICURTGP1.1"
++#define SPI_BL_VERSION_STRING "ICBOOTL0.1"
++
++typedef uint32_t counter_t;
++
++struct supervisor_data;
++#ifdef CONFIG_SUPERVISOR_UART
++struct uartextender_port {
++ struct uart_port uart;
++ struct supervisor_data *data;
++ int enabled:1, rx:1, tx:1;
++};
++#endif
++
++#ifdef CONFIG_SUPERVISOR_ADC
++enum supervisor_adc_type {
++ SUP_ADC_0_10_V,
++ SUP_ADC_4_20_mA,
++};
++#endif
++
++struct supervisor_data {
++ struct spi_comm spic;
++ struct gpio_chip gpioc;
++ spinlock_t lock;
++
++ /* transmission control */
++ char rx[XM_SPI_BUF_SIZE/3][3], tx[XM_SPI_BUF_SIZE/3][3];
++ wait_queue_head_t recvq;
++ int rx_valid:1, last_valid:1;
++ struct timer_list recvtimer, sendtimer;
++
++#ifdef CONFIG_SUPERVISOR_LED
++ /* LEDs */
++ struct gpio_led leds[4];
++ struct gpio_led_platform_data leds_plat;
++ struct platform_device leds_dev;
++#endif
++
++#ifdef CONFIG_SUPERVISOR_IRQ
++ /* Interrupt support */
++ int firq;
++#endif
++#if defined(CONFIG_SUPERVISOR_UART) || defined(CONFIG_SUPERVISOR_IRQ)
++ int hirq;
++#endif
++
++#ifdef CONFIG_SUPERVISOR_UART
++ struct timer_list ussendtimer;
++ struct timer_list testtimer;
++ struct uartextender_port port[UART_NR];
++ int ports_enabled;
++#endif
++#ifdef CONFIG_SUPERVISOR_BUZZER
++#endif
++#ifdef CONFIG_SUPERVISOR_ADC
++ enum supervisor_adc_type sensortype[SUP_ADC_NUM];
++#endif
++#ifndef CONFIG_SUPERVISOR_NOCHECK
++ int found:1;
++#endif
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ int bootloader:1;
++ enum {
++ BL_INIT = 0,
++ BL_WAIT_FW,
++ BL_CONTACTING,
++ BL_LOADING,
++ BL_VERIFYING,
++ BL_DONE,
++ BL_ERR,
++ } blstate;
++ wait_queue_head_t blw;
++ struct workqueue_struct *blwq;
++ struct work_struct blwork;
++ char blbuf[XM_SPI_BUF_SIZE];
++#endif
++#ifdef CONFIG_SUPERVISOR_CNTIN
++ int cnt_valid:1, cnt_tx_sent:1;
++ char cnt_buf[sizeof(counter_t)];
++ char cnt_tx_buf[XM_SPI_BUF_SIZE];
++#endif
++};
++
++#ifdef CONFIG_SUPERVISOR_BUZZER
++static ssize_t sp_buzzer(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len);
++#endif
++#ifdef CONFIG_SUPERVISOR_ADC
++static ssize_t sen_val(struct device *dev,
++ struct device_attribute *dattr, char *buf);
++static ssize_t sen_get_type(struct device *dev,
++ struct device_attribute *dattr, char *buf);
++static ssize_t sen_set_type(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len);
++static ssize_t sen_get_cal(struct device *dev,
++ struct device_attribute *dattr, char *buf);
++static ssize_t sen_set_cal(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len);
++
++#define ADCCALVMIN (0<<8)
++#define ADCCALVMAX (1<<8)
++#define ADCCALCMIN (2<<8)
++#define ADCCALCMAX (3<<8)
++#endif
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++static ssize_t bl_start_load(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len);
++static ssize_t bl_get_state(struct device *dev,
++ struct device_attribute *dattr, char *buf);
++#endif
++#ifdef CONFIG_SUPERVISOR_CNTIN
++static ssize_t cnt_set(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len);
++static ssize_t cnt_get(struct device *dev,
++ struct device_attribute *dattr, char *buf);
++#endif
++
++
++#ifdef CONFIG_SUPERVISOR_SYSFS
++static struct sensor_device_attribute sp_sensors[] = {
++#ifdef CONFIG_SUPERVISOR_BUZZER
++ SENSOR_ATTR(buzzer, 0222, NULL, sp_buzzer, GE_BUZZER),
++#endif
++#ifdef CONFIG_SUPERVISOR_ADC
++ SENSOR_ATTR(adc0raw, 0444, sen_val, NULL, GE_ADC(0)),
++ SENSOR_ATTR(adc1raw, 0444, sen_val, NULL, GE_ADC(1)),
++ SENSOR_ATTR(adc0type, 0666, sen_get_type, sen_set_type, 0),
++ SENSOR_ATTR(adc1type, 0666, sen_get_type, sen_set_type, 1),
++ SENSOR_ATTR(adc0value, 0444, sen_val, NULL, GE_ADCCALIB(0)),
++ SENSOR_ATTR(adc1value, 0444, sen_val, NULL, GE_ADCCALIB(1)),
++ SENSOR_ATTR(adc0calibVmax, 0644,
++ sen_get_cal, sen_set_cal, ADCCALVMAX | 0),
++ SENSOR_ATTR(adc1calibVmax, 0644,
++ sen_get_cal, sen_set_cal, ADCCALVMAX | 1),
++ SENSOR_ATTR(adc0calibVmin, 0644,
++ sen_get_cal, sen_set_cal, ADCCALVMIN | 0),
++ SENSOR_ATTR(adc1calibVmin, 0644,
++ sen_get_cal, sen_set_cal, ADCCALVMIN | 1),
++ SENSOR_ATTR(adc0calibCmax, 0644,
++ sen_get_cal, sen_set_cal, ADCCALCMAX | 0),
++ SENSOR_ATTR(adc1calibCmax, 0644,
++ sen_get_cal, sen_set_cal, ADCCALCMAX | 1),
++ SENSOR_ATTR(adc0calibCmin, 0644,
++ sen_get_cal, sen_set_cal, ADCCALCMIN | 0),
++ SENSOR_ATTR(adc1calibCmin, 0644,
++ sen_get_cal, sen_set_cal, ADCCALCMIN | 1),
++#endif
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ SENSOR_ATTR(firmware, 0640, bl_get_state, bl_start_load, 0),
++#endif
++#ifdef CONFIG_SUPERVISOR_CNTIN
++ SENSOR_ATTR(counter0, 0666, cnt_get, cnt_set, 0),
++ SENSOR_ATTR(counter1, 0666, cnt_get, cnt_set, 1),
++ SENSOR_ATTR(counter2, 0666, cnt_get, cnt_set, 2),
++ SENSOR_ATTR(counter3, 0666, cnt_get, cnt_set, 3),
++ SENSOR_ATTR(counter4, 0666, cnt_get, cnt_set, 4),
++#endif
++};
++#endif
++
++#ifdef CONFIG_SUPERVISOR_ATOI
++static int sp_atoi(const uint8_t *buf, size_t len) {
++ int value = 0;
++ int i;
++ for(i=0; i<len; i++) {
++ if(buf[i] < '0') break;
++ if(buf[i] > '9') break;
++ value = value * 10 + buf[i] - '0';
++ }
++ return value;
++}
++#endif
++
++#ifdef CONFIG_SUPERVISOR_UART
++static struct uart_driver uartextender_uart = {
++ .owner = THIS_MODULE,
++ .driver_name = "spi_uartextender",
++ .dev_name = UART_NAME,
++ .major = UART_MAJOR,
++ .minor = UART_MINOR,
++ .nr = UART_NR,
++ .cons = NULL,
++};
++
++static void uartextender_send_pck(struct supervisor_data *data,
++ uint8_t buf[XM_SPI_BUF_SIZE]) {
++ unsigned long flags;
++ spin_lock_irqsave(&data->lock, flags);
++ if(timer_pending(&data->ussendtimer)) del_timer(&data->ussendtimer);
++ if(data->ports_enabled)
++ mod_timer(&data->testtimer, jiffies + msecs_to_jiffies(100));
++ spi_comm_msg(&data->spic, buf);
++ spin_unlock_irqrestore(&data->lock, flags);
++
++}
++
++static unsigned int uartextender_tx_empty(struct uart_port *port) {
++ return TIOCSER_TEMT;
++}
++
++static void uartextender_set_mctrl(struct uart_port *port, unsigned int mctrl) {
++ return;
++}
++
++static unsigned int uartextender_get_mctrl(struct uart_port *port) {
++ return (TIOCM_CTS|TIOCM_DSR);
++}
++
++static void uartextender_start_tx(struct uart_port *uport) {
++ struct uartextender_port *port = (struct uartextender_port *) uport;
++ if(port->enabled == 0)
++ return;
++ port->tx = 1;
++}
++
++static void uartextender_stop_tx(struct uart_port *uport) {
++ struct uartextender_port *port = (struct uartextender_port *) uport;
++ if(port->enabled == 0)
++ return;
++ port->tx = 0;
++}
++
++static void uartextender_stop_rx(struct uart_port *uport) {
++ struct uartextender_port *port = (struct uartextender_port *) uport;
++ if(port->enabled == 0)
++ return;
++ port->rx = 1;
++}
++
++static int uartextender_startup(struct uart_port *uport) {
++ struct uartextender_port *port = (struct uartextender_port *) uport;
++ pr_debug("startup port %i\n", uport->line);
++ if(port->enabled) return 0;
++ port->enabled = 1;
++ port->data->ports_enabled++;
++ return 0;
++}
++
++static void uartextender_shutdown(struct uart_port *uport) {
++ struct uartextender_port *port = (struct uartextender_port *) uport;
++ pr_debug("shutdown port %i\n", uport->line);
++ if(!port->enabled) return;
++ port->enabled = 0;
++ port->data->ports_enabled--;
++}
++
++static void uartextender_flush_buffer(struct uart_port *port) {
++ return;
++}
++
++static void uartextender_set_termios(struct uart_port *port,
++ struct ktermios *termios, struct ktermios *old) {
++ struct uartextender_port *uport = (struct uartextender_port *) port;
++ uint8_t buf[XM_SPI_BUF_SIZE] = {0x80, port->line, 1, };
++ unsigned int baud;
++ baud = uart_get_baud_rate(port, termios, old, 0, 32000000UL);
++ buf[3] = baud >> 16;
++ buf[4] = baud >> 8;
++ buf[5] = baud & 0xFF;
++ switch(termios->c_cflag & CSIZE) {
++ case CS5: buf[10] = 5; break;
++ case CS6: buf[10] = 6; break;
++ case CS7: buf[10] = 7; break;
++ default: buf[10] = 8; break;
++ }
++ if(termios->c_cflag & PARENB) {
++ if(termios->c_cflag & PARODD)
++ buf[11] = 2;
++ else
++ buf[11] = 1;
++ }
++ if(termios->c_cflag & CSTOPB)
++ buf[11] |= (1<<7);
++ uartextender_send_pck(uport->data, buf);
++};
++
++static const char *uartextender_type(struct uart_port *port) {
++ if(port->type == PORT_UARTEXTENDER) return "UARTEXTENDER";
++ return NULL;
++}
++
++static void uartextender_config_port(struct uart_port *port, int flags) {
++ if(flags & UART_CONFIG_TYPE) {
++ port->type = PORT_UARTEXTENDER;
++ }
++}
++
++static int uartextender_verify_port(struct uart_port *port,
++ struct serial_struct *ser) {
++ if(port->type == PORT_UARTEXTENDER) return 0;
++ if(port->type == PORT_UNKNOWN) return 0;
++ return -EINVAL;
++}
++
++static struct uart_ops uartextender_uops = {
++ .tx_empty = uartextender_tx_empty,
++ .set_mctrl = uartextender_set_mctrl,
++ .get_mctrl = uartextender_get_mctrl,
++ .stop_tx = uartextender_stop_tx,
++ .start_tx = uartextender_start_tx,
++ .stop_rx = uartextender_stop_rx,
++ .startup = uartextender_startup,
++ .shutdown = uartextender_shutdown,
++ .flush_buffer = uartextender_flush_buffer,
++ .set_termios = uartextender_set_termios,
++ .type = uartextender_type,
++ .config_port = uartextender_config_port,
++ .verify_port = uartextender_verify_port,
++};
++
++/*********************************************************
++ * UART Stuff
++ *********************************************************/
++static int uartextender_send(struct uartextender_port *port) {
++ uint8_t buf[XM_SPI_BUF_SIZE] = {GE_USART(port->uart.line),};
++ struct circ_buf *xmit = &port->uart.state->xmit;
++ int ret = 0;
++ if(!port->enabled) return 0;
++ if(port->uart.x_char) {
++ buf[1]++;
++ buf[buf[1]+1] = port->uart.x_char;
++ port->uart.x_char = 0;
++ }
++ if(uart_tx_stopped(&port->uart)) {
++ if(buf[1])
++ uartextender_send_pck(port->data, buf);
++ return buf[1];
++ }
++ while(!uart_circ_empty(xmit) && (buf[1] < (XM_SPI_BUF_SIZE-2))) {
++ buf[1]++;
++ buf[buf[1]+1] = xmit->buf[xmit->tail];
++ xmit->tail = (xmit->tail+1)&(UART_XMIT_SIZE-1);
++ ret++;
++ }
++ if(buf[1])
++ uartextender_send_pck(port->data, buf);
++
++ if(uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
++ uart_write_wakeup(&port->uart);
++
++ return buf[1];
++}
++
++static void ue_noptrans(unsigned long _data) {
++ struct supervisor_data *data = (void *) _data;
++ char rbuf[XM_SPI_BUF_SIZE] = {};
++ int i;
++ unsigned long flags;
++
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ if(data->bootloader) return;
++#endif
++ spin_lock_irqsave(&data->lock, flags);
++ for(i=0;i<UART_NR;i++) {
++ if(uartextender_send(&data->port[i]) != 0) break;
++ }
++ if(i==UART_NR)
++ spi_comm_msg(&data->spic, rbuf);
++ spin_unlock_irqrestore(&data->lock, flags);
++}
++
++static void ue_starttrans(unsigned long _data) {
++ struct supervisor_data *data = (void *) _data;
++ int i;
++ unsigned long flags;
++
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ if(data->bootloader) return;
++#endif
++ spin_lock_irqsave(&data->lock, flags);
++ for(i=0;i<UART_NR;i++) {
++ if(uartextender_send(&data->port[i]) != 0) break;
++ }
++ if(i==UART_NR && data->ports_enabled)
++ mod_timer(&data->testtimer, jiffies + msecs_to_jiffies(100));
++ spin_unlock_irqrestore(&data->lock, flags);
++}
++
++static struct uart_port uartextender_porttemplate = {
++ .iotype = UPIO_MEM,
++ .ops = &uartextender_uops,
++ .type = PORT_UARTEXTENDER,
++ .fifosize = 10,
++};
++
++#endif // CONFIG_SUPERVISOR_UART
++
++static void supervisor_rxinval(unsigned long _data) {
++ struct supervisor_data *data = (struct supervisor_data *) _data;
++ unsigned long flags;
++ spin_lock_irqsave(&data->lock, flags);
++ data->rx_valid = 0;
++ spin_unlock_irqrestore(&data->lock, flags);
++}
++
++static void supervisor_send(unsigned long _data) {
++ struct supervisor_data *data = (struct supervisor_data *) _data;
++ unsigned long flags;
++ pr_debug("Send Msg\n");
++ spin_lock_irqsave(&data->lock, flags);
++ if(data->tx[0][0]) {
++ data->last_valid = 1;
++ spi_comm_msg(&data->spic, (char *) data->tx);
++#ifdef CONFIG_SUPERVISOR_CNTIN
++ } else if(data->cnt_tx_buf[0] && !data->cnt_tx_sent) {
++ data->last_valid = 1;
++ data->cnt_tx_sent = 1;
++ spi_comm_msg(&data->spic, data->cnt_tx_buf);
++#endif
++ } else {
++ data->last_valid = 0;
++ spi_comm_msg(&data->spic, (char *) data->tx);
++ }
++ memset(data->tx, 0, sizeof(data->tx));
++ spin_unlock_irqrestore(&data->lock, flags);
++}
++
++#ifdef CONFIG_SUPERVISOR_CNTIN
++
++static void supervisor_reset_send(struct supervisor_data *data,
++ char buf[XM_SPI_BUF_SIZE]) {
++ unsigned long flags;
++ spin_lock_irqsave(&data->lock, flags);
++ memcpy(data->cnt_tx_buf, buf, XM_SPI_BUF_SIZE);
++ data->cnt_tx_sent = 0;
++ if(!timer_pending(&data->sendtimer)) {
++ data->sendtimer.expires =
++ jiffies + msecs_to_jiffies(SUPERVISOR_SENDTO);
++ add_timer(&data->sendtimer);
++ }
++ spin_unlock_irqrestore(&data->lock, flags);
++}
++static void supervisor_cntreg_set(struct supervisor_data *data, int counter,
++ uint32_t value) {
++ char buf[XM_SPI_BUF_SIZE] = { GE_CNTER_SET, counter,
++ //value >> 24, value >> 16, value >> 8, value >> 0,
++ value >> 0, value >> 8, value >> 16, value >> 24,
++ };
++
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ if(data->bootloader) return;
++#endif
++ supervisor_reset_send(data, buf);
++}
++
++static counter_t supervisor_cntreg_get(struct supervisor_data *data, int num) {
++ unsigned long flags;
++ char buf[XM_SPI_BUF_SIZE] = { GE_CNTER_GET, num, };
++ counter_t ret;
++ int i;
++
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ if(data->bootloader) return 0;
++#endif
++ pr_debug("Recv Counter\n");
++ data->cnt_valid = 0;
++ do {
++ supervisor_reset_send(data, buf);
++ wait_event_interruptible_timeout(data->recvq, data->cnt_valid,
++ msecs_to_jiffies(10));
++ if(data->cnt_valid) {
++ spin_lock_irqsave(&data->lock, flags);
++ ret = 0;
++ for(i=sizeof(ret);i>0;i--) {
++ ret = ret<<8;
++ ret += data->cnt_buf[i-1];
++ }
++ spin_unlock_irqrestore(&data->lock, flags);
++ return ret;
++ }
++ } while(1);
++}
++
++static ssize_t cnt_set(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(dattr);
++ int value = sp_atoi(buf, len);
++ if((buf[0] == 'r') || (buf[0] == 'R'))
++ value = 0xFFFFFFFFUL;
++ supervisor_cntreg_set(data, attr->index, value);
++ return len;
++}
++
++static ssize_t cnt_get(struct device *dev,
++ struct device_attribute *dattr, char *buf) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(dattr);
++ return sprintf(buf, "%li\n",
++ (long) supervisor_cntreg_get(data, attr->index));
++}
++#endif
++/*********************************************************
++ * Register handling
++ *********************************************************/
++static void supervisor_setreg_mask(struct supervisor_data *data, int reg,
++ int port, int mask) {
++ int i;
++ unsigned long flags;
++
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ if(data->bootloader) return;
++#endif
++ spin_lock_irqsave(&data->lock, flags);
++ for(i=0; i<ARRAY_SIZE(data->tx); i++) {
++ if((data->tx[i][0] == reg) && (data->tx[i][1] == port)) {
++ data->tx[i][2] |= mask;
++ spin_unlock_irqrestore(&data->lock, flags);
++ return;
++ }
++ if(data->tx[i][0] != 0) continue;
++ data->tx[i][0] = reg;
++ data->tx[i][1] = port;
++ data->tx[i][2] = mask;
++ if(!timer_pending(&data->sendtimer)) {
++ data->sendtimer.expires =
++ jiffies + msecs_to_jiffies(SUPERVISOR_SENDTO);
++ add_timer(&data->sendtimer);
++ }
++ spin_unlock_irqrestore(&data->lock, flags);
++ return;
++ }
++ // Queue is full, schedule transfer and open next.
++ del_timer(&data->sendtimer);
++ spin_unlock_irqrestore(&data->lock, flags);
++ supervisor_send((unsigned long) data);
++ data->tx[0][0] = reg;
++ data->tx[0][1] = port;
++ data->tx[0][2] = mask;
++ for(i=1;i<ARRAY_SIZE(data->tx); i++) {
++ data->tx[i][0] = 0;
++ data->tx[i][1] = 0;
++ data->tx[i][2] = 0;
++ }
++ data->sendtimer.expires = jiffies + msecs_to_jiffies(SUPERVISOR_SENDTO);
++ add_timer(&data->sendtimer);
++}
++
++static void supervisor_setreg(struct supervisor_data *data, int reg, int pin) {
++ supervisor_setreg_mask(data, reg, pin>>3, 1<<(pin &0x07));
++}
++
++static int supervisor_getreg_raw(struct supervisor_data *data, int reg,
++ int port, int testport) {
++ int i, ignore = 0;
++ unsigned long flags;
++
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ if(data->bootloader) return 0;
++#endif
++ do {
++ spin_lock_irqsave(&data->lock, flags);
++ for(i=0;i<ARRAY_SIZE(data->rx);i++) {
++ if(!data->rx_valid) break;
++ if(data->rx[i][0] == 0) break;
++ if(data->rx[i][0] != reg) continue;
++ if(testport && (data->rx[i][1] != port)) continue;
++ spin_unlock_irqrestore(&data->lock, flags);
++ return (data->rx[i][1]<<8)|data->rx[i][2];
++ }
++ // No actual data got
++ if(!ignore) {
++ supervisor_setreg_mask(data, reg, port, 0);
++ del_timer(&data->recvtimer);
++ }
++ ignore = !ignore;
++ data->rx_valid = 0;
++ spin_unlock_irqrestore(&data->lock, flags);
++ wait_event_interruptible(data->recvq, data->rx_valid);
++ } while(1);
++}
++
++static int supervisor_getreg_mask(struct supervisor_data *data, int reg,
++ int port, int mask) {
++ return supervisor_getreg_raw(data, reg, port, 1) & mask;
++}
++
++static int supervisor_getreg(struct supervisor_data *data, int reg, int pin) {
++ return supervisor_getreg_mask(data, reg, pin>>3, 1<<(pin&0x07))?1:0;
++}
++
++/*********************************************************
++ * GPIO handling
++ *********************************************************/
++
++static int supervisor_dirin(struct gpio_chip *gpio, unsigned int offset) {
++ struct supervisor_data *data =
++ container_of(gpio, struct supervisor_data, gpioc);
++ int ret = 0;
++ if(offset < 8) {
++ supervisor_setreg(data, GE_IER, offset);
++ } else if(offset < 24) {
++ ret = -EACCES;
++ }
++ return ret;
++}
++
++static int supervisor_dirout(struct gpio_chip *gpio, unsigned int offset,
++ int value) {
++ struct supervisor_data *data =
++ container_of(gpio, struct supervisor_data, gpioc);
++ int ret = 0;
++ int reg = value?GE_OER:GE_ODR;
++ if(offset < 8) {
++ supervisor_setreg(data, GE_IDR, offset);
++ }
++ if(offset >= 24) {
++ ret = -EACCES;
++ } else if (ret == 0) {
++ supervisor_setreg(data, reg, offset);
++ }
++ return ret;
++}
++
++static int supervisor_get(struct gpio_chip *gpio, unsigned int offset) {
++ struct supervisor_data *data =
++ container_of(gpio, struct supervisor_data, gpioc);
++ int ret = 0;
++ ret = supervisor_getreg(data, GE_PPR, offset)?1:0;
++ return ret;
++}
++
++static void supervisor_set(struct gpio_chip *gpio, unsigned int offset, int value) {
++ struct supervisor_data *data =
++ container_of(gpio, struct supervisor_data, gpioc);
++ int reg = value?GE_OER:GE_ODR;
++
++ supervisor_setreg(data, reg, offset);
++}
++
++#ifdef CONFIG_SUPERVISOR_IRQ
++static int supervisor_to_irq(struct gpio_chip *gpio, unsigned offset) {
++ struct supervisor_data *data =
++ container_of(gpio, struct supervisor_data, gpioc);
++ pr_debug("gpio %i to irq %i\n", offset, data->firq+offset);
++ if(offset < 16) {
++ return data->firq + offset;
++ }
++ return -1;
++}
++#else
++#define supervisor_to_irq NULL
++#endif
++
++static struct gpio_chip supervisor_gpio = {
++ .owner = THIS_MODULE,
++ .direction_input = supervisor_dirin,
++ .direction_output = supervisor_dirout,
++ .get = supervisor_get,
++ .set = supervisor_set,
++ .to_irq = supervisor_to_irq,
++ .base = -1,
++ .ngpio = 16,
++ .can_sleep = 1,
++ .label = "supervisor0",
++};
++
++#ifdef CONFIG_SUPERVISOR_IRQ
++/*********************************************************
++ * IRQ Stuff
++ *********************************************************/
++
++static void supervisor_irq_mask(unsigned irq) {
++ struct supervisor_data *data = get_irq_chip_data(irq);
++
++ supervisor_setreg(data, GE_IDR, irq - data->firq);
++}
++
++static void supervisor_irq_unmask(unsigned irq) {
++ struct supervisor_data *data = get_irq_chip_data(irq);
++
++ supervisor_setreg(data, GE_IER, irq - data->firq);
++}
++
++static int supervisor_irq_type(unsigned irq, unsigned type) {
++ if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
++ return -EINVAL;
++ return 0;
++}
++
++static struct irq_chip supervisor_irq = {
++ .name = "supervisor",
++ .mask = supervisor_irq_mask,
++ .unmask = supervisor_irq_unmask,
++ .set_type = supervisor_irq_type,
++};
++
++#endif
++
++#if defined(CONFIG_SUPERVISOR_UART) || defined(CONFIG_SUPERVISOR_IRQ)
++
++static irqreturn_t supervisor_irqh(int irq, void *_data) {
++ struct supervisor_data *data = _data;
++#ifdef CONFIG_SUPERVISOR_UART
++ unsigned long flags;
++#endif
++
++#ifdef CONFIG_SUPERVISOR_IRQ
++ supervisor_setreg(data, GE_ISR, 0);
++ supervisor_setreg(data, GE_ISR, 8);
++#endif
++#ifdef CONFIG_SUPERVISOR_UART
++ spin_lock_irqsave(&data->lock, flags);
++ if(timer_pending(&data->ussendtimer))
++ mod_timer(&data->ussendtimer, jiffies + msecs_to_jiffies(1));
++ spin_unlock_irqrestore(&data->lock, flags);
++#endif
++
++ return IRQ_HANDLED;
++}
++
++#endif
++
++/*********************************************************
++ * Buzzer
++ *********************************************************/
++#ifdef CONFIG_SUPERVISOR_BUZZER
++static ssize_t sp_buzzer(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(dattr);
++ int value = sp_atoi(buf, len);
++ supervisor_setreg_mask(data, attr->index, value >> 8, value & 0xFFU);
++ return len;
++}
++#endif
++
++/*********************************************************
++ * A/D Converter
++ *********************************************************/
++#ifdef CONFIG_SUPERVISOR_ADC
++static ssize_t sen_val(struct device *dev,
++ struct device_attribute *dattr, char *buf) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(dattr);
++ return sprintf(buf, "%i\n",
++ supervisor_getreg_raw(data, attr->index, 0, 0));
++}
++
++static ssize_t sen_get_type(struct device *dev,
++ struct device_attribute *dattr, char *buf) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(dattr);
++ return sprintf(buf, "%s\n",
++ (data->sensortype[attr->index] == SUP_ADC_0_10_V)?
++ "[voltage] current":"voltage [current]");
++}
++
++#define _cal2num(attr) ((attr) & 0xFFU)
++static uint8_t _get_cal_byte(int attr) {
++ switch(attr & 0xFF00U) {
++ case ADCCALVMIN: return GE_ADCSET_V|GE_ADCSET_CALMIN;
++ case ADCCALVMAX: return GE_ADCSET_V|GE_ADCSET_CALMAX;
++ case ADCCALCMIN: return GE_ADCSET_I|GE_ADCSET_CALMIN;
++ case ADCCALCMAX: return GE_ADCSET_I|GE_ADCSET_CALMAX;
++ }
++ return 0;
++}
++
++static ssize_t sen_set_type(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(dattr);
++ int value = ((buf[0]|(1<<5)) == 'v')?GE_ADCSET_V:GE_ADCSET_I;
++
++ data->sensortype[attr->index] = value?SUP_ADC_4_20_mA:SUP_ADC_0_10_V;
++ supervisor_setreg_mask(data, GE_ADCSET, _cal2num(attr->index), value);
++ return len;
++}
++
++static ssize_t sen_get_cal(struct device *dev,
++ struct device_attribute *dattr, char *buf) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(dattr);
++
++ // invalidate cache, as the result may come from another sensor
++ data->rx_valid=0;
++
++ supervisor_setreg_mask(data, GE_ADCSET, _cal2num(attr->index),
++ _get_cal_byte(attr->index));
++ return sprintf(buf, "%i\n", supervisor_getreg_raw(data,
++ GE_ADCGCAL(_cal2num(attr->index)), 0, 0));
++}
++
++static ssize_t sen_set_cal(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ struct sensor_device_attribute *attr = to_sensor_dev_attr(dattr);
++ int value = sp_atoi(buf, len);
++
++ supervisor_setreg_mask(data, GE_ADCSET, _cal2num(attr->index),
++ _get_cal_byte(attr->index));
++ supervisor_setreg_mask(data, GE_ADCSCAL(_cal2num(attr->index)),
++ value >> 8, value & 0xFFU);
++ return len;
++}
++
++#endif
++
++/*********************************************************
++ * Protocol Stuff
++ *********************************************************/
++#ifndef CONFIG_SUPERVISOR_NOCHECK
++static int supervisor_init_cb(char buf[XM_SPI_BUF_SIZE], struct spi_comm *spi) {
++ struct supervisor_data *data =
++ container_of(spi, struct supervisor_data, spic);
++ if(buf == NULL) {
++ dev_info(&spi->spi->dev, "got init-pck NULL spic:%i, spi:%i\n",
++ spi->state, spi->msg_state);
++ if(spi->state == SPIC_CRCERR) return -1;
++ return 0;
++ }
++ dev_info(&spi->spi->dev, "got init-pck '%x%s'\n", buf[0], buf +1);
++ data->found = (strncmp(buf+1, SPI_VERSION_STRING,
++ strlen(SPI_VERSION_STRING)) == 0);
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ if((!data->found) && strncmp(buf + 1, SPI_BL_VERSION_STRING,
++ strlen(SPI_BL_VERSION_STRING)) == 0) {
++ dev_warn(&spi->spi->dev,
++ "Supervisor is in Bootloadermode during init!\n"
++ "Supply a new firmware first!");
++ data->found = 1;
++ data->bootloader = 1;
++ }
++#endif
++ wake_up(&data->recvq);
++ return 0;
++}
++#endif
++
++static int supervisor_cb(char buf[XM_SPI_BUF_SIZE], struct spi_comm *spi) {
++ struct supervisor_data *data =
++ container_of(spi, struct supervisor_data, spic);
++ int i, valid;
++ unsigned long flags, expires;
++#ifdef CONFIG_SUPERVISOR_IRQ
++ int pin, offset;
++#endif
++#ifdef CONFIG_SUPERVISOR_UART
++ struct uart_port *port;
++#endif
++
++ if(buf == NULL) {
++ if(spi->state == SPIC_CRCERR) return -1; // resend last pck
++ return 0;
++ }
++ pr_debug("valid data received\n");
++ spin_lock_irqsave(&data->lock, flags);
++#ifdef CONFIG_SUPERVISOR_UART
++ if((GE_BUSART(buf[0]) >= 0) && (GE_BUSART(buf[0]) < UART_NR) &&
++ (data->port[GE_BUSART(buf[0])].enabled)) {
++ port = &data->port[GE_BUSART(buf[0])].uart;
++ pr_debug("p%02x %p (%ib): ", buf[0], port, buf[1]);
++ for(i=0; i<buf[1]; i++) {
++#ifdef DEBUG
++ printk("%02x ", buf[i+2]);
++#endif
++ if(uart_handle_sysrq_char(port, buf[i+2])) continue;
++ uart_insert_char(port, 0, 0, buf[i+2], 0);
++ }
++#ifdef DEBUG
++ printk("\n");
++#endif
++ tty_flip_buffer_push(port->state->port.tty);
++ }
++#endif
++#ifdef CONFIG_SUPERVISOR_CNTIN
++ if(buf[0] == GE_CNTER_GET) {
++ memcpy(data->cnt_buf, buf + 2, sizeof(counter_t));
++ data->cnt_valid = 1;
++ } else if(buf[0] != GE_CNTER_SET) {
++#endif
++ expires = jiffies + msecs_to_jiffies(100);
++ mod_timer(&data->recvtimer, expires);
++ memcpy(data->rx, buf, XM_SPI_BUF_SIZE);
++ data->rx_valid = 1;
++#ifdef CONFIG_SUPERVISOR_CNTIN
++ }
++#endif
++ wake_up(&data->recvq);
++ /* If the device send valid data, it is possible, that it has more
++ * data left. So schedule a new transmission then */
++ valid = 0;
++ for(i=0; i<ARRAY_SIZE(data->rx); i++) {
++ if(data->rx[i][0] == 0x00) continue; // No data
++ valid = 1;
++#ifdef CONFIG_SUPERVISOR_IRQ
++ if(data->rx[i][0] != GE_ISR) continue;
++ offset = 8 * data->rx[i][1] + data->firq;
++ for(pin=0;pin<8;pin++) {
++ if(!(data->rx[i][2] & (1<<pin)))
++ continue;
++ pr_debug("handle IRQ %i\n", offset + pin);
++ generic_handle_irq(offset + pin);
++ }
++#else
++ break;
++#endif
++ }
++#ifdef CONFIG_SUPERVISOR_UART
++ for(i=0; i<UART_NR; i++) {
++ if(uartextender_send(&data->port[i]) != 0) break;
++ }
++ if(i==UART_NR && ((buf[0] & 0x90) == 0x90)) // There might be more data
++ mod_timer(&data->ussendtimer, jiffies + msecs_to_jiffies(10));
++ if(data->ports_enabled)
++ mod_timer(&data->testtimer, jiffies + msecs_to_jiffies(100));
++#endif
++ if(valid || data->last_valid) {
++ mod_timer(&data->sendtimer,
++ jiffies + msecs_to_jiffies(SUPERVISOR_SENDTO));
++ }
++ spin_unlock_irqrestore(&data->lock, flags);
++ return 0;
++}
++
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++/*********************************************************
++ * Bootloader logic
++ *********************************************************/
++static int supervisor_bootloader_cb(char buf[XM_SPI_BUF_SIZE],
++ struct spi_comm *spi) {
++ unsigned long flags;
++ struct supervisor_data *data =
++ container_of(spi, struct supervisor_data, spic);
++
++ if(buf == NULL) {
++ if(spi->state == SPIC_CRCERR) return -1; // resend last pck
++ return 0;
++ }
++ pr_debug("valid data received\n");
++ spin_lock_irqsave(&data->lock, flags);
++ memcpy(data->blbuf, buf, XM_SPI_BUF_SIZE);
++ wake_up(&data->blw);
++ spin_unlock_irqrestore(&data->lock, flags);
++ return 0;
++}
++
++#define bl_mk_cmd(buf, cmd, size) _bl_mk_cmd(buf, GE_BL_CMD_ ## cmd, size)
++static void _bl_mk_cmd(char buf[XM_SPI_BUF_SIZE], char cmd, int size) {
++ buf[0] = GE_BL_CMD;
++ buf[1] = cmd;
++ buf[2] = size >> 8;
++ buf[3] = size & 0xFFU;
++}
++
++static void bl_mk_data(char buf[XM_SPI_BUF_SIZE], int addr, const char *data,
++ int size) {
++ int i;
++ buf[0] = GE_BL_DATA;
++ buf[1] = addr >> 8;
++ buf[2] = addr & 0xFFU;
++ //buf[3] = (1<<size)-1;
++ for(i=0; i<size; i++) buf[i+4] = data[i];
++}
++
++static void bl_mk_chk(char buf[XM_SPI_BUF_SIZE], int start, int end, long seed)
++{
++ buf[0] = GE_BL_CHKSUM;
++ buf[1] = start >> 16;
++ buf[2] = start >> 8;
++ buf[3] = start;
++ buf[4] = 0;
++ buf[5] = end >> 16;
++ buf[6] = end >> 8;
++ buf[7] = end;
++ buf[8] = seed >> 24;
++ buf[9] = seed >> 16;
++ buf[10] = seed >> 8;
++ buf[11] = seed;
++}
++
++static void update_thread(struct work_struct *work) {
++ struct supervisor_data *data =
++ container_of(work, struct supervisor_data, blwork);
++ const struct firmware *fw;
++ int addr, i, counter;
++ int blpagecount, blpagesize;
++ int status, size, chsize;
++ unsigned long flags;
++ char buf[XM_SPI_BUF_SIZE] = {};
++ char *_dbuf;
++#define dbuf(i) (&_dbuf[(i) * XM_SPI_BUF_SIZE])
++
++ init_waitqueue_head(&data->blw);
++ data->blstate = BL_WAIT_FW;
++ status = request_firmware(&fw, "adb4000.bin", &data->spic.spi->dev);
++ if(status != 0) {
++ dev_warn(&data->spic.spi->dev, "Firmware not found");
++ data->blstate = BL_ERR;
++ goto bl_up_fwnotfound;
++ }
++
++ dev_info(&data->spic.spi->dev, "Contacting Bootloader...");
++ data->blstate = BL_CONTACTING;
++ data->bootloader = 1;
++ data->spic.cb = supervisor_bootloader_cb;
++ do {
++ spin_lock_irqsave(&data->lock, flags);
++ buf[0] = GE_BL_INFO;
++ msleep(40);
++ spi_comm_msg(&data->spic, buf);
++ wait_event_interruptible(data->blw, 1);
++ spin_unlock_irqrestore(&data->lock, flags);
++ blpagesize = data->blbuf[2]<<8|data->blbuf[3];
++ blpagecount = data->blbuf[4]<<8|data->blbuf[5];
++ } while((data->blbuf[0] != GE_BL_INFO) || (blpagesize == 0) || (blpagecount == 0) );
++ dev_info(&data->spic.spi->dev,
++ "Bootloader has %iB per %i pages. Size is %iB",
++ blpagesize, blpagecount, blpagesize * blpagecount);
++ if(fw->size > (blpagesize * blpagecount)) {
++ dev_warn(&data->spic.spi->dev, "Firmware too large");
++ data->blstate = BL_ERR;
++ goto bl_up_tolarge;
++ }
++
++ dev_info(&data->spic.spi->dev, "Loading Firmware...");
++ data->blstate = BL_LOADING;
++ _dbuf = kzalloc(((blpagesize / 8) + 4) * XM_SPI_BUF_SIZE, GFP_KERNEL);
++ for(addr = 0; addr < fw->size; addr += blpagesize) {
++ //spin_lock_irqsave(&data->lock, flags);
++ bl_mk_cmd(dbuf(0), LOAD, addr / blpagesize);
++ spi_comm_msg(&data->spic, dbuf(0));
++ size = blpagesize;
++ if((fw->size - addr) < size) size = fw->size - addr;
++ for(i = addr % blpagesize; i < size; i+=chsize) {
++ chsize = fw->size - addr -i;
++ if(chsize > size - i) chsize = size - i;
++ if(chsize > 8) chsize = 8;
++ //if(i%0x80 == 0) msleep(100);
++ bl_mk_data(dbuf(i/8+3), i, fw->data + addr + i, chsize);
++ spi_comm_msg(&data->spic, dbuf(i/8+1));
++ }
++ //spi_comm_msg(&data->spic, dbuf(1));
++ bl_mk_cmd(dbuf(2), WRITE, addr/blpagesize);
++ //spi_comm_msg(&data->spic, dbuf(2));
++ //spin_unlock_irqrestore(&data->lock, flags);
++ // Wait for write done
++ counter = 0;
++ while((data->blbuf[0] != GE_BL_CMD) ||
++ (data->blbuf[1] != GE_BL_CMD_WRITE)) {
++ wait_event_interruptible_timeout(data->blw, 1,
++ msecs_to_jiffies(100));
++ if(counter == 0) {
++ spi_comm_msg(&data->spic, dbuf(2));
++ counter = 10;
++ } else {
++ spi_comm_msg(&data->spic, dbuf(1));
++ counter --;
++ }
++ msleep(40);
++ }
++ }
++
++ dev_info(&data->spic.spi->dev, "Verifying Firmware...");
++ data->blstate = BL_VERIFYING;
++ spi_comm_msg(&data->spic, dbuf(1));
++ bl_mk_chk(buf, 0, fw->size, CRC32_SEED);
++ counter = 0;
++ do {
++ wait_event_interruptible_timeout(data->blw, 1,
++ msecs_to_jiffies(100));
++ if(counter == 0) {
++ spi_comm_msg(&data->spic, buf);
++ counter = 10;
++ } else {
++ spi_comm_msg(&data->spic, dbuf(1));
++ counter --;
++ }
++ msleep(40);
++ } while(data->blbuf[0] != GE_BL_CHKSUM);
++
++ i = data->blbuf[8]<<24;
++ i |= data->blbuf[9]<<16;
++ i |= data->blbuf[10]<<8;
++ i |= data->blbuf[11];
++ if(i != crc32(CRC32_SEED, fw->data, fw->size)) {
++ data->blstate = BL_ERR;
++ dev_warn(&data->spic.spi->dev, "Checksum doesn't match");
++ goto bl_up_chkerr;
++ }
++
++ dev_info(&data->spic.spi->dev, "Uploading Firmware done");
++ data->blstate = BL_DONE;
++ bl_mk_cmd(buf, RESET, 0);
++ spi_comm_msg(&data->spic, buf);
++
++bl_up_chkerr:
++ kfree(_dbuf);
++bl_up_tolarge:
++ data->spic.cb = supervisor_cb;
++ data->bootloader = 0;
++ release_firmware(fw);
++bl_up_fwnotfound:
++// destroy_workqueue(data->blwq);
++ return;
++}
++
++
++static void bl_init(struct supervisor_data *data) {
++ data->blwq = create_singlethread_workqueue("Supervisor_update");
++ INIT_WORK(&data->blwork, update_thread);
++ queue_work(data->blwq, &data->blwork);
++}
++
++static ssize_t bl_start_load(struct device *dev,
++ struct device_attribute *dattr, const char *buf, size_t len) {
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ bl_init(data);
++ return len;
++}
++
++static ssize_t bl_get_state(struct device *dev,
++ struct device_attribute *dattr, char *buf) {
++ const char *msg = NULL;
++ struct supervisor_data *data = dev_get_drvdata(dev);
++ switch(data->blstate) {
++ case BL_INIT: msg = "not used"; break;
++ case BL_WAIT_FW: msg = "waiting for firmware"; break;
++ case BL_CONTACTING: msg = "contacting"; break;
++ case BL_LOADING: msg = "uploading"; break;
++ case BL_VERIFYING: msg = "verifying"; break;
++ case BL_DONE: msg = "OK"; break;
++ case BL_ERR: msg = "Error"; break;
++ }
++ return sprintf(buf, "%s\n", msg);
++}
++#endif
++
++
++static int __devinit supervisor_probe(struct spi_device *spi) {
++ struct supervisor_data *data;
++ int status = 0;
++ int i;
++
++ i = 0;
++
++ data = kzalloc(sizeof(*data), GFP_KERNEL);
++ if(!data)
++ return -ENOMEM;
++ status = spi_comm_init(&data->spic, spi, 10, (3*32+9));
++ if(status < 0) goto spi_comm_err;
++
++ data->rx_valid = 0;
++ init_waitqueue_head(&data->recvq);
++ spin_lock_init(&data->lock);
++
++ // Timer
++ setup_timer(&data->recvtimer, supervisor_rxinval, (unsigned long) data);
++ setup_timer(&data->sendtimer, supervisor_send, (unsigned long) data);
++
++ // SPI
++ spi_set_drvdata(spi, data);
++#ifndef CONFIG_SUPERVISOR_NOCHECK
++ data->spic.cb = supervisor_init_cb;
++ for(i=3;i>0;i--) {
++ unsigned long flags;
++ char buf[XM_SPI_BUF_SIZE] = { GE_VERSION, };
++ spin_lock_irqsave(&data->lock, flags);
++ if(spi_comm_busy(&data->spic)) {
++ msleep(100);
++ continue;
++ }
++ spi_comm_msg(&data->spic, buf);
++ spin_unlock_irqrestore(&data->lock, flags);
++ wait_event_interruptible_timeout(data->recvq, data->found,
++ msecs_to_jiffies(20));
++ if(data->found) break;
++ }
++ if(!data->found) {
++ dev_warn(&spi->dev, "No Supervisor-Chip found!\n");
++ status = -ENODEV;
++ goto notfound;
++ }
++#endif
++ data->spic.cb = supervisor_cb;
++#ifdef CONFIG_SUPERVISOR_BOOTLOADER
++ if(data->bootloader) bl_init(data);
++#endif
++
++ // GPIO
++ memcpy(&data->gpioc, &supervisor_gpio, sizeof(supervisor_gpio));
++ data->gpioc.dev = &spi->dev;
++ status = gpiochip_add(&data->gpioc);
++ if(status < 0)
++ goto gpioerr;
++
++#ifdef CONFIG_SUPERVISOR_LED
++ // LEDs
++ for(i=0;i<ARRAY_SIZE(data->leds);i++) {
++ data->leds[i].name = kasprintf(GFP_KERNEL, "%s:led%i",
++ dev_name(&spi->dev), i);
++ if(data->leds[i].name == NULL) {
++ status = -ENOMEM;
++ goto ledmemerr;
++ }
++ data->leds[i].gpio = data->gpioc.base + i + 3;
++ data->leds[i].active_low = 1;
++ }
++ data->leds[0].default_trigger = "heartbeat";
++ data->leds[1].default_trigger = "nand-disk";
++ data->leds[2].default_trigger = "mmc0";
++ data->leds[3].default_trigger = "mmc1";
++ data->leds_plat.num_leds = i;
++ data->leds_plat.leds = data->leds;
++ data->leds_dev.name = "leds-gpio";
++ data->leds_dev.dev.platform_data = &data->leds_plat;
++ status = platform_device_register(&data->leds_dev);
++ if(status < 0)
++ goto lederr;
++#endif
++
++#ifdef CONFIG_SUPERVISOR_IRQ
++ data->firq = data->gpioc.base;
++ for(i=data->firq;i<(data->firq + 16);i++) {
++ set_irq_chip(i, &supervisor_irq);
++ set_irq_handler(i, handle_simple_irq);
++ set_irq_flags(i, IRQF_VALID);
++ set_irq_chip_data(i, data);
++ }
++#endif
++
++#ifdef CONFIG_SUPERVISOR_UART
++ setup_timer(&data->ussendtimer, ue_noptrans, (unsigned long) data);
++ setup_timer(&data->testtimer, ue_starttrans, (unsigned long) data);
++
++ for(i=0; i < UART_NR; i++) {
++ memcpy(&data->port[i].uart, &uartextender_porttemplate,
++ sizeof(uartextender_porttemplate));
++ pr_debug("set up uart %i (%p)\n", i, &data->port[i].uart);
++ data->port[i].uart.line = i;
++ data->port[i].uart.dev = &spi->dev;
++ data->port[i].data = data;
++ status = uart_add_one_port(&uartextender_uart,
++ &data->port[i].uart);
++ if(status)
++ pr_warning("Can't add port%i (%i)\n", i, status);
++ }
++#endif
++
++#if defined(CONFIG_SUPERVISOR_IRQ) || defined(CONFIG_SUPERVISOR_UART)
++// data->hirq = (int) spi_get_drvdata(spi);
++ data->hirq = gpio_to_irq(4*32+18);
++ if(data->hirq <= 0) {
++ dev_warn(&spi->dev, "No interrupt!\n");
++ goto irqerr;
++ }
++ status = request_irq(data->hirq, supervisor_irqh, IRQ_TYPE_EDGE_BOTH,
++ "supervisor", data);
++ if(status < 0)
++ goto irqerr;
++#endif
++#ifdef CONFIG_SUPERVISOR_SYSFS
++ for(i=0; i< ARRAY_SIZE(sp_sensors); i++) {
++ if((status = device_create_file(&spi->dev,
++ &sp_sensors[i].dev_attr))<0)
++ goto sysfserr;
++ }
++#endif
++#ifdef CONFIG_SUPERVISOR_CNTIN
++ data->cnt_valid = 0;
++#endif
++
++ return 0;
++
++#ifdef CONFIG_SUPERVISOR_SYSFS
++ i = ARRAY_SIZE(sp_sensors);
++sysfserr:
++ for(;i>0;i--)
++ device_remove_file(&spi->dev, &sp_sensors[i-1].dev_attr);
++#endif
++#if defined(CONFIG_SUPERVISOR_IRQ) || defined(CONFIG_SUPERVISOR_UART)
++ free_irq(data->hirq, data);
++irqerr:
++#endif
++#ifdef CONFIG_SUPERVISOR_LED
++ platform_device_unregister(&data->leds_dev);
++ i = ARRAY_SIZE(data->leds);
++ledmemerr:
++ for(;i>0;i--)
++ kfree(data->leds[i].name);
++lederr:
++#endif
++ if(gpiochip_remove(&data->gpioc) < 0)
++ dev_warn(&spi->dev, "Can't remove GPIO-CHIP!");
++gpioerr:
++notfound:
++ spi_comm_destroy(&data->spic);
++spi_comm_err:
++ kfree(data);
++ return status;
++}
++
++static int __devexit supervisor_remove(struct spi_device *spi) {
++ struct supervisor_data *data = spi_get_drvdata(spi);
++ int i;
++
++#ifdef CONFIG_SUPERVISOR_SYSFS
++ for(i=0; i<ARRAY_SIZE(sp_sensors); i++)
++ device_remove_file(&spi->dev, &sp_sensors[i].dev_attr);
++#endif
++#if defined(CONFIG_SUPERVISOR_IRQ) || defined(CONFIG_SUPERVISOR_UART)
++ free_irq(data->hirq, data);
++#endif
++#ifdef CONFIG_SUPERVISOR_LED
++ platform_device_unregister(&data->leds_dev);
++ for(i=0;i<ARRAY_SIZE(data->leds);i++)
++ kfree(data->leds[i].name);
++#else
++ i = 0;
++#endif
++ if(gpiochip_remove(&data->gpioc) < 0)
++ dev_warn(&spi->dev, "Can't remove GPIO-CHIP!");
++ spi_comm_destroy(&data->spic);
++ kfree(data);
++ return 0;
++}
++
++static struct spi_driver supervisor_driver = {
++ .driver = {
++ .name = "supervisor",
++ .owner = THIS_MODULE,
++ },
++ .probe = supervisor_probe,
++ .remove = __devexit_p(supervisor_remove),
++};
++
++/*********************************************************
++ * Module Stuff
++ *********************************************************/
++static int __init supervisor_init(void) {
++ int status;
++#ifdef CONFIG_SUPERVISOR_UART
++ status = uart_register_driver(&uartextender_uart);
++ if(status < 0)
++ goto uart_err;
++#endif
++ status = spi_register_driver(&supervisor_driver);
++ if(status < 0)
++ goto spi_err;
++
++ return 0;
++
++ spi_unregister_driver(&supervisor_driver);
++spi_err:
++#ifdef CONFIG_SUPERVISOR_UART
++ uart_unregister_driver(&uartextender_uart);
++uart_err:
++#endif
++ return status;
++}
++module_init(supervisor_init);
++
++static void __exit supervisor_exit(void) {
++ spi_unregister_driver(&supervisor_driver);
++#ifdef CONFIG_SUPERVISOR_UART
++ uart_unregister_driver(&uartextender_uart);
++#endif
++}
++module_exit(supervisor_exit);
++
++MODULE_AUTHOR("Benjamin Tietz <benjamin.tietz@in-circuit.de>");
++MODULE_DESCRIPTION("ADB4000 Supervisor");
++MODULE_LICENSE("GPL");
++
+diff --git a/drivers/misc/adb4000/supervisor.h b/drivers/misc/adb4000/supervisor.h
+new file mode 100644
+index 0000000..6fdff83
+--- /dev/null
++++ b/drivers/misc/adb4000/supervisor.h
+@@ -0,0 +1,46 @@
++#ifndef __GPIOEXT_H
++#define __GPIOEXT_H
++
++#define GE_SOR 0x12
++#define GE_SIR 0x11
++#define GE_IOSR 0x10
++#define GE_PPR 0x20
++#define GE_ISR 0x33
++#define GE_IER 0x32
++#define GE_IDR 0x31
++#define GE_IMR 0x30
++#define GE_PER 0x42
++#define GE_PDR 0x41
++#define GE_PSR 0x40
++#define GE_OER 0x52
++#define GE_ODR 0x51
++#define GE_OSR 0x50
++#define GE_BUZZER 0x60
++#define GE_ADCSET 0x6F
++#define GE_ADCSET_V (0<<0)
++#define GE_ADCSET_I (1<<0)
++#define GE_ADCSET_NOCAL (0<<1)
++#define GE_ADCSET_CALMIN (1<<1)
++#define GE_ADCSET_CALMAX (2<<1)
++#define GE_ADCSET_CALMASK (3<<1)
++#define GE_ADC(x) (0x70 + (x))
++#define GE_ADCCALIB(x) (0x74 + (x))
++#define GE_ADCGCAL(x) (0x78 + (x))
++#define GE_ADCSCAL(x) (0x7C + (x))
++#define GE_SETUP_USART 0x80
++#define GE_VERSION 0x81
++#define GE_USART(x) (0x90 + (x))
++#define GE_BUSART(x) ((int) (x) - 0x90)
++#define GE_CNTER_GET 0xA0
++#define GE_CNTER_SET 0xA1
++#define GE_BL_INFO 0xF0
++#define GE_BL_CMD 0xF1
++#define GE_BL_CMD_ERASEALL 0x10
++#define GE_BL_CMD_ERASE 0x11
++#define GE_BL_CMD_WRITE 0x12
++#define GE_BL_CMD_LOAD 0x13
++#define GE_BL_CMD_RESET 0xFF
++#define GE_BL_DATA 0xF2
++#define GE_BL_CHKSUM 0xF3
++
++#endif
+--
+1.7.3.3
+
--- /dev/null
+From 7a34372ce1f84edc36fde3ab3bdf3943c21d2e6a Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin.tietz@in-circuit.de>
+Date: Thu, 16 Dec 2010 13:53:49 +0100
+Subject: [PATCH 17/18] [AT91] raising the number of GPIOs to support additional GPIO-Chips
+
+---
+ arch/arm/mach-at91/include/mach/irqs.h | 2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
+index 36bd55f..97cd0fe 100644
+--- a/arch/arm/mach-at91/include/mach/irqs.h
++++ b/arch/arm/mach-at91/include/mach/irqs.h
+@@ -40,7 +40,7 @@
+ * symbols in gpio.h for ones handled indirectly as GPIOs.
+ * We make provision for 5 banks of GPIO.
+ */
+-#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
++#define NR_IRQS 256 /*(NR_AIC_IRQS + (5 * 32))*/
+
+ /* FIQ is AIC source 0. */
+ #define FIQ_START AT91_ID_FIQ
+--
+1.7.3.3
+
--- /dev/null
+From f5432c38d18ae2b36483ab485ea4d2a3363302de Mon Sep 17 00:00:00 2001
+From: Benjamin Tietz <benjamin.tietz@in-circuit.de>
+Date: Thu, 16 Dec 2010 13:55:21 +0100
+Subject: [PATCH 18/18] [ICnova] Adding ADB4000
+
+This will add support for the ICnova ADB4000 equipped with an
+ICnova SAM9G45 SO-Dimm.
+---
+ arch/arm/mach-at91/Kconfig | 9 +-
+ arch/arm/mach-at91/Makefile | 1 +
+ arch/arm/mach-at91/at91sam9g45_devices.c | 2 +
+ arch/arm/mach-at91/board-icnova_adb4000.c | 371 +++++++++++++++++++++++++++++
+ 4 files changed, 381 insertions(+), 2 deletions(-)
+ create mode 100644 arch/arm/mach-at91/board-icnova_adb4000.c
+
+diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
+index 3c984e1..82fb410 100644
+--- a/arch/arm/mach-at91/Kconfig
++++ b/arch/arm/mach-at91/Kconfig
+@@ -386,8 +386,7 @@ config MACH_ICNOVA_ADB1004
+ bool "In-Circuit ADB1004 G45 Evaluation Kit"
+ help
+ Select this if you are using In-Circuit's ICnova G45 on an ADB1004
+- Development Board. The Configration currently supports the version
+- using the 4.3inch Display
++ Development Board.
+
+ config MACH_ICNOVA_ADB3000
+ bool "In-Circuit ADB3000 G45/FPGA Evaluation Kit"
+@@ -395,6 +394,12 @@ config MACH_ICNOVA_ADB3000
+ Select this if you are using In-Circuit's ICnova G45 on an ADB3000
+ Development Board.
+
++config MACH_ICNOVA_ADB4000
++ bool "In-Circuit ADB4000 G45-SODIMM Evaluation Kit"
++ help
++ Select this if you are using In-Circuit's ICnova G45 SO-Dimm on an
++ ADB4000 Development Board.
++
+ endif
+
+ config ICNOVA_ET050000
+diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
+index be44d7f..c982c06 100644
+--- a/arch/arm/mach-at91/Makefile
++++ b/arch/arm/mach-at91/Makefile
+@@ -69,6 +69,7 @@ obj-$(CONFIG_MACH_ICNOVA_ADB1000) += board-icnova_adb1000.o
+ obj-$(CONFIG_MACH_ICNOVA_ADB1002) += board-icnova_adb1002.o
+ obj-$(CONFIG_MACH_ICNOVA_ADB1004) += board-icnova_adb1004.o
+ obj-$(CONFIG_MACH_ICNOVA_ADB3000) += board-icnova_adb3000.o
++obj-$(CONFIG_MACH_ICNOVA_ADB4000) += board-icnova_adb4000.o
+
+ # AT91CAP9 board-specific support
+ obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o
+diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
+index 0f9955f..f0126de 100644
+--- a/arch/arm/mach-at91/at91sam9g45_devices.c
++++ b/arch/arm/mach-at91/at91sam9g45_devices.c
+@@ -502,7 +502,9 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
+ at91_set_B_periph(AT91_PIN_PA28, 0); /* ERXCK */
+ at91_set_B_periph(AT91_PIN_PA6, 0); /* ETX2 */
+ at91_set_B_periph(AT91_PIN_PA7, 0); /* ETX3 */
++#ifndef CONFIG_MACH_ICNOVA_ADB4000
+ at91_set_B_periph(AT91_PIN_PA27, 0); /* ETXER */
++#endif
+ }
+
+ eth_data = *data;
+diff --git a/arch/arm/mach-at91/board-icnova_adb4000.c b/arch/arm/mach-at91/board-icnova_adb4000.c
+new file mode 100644
+index 0000000..f079b4c
+--- /dev/null
++++ b/arch/arm/mach-at91/board-icnova_adb4000.c
+@@ -0,0 +1,371 @@
++/*
++ * Board-specific setup code for the AT91SAM9M10G45 Evaluation Kit family
++ *
++ * Covers: * AT91SAM9G45-EKES board
++ * * AT91SAM9M10G45-EK board
++ *
++ * Copyright (C) 2009 Atmel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/ads7846.h>
++#include <linux/fb.h>
++#include <linux/gpio_keys.h>
++#include <linux/input.h>
++#include <linux/leds.h>
++#include <linux/clk.h>
++
++#include <mach/hardware.h>
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <mach/hardware.h>
++#include <mach/board.h>
++#include <mach/gpio.h>
++#include <mach/at91sam9_smc.h>
++#include <mach/at91_shdwc.h>
++
++#include "sam9_smc.h"
++#include "generic.h"
++
++
++static void __init ek_map_io(void)
++{
++ /* Initialize processor: 12.000 MHz crystal */
++ at91sam9g45_initialize(12000000);
++
++ /* DGBU on ttyS0. (Rx & Tx only) */
++ at91_register_uart(0, 0, 0);
++
++ // For RS485 you might enable ATMEL_UART_RTS instead of 0
++ at91_register_uart(AT91SAM9G45_ID_US0, 1, 0);
++ at91_register_uart(AT91SAM9G45_ID_US1, 2, 0);
++ at91_register_uart(AT91SAM9G45_ID_US2, 3, 0);
++ //at91_register_uart(AT91SAM9G45_ID_US3, 4, 0);
++
++ /* set serial console to ttyS0 (ie, DBGU) */
++ at91_set_serial_console(0);
++}
++
++static void __init ek_init_irq(void)
++{
++ at91sam9g45_init_interrupts(NULL);
++}
++
++
++/*
++ * USB HS Host port (common to OHCI & EHCI)
++ */
++static struct at91_usbh_data __initdata ek_usbh_hs_data = {
++ .ports = 2,
++// .vbus_pin = {AT91_PIN_PB12, AT91_PIN_PB13, },
++};
++
++/*
++ * I2C devices
++ */
++static struct i2c_board_info icnova_i2c[] = {
++ { I2C_BOARD_INFO("m41t82", 0x68) },
++};
++
++static struct i2c_board_info icnova_i2c2[] = {
++};
++
++/*
++ * SPI devices.
++ */
++
++#define CONFIG_BOARD_ICNOVA_ADS7846_IRQ AT91_PIN_PC30
++#define CONFIG_BOARD_ICNOVA_ADS7846_CS 1
++static struct ads7846_platform_data ads_info = {
++ .model = 7846,
++ .vref_delay_usecs = 100,
++ .gpio_pendown = CONFIG_BOARD_ICNOVA_ADS7846_IRQ,
++ .x_min = 180,//330,
++ .y_min = 3827,//3700,
++ .x_max = 3900,//3700,
++ .y_max = 150,//330,
++ .xy_fuzz = 40,
++ .pressure_max = 0xFFF0,
++ .pressure_min = 0xF100,
++ .settle_delay_usecs = 200,
++ .debounce_rep = 4,
++ .debounce_tol = 40,
++ .debounce_max = 10,
++};
++
++static struct spi_board_info ek_spi_devices[] = {
++ {
++ .modalias = "ads7846",
++ .max_speed_hz = 125000 * 26,
++ .chip_select = CONFIG_BOARD_ICNOVA_ADS7846_CS,
++ .platform_data = &ads_info,
++ .bus_num = 0,
++ .controller_data = (void *) AT91_PIN_PD24,
++ },
++ {
++ .modalias = "supervisor",
++ .max_speed_hz = 550000,
++ .chip_select = 0,
++ .platform_data = NULL,
++ .bus_num = 0,
++ },
++
++};
++
++
++/*
++ * MACB Ethernet device
++ */
++static struct at91_eth_data __initdata ek_macb_data = {
++ .phy_irq_pin = AT91_PIN_PA27,
++};
++
++
++/*
++ * NAND flash
++ */
++static struct mtd_partition __initdata ek_nand_partition[] = {
++ {
++ .name = "Kernel",
++ .offset = 0,
++ .size = SZ_4M,
++ },
++ {
++ .name = "Data",
++ .offset = MTDPART_OFS_NXTBLK,
++ .size = MTDPART_SIZ_FULL,
++ },
++};
++
++static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
++{
++ *num_partitions = ARRAY_SIZE(ek_nand_partition);
++ return ek_nand_partition;
++}
++
++/* det_pin is not connected */
++static struct atmel_nand_data __initdata ek_nand_data = {
++ .ale = 21,
++ .cle = 22,
++ .rdy_pin = AT91_PIN_PC8,
++ .enable_pin = AT91_PIN_PC14,
++ .partition_info = nand_partitions,
++ .bus_width_16 = 0,
++};
++
++static struct sam9_smc_config __initdata ek_nand_smc_config = {
++ .ncs_read_setup = 0,
++ .nrd_setup = 10,
++ .ncs_write_setup = 0,
++ .nwe_setup = 10,
++
++ .ncs_read_pulse = 50,
++ .nrd_pulse = 30,
++ .ncs_write_pulse = 50,
++ .nwe_pulse = 30,
++
++ .read_cycle = 60,
++ .write_cycle = 60,
++
++ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
++ .tdf_cycles = 4,
++};
++
++static void __init ek_add_device_nand(void)
++{
++ /* configure chip-select 3 (NAND) */
++ sam9_smc_configure(3, &ek_nand_smc_config);
++
++ at91_add_device_nand(&ek_nand_data);
++}
++
++/*
++ * MCI (SD/MMC)
++ */
++static struct mci_platform_data __initdata ek_mmc_data = {
++ .slot[0] = {
++ .bus_width = 4,
++ .detect_pin = AT91_PIN_PC6,
++ .wp_pin = -1,
++ },
++};
++
++static struct mci_platform_data __initdata ek_mmc_data1 = {
++ .slot[0] = {
++ .bus_width = 4,
++ .detect_pin = AT91_PIN_PC7,
++ .wp_pin = -1,
++ },
++};
++
++
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++ {
++ .name = "VGA",
++ .refresh = 50,
++ .xres = 800, .yres = 480,
++ .pixclock = 25000,
++
++ .left_margin = 178, .right_margin = 38,
++ .upper_margin = 35, .lower_margin = 8,
++ .hsync_len = 40, .vsync_len = 2,
++
++ .vmode = FB_VMODE_NONINTERLACED,
++ }
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++ .manufacturer = "Hita",
++ .monitor = "TX20D26VM0APA",
++
++ .modedb = at91_tft_vga_modes,
++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
++ .hfmin = 16700,
++ .hfmax = 41700,
++ .vfmin = 47,
++ .vfmax = 75,
++};
++
++#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
++ | ATMEL_LCDC_DISTYPE_TFT \
++ | ATMEL_LCDC_INVCLK \
++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++ //| ATMEL_LCDC_INVDVAL
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++ .lcdcon_is_backlight = true,
++ .default_bpp = /*24*/16,
++ .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
++ .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
++ .default_monspecs = &at91fb_default_monspecs,
++ .guard_time = 9,
++ .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++#if 0
++static struct platform_device icnova_pwmdev = {
++ .name = "atmel-pwm-hwmon",
++ .id = 0,
++};
++#endif
++
++/*
++ * Btns
++ */
++static struct gpio_keys_button buttons[] = {
++#ifdef CONFIG_SUPERVISOR_IRQ
++ {
++ .code = KEY_BACK,
++ .gpio = 240,
++ .active_low = 1,
++ .desc = "back",
++ .wakeup = 1,
++ },
++ {
++ .code = KEY_HOME,
++ .gpio = 241,
++ .active_low = 1,
++ .desc = "home",
++ .wakeup = 1,
++ },
++ {
++ .code = KEY_MENU,
++ .gpio = 242,
++ .active_low = 1,
++ .desc = "menu",
++ .wakeup = 1,
++ },
++#endif
++};
++
++static struct gpio_keys_platform_data button_data = {
++ .buttons = buttons,
++ .nbuttons = ARRAY_SIZE(buttons),
++};
++
++static struct platform_device button_device = {
++ .name = "gpio-keys",
++ .id = -1,
++ .num_resources = 0,
++ .dev = {
++ .platform_data = &button_data,
++ },
++};
++
++
++static void __init ek_board_init(void)
++{
++ /* Serial */
++ at91_add_device_serial();
++ /* USB HS Host */
++ gpio_request(AT91_PIN_PB8, "usbhub.reset");
++ gpio_direction_output(AT91_PIN_PB8, 1);
++ at91_add_device_usbh_ehci(&ek_usbh_hs_data);
++ at91_add_device_usbh_ohci(&ek_usbh_hs_data);
++ /* USB HS Device */
++ at91_add_device_usba(NULL);
++ /* SPI */
++ ek_spi_devices[0].irq = gpio_to_irq(CONFIG_BOARD_ICNOVA_ADS7846_IRQ),
++ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
++ /* MMC */
++ at91_add_device_mci(0, &ek_mmc_data);
++ at91_add_device_mci(1, &ek_mmc_data1);
++ /* Ethernet */
++ at91_add_device_eth(&ek_macb_data);
++ /* NAND */
++ ek_add_device_nand();
++ /* I2C */
++ at91_add_device_i2c(0, icnova_i2c, ARRAY_SIZE(icnova_i2c));
++ at91_add_device_i2c(1, icnova_i2c2, ARRAY_SIZE(icnova_i2c2));
++ /* LCD Controller */
++ gpio_request(AT91_PIN_PE1, "lcdc.mode");
++ gpio_direction_output(AT91_PIN_PE1, 1);
++ gpio_request(AT91_PIN_PE0, "lcdc.pwr");
++ gpio_direction_output(AT91_PIN_PE0, 1);
++
++ at91_add_device_lcdc(&ek_lcdc_data);
++ /* SSC (for SSM2603) */
++ at91_add_device_ssc(AT91SAM9G45_ID_SSC0,
++ ATMEL_SSC_TX|ATMEL_SSC_RD|ATMEL_SSC_RF);
++ /* BTN */
++ platform_device_register(&button_device);
++}
++
++MACHINE_START(AT91SAM9G45EKES, "In-Circuit ICnova SAM9G45 SO-DIMM")
++ /* Maintainer: Atmel */
++ .phys_io = AT91_BASE_SYS,
++ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++ .boot_params = AT91_SDRAM_BASE + 0x100,
++ .timer = &at91sam926x_timer,
++ .map_io = ek_map_io,
++ .init_irq = ek_init_irq,
++ .init_machine = ek_board_init,
++MACHINE_END
+--
+1.7.3.3
+
DEFAULT_PREFERENCE_mpc8544ds = "1"
DEFAULT_PREFERENCE_imote2 = "1"
DEFAULT_PREFERENCE_afeb9260 = "1"
+DEFAULT_PREFERENCE_adb4000 = "1"
SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/${P}.tar.bz2;name=kernel \
file://defconfig"
file://0007-Adding-4th-serial-port.patch \
"
+SRC_URI_append_adb4000 = " \
+ http://www.kernel.org/pub/linux/kernel/v2.6/patch-2.6.33.2.bz2 \
+ file://linux-2.6.33.2-0001-misc-fpga_sram-added-driver-for-a-memory-connected-F.patch \
+ file://linux-2.6.33.2-0002-tfp410-added-driver-for-tfp410-DVI-Controller.patch \
+ file://linux-2.6.33.2-0003-drivers-at91_mci-modified-MMC-Host-to-work-on-G45.patch \
+ file://linux-2.6.33.2-0004-.gitignore-ignore-arm-image-output.patch \
+ file://linux-2.6.33.2-0005-arm-mach-at91-Add-support-for-icnova-boards.patch \
+ file://linux-2.6.33.2-0006-ICnova-Add-support-for-ADB1004revB-and-5In-Displays.patch \
+ file://linux-2.6.33.2-0007-atmel_tsadcc-adding-support-for-pressure-measurement.patch \
+ file://linux-2.6.33.2-0008-atmel_serial-adding-support-for-RS485.patch \
+ file://linux-2.6.33.2-0009-ICnova-add-support-for-ADB3000-revB.patch \
+ file://linux-2.6.33.2-0010-atmel-pwm-Making-driver-selectable-for-SAM9G45.patch \
+ file://linux-2.6.33.2-0011-hwmon-atm_pwm-adding-new-Userspace-atmel-pwm-interfa.patch \
+ file://linux-2.6.33.2-0012-ICnova-configuring-the-buzzer.patch \
+ file://linux-2.6.33.2-0013-sound-soc-adding-ssm2603-attached-to-atmel-ssc.patch \
+ file://linux-2.6.33.2-0014-ICnova-ADB1000-Adding-BPP-to-16.patch \
+ file://linux-2.6.33.2-0015-ADS7846-Adding-option-to-support-fuzz-on-input.patch \
+ file://linux-2.6.33.2-0016-ADB4000-Adding-support-for-the-IO-Processor.patch \
+ file://linux-2.6.33.2-0017-AT91-raising-the-number-of-GPIOs-to-support-addition.patch \
+ file://linux-2.6.33.2-0018-ICnova-Adding-ADB4000.patch \
+ "
--- /dev/null
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/ap7000_nand.c u-boot-2009.11.new/board/in-circuit/icnova/ap7000_nand.c
+--- u-boot-2009.11/board/in-circuit/icnova/ap7000_nand.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/ap7000_nand.c 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,87 @@
++#include <common.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/hmatrix.h>
++#include <nand.h>
++#include <linux/mtd/mtd.h>
++#include "../../../cpu/at32ap/hsmc3.h"
++
++void nand_init(void) {
++ gpio_select_pio(CFG_NAND_CE, GPIOF_OUTPUT);
++ gpio_select_pir(CFG_NAND_RDY, GPIOF_PULLUP);
++}
++
++static void icnova_nand_hwctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) {
++ struct nand_chip *this = mtd->priv;
++
++ //putc(0x20); putc(0x08); // SPACE BS
++ //putc(0x20); putc(0x08); // SPACE BS
++ if (ctrl & NAND_CTRL_CHANGE) {
++ if(ctrl & NAND_NCE) {
++ //printf("NAND_CE ");
++ gpio_set_value(GPIO_PIN_PE16, 1);
++ gpio_set_value(CFG_NAND_CE, 0);
++ } else {
++ //printf("NAND_NCE");
++ gpio_set_value(CFG_NAND_CE, 1);
++ gpio_set_value(GPIO_PIN_PE16, 0);
++ }
++ }
++
++ if(cmd == NAND_CMD_NONE) {
++ //printf("\n");
++ return;
++ }
++ //udelay(1000);
++
++ //printf("0x%x ", cmd);
++ if (ctrl & NAND_CLE) {
++ //printf("CLE\n");
++ writeb(cmd, uncached(this->IO_ADDR_W + (1 << CFG_NAND_CLE)));
++ } else {
++ //printf("ALE\n");
++ writeb(cmd, uncached(this->IO_ADDR_W + (1 << CFG_NAND_ALE)));
++ }
++
++ return;
++}
++
++static int icnova_nand_rdy(struct mtd_info *mtd) {
++ int ret;
++ //udelay(100);
++ ret = gpio_get_value(CFG_NAND_RDY);
++ //udelay(20);
++ return ret;
++}
++
++int board_nand_init(struct nand_chip *nand) {
++ /* Setup SMC-Timings */
++ //hsmc3_writel(CYCLE3, 0x00090009);
++ //hsmc3_writel(PULSE3, 0x04030403);
++ //hsmc3_writel(SETUP3, 0x00010001);
++ //hsmc3_writel(MODE3, 0x00020003);
++ hsmc3_writel(CYCLE3, 0x00090009);
++ hsmc3_writel(PULSE3, 0x07050705);
++ hsmc3_writel(SETUP3, 0x00020002);
++ hsmc3_writel(MODE3, 0x00020003);
++ // Enable NAND-Logic
++ hmatrix_slave_write(EBI, SFR,
++ hmatrix_slave_read(EBI, SFR) |
++ HMATRIX_BIT(EBI_NAND_ENABLE));
++
++
++ /* Setup GPIO-Lines */
++ gpio_select_pio(CFG_NAND_CE, GPIOF_OUTPUT);
++ gpio_select_pio(GPIO_PIN_PE16, GPIOF_OUTPUT);
++ gpio_set_value(CFG_NAND_CE, 1);
++ gpio_select_pio(CFG_NAND_RDY, GPIOF_PULLUP);
++
++ /* Setup NAND-Struct */
++ nand->chip_delay = 50;
++ nand->ecc.mode = NAND_ECC_SOFT;
++ nand->cmd_ctrl = icnova_nand_hwctl;
++ nand->dev_ready = icnova_nand_rdy;
++
++ return 0;
++
++}
++
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/at91_nand.c u-boot-2009.11.new/board/in-circuit/icnova/at91_nand.c
+--- u-boot-2009.11/board/in-circuit/icnova/at91_nand.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/at91_nand.c 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,123 @@
++/*
++ * (C) 2010
++ * Benjamin Tietz, In-Circuit <benjamin.tietz@in-circuit.de>
++ *
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9g45.h>
++#include <asm/arch/at91sam9_matrix.h>
++#include <asm/arch/at91sam9_smc.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/io.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91_pio.h>
++
++#include <nand.h>
++
++/*
++ * hardware specific access to control-lines
++ */
++#define MASK_ALE (1 << CFG_NAND_ALE)
++#define MASK_CLE (1 << CFG_NAND_CLE)
++
++static void icnova_arm9_nand_hwcontrol(struct mtd_info *mtd,
++ int cmd, unsigned int ctrl)
++{
++ struct nand_chip *this = mtd->priv;
++
++ if (ctrl & NAND_CTRL_CHANGE) {
++ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
++ IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
++
++ if (ctrl & NAND_CLE)
++ IO_ADDR_W |= MASK_CLE;
++ if (ctrl & NAND_ALE)
++ IO_ADDR_W |= MASK_ALE;
++
++ at91_set_gpio_value(CFG_NAND_CE, !(ctrl & NAND_NCE));
++ this->IO_ADDR_W = (void *) IO_ADDR_W;
++ }
++
++ if (cmd != NAND_CMD_NONE)
++ writeb(cmd, this->IO_ADDR_W);
++}
++
++static int icnova_arm9_nand_ready(struct mtd_info *mtd)
++{
++ return at91_get_gpio_value(CFG_NAND_RDY);
++}
++
++int board_nand_init(struct nand_chip *nand)
++{
++ nand->ecc.mode = NAND_ECC_SOFT;
++#ifdef CONFIG_SYS_NAND_DBW_16
++ nand->options = NAND_BUSWIDTH_16;
++#endif
++ nand->cmd_ctrl = icnova_arm9_nand_hwcontrol;
++ nand->dev_ready = icnova_arm9_nand_ready;
++ nand->chip_delay = 20;
++
++ return 0;
++}
++
++void icnova_nand_hw_init(void)
++{
++ unsigned long csa;
++
++ /* Enable CS3 */
++ csa = at91_sys_read(AT91_MATRIX_EBICSA);
++ at91_sys_write(AT91_MATRIX_EBICSA,
++ csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
++
++ /* Configure SMC CS3 for NAND/SmartMedia */
++ at91_sys_write(AT91_SMC_SETUP(3),
++ AT91_SMC_NWESETUP_(8) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(8) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(3),
++ AT91_SMC_NWEPULSE_(28) | AT91_SMC_NCS_WRPULSE_(20) |
++ AT91_SMC_NRDPULSE_(28) | AT91_SMC_NCS_RDPULSE_(20));
++ at91_sys_write(AT91_SMC_CYCLE(3),
++ AT91_SMC_NWECYCLE_(36) | AT91_SMC_NRDCYCLE_(36));
++ at91_sys_write(AT91_SMC_MODE(3),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++#ifdef CONFIG_SYS_NAND_DBW_16
++ AT91_SMC_DBW_16 |
++#else /* CONFIG_SYS_NAND_DBW_8 */
++ AT91_SMC_DBW_8 |
++#endif
++ AT91_SMC_TDF_(3));
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIOC);
++
++ /* Configure RDY/BSY */
++ at91_set_gpio_input(CFG_NAND_RDY, 1);
++
++ /* Enable NandFlash */
++ at91_set_gpio_output(CFG_NAND_CE, 1);
++}
++
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/config.mk u-boot-2009.11.new/board/in-circuit/icnova/config.mk
+--- u-boot-2009.11/board/in-circuit/icnova/config.mk 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/config.mk 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,8 @@
++#PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
++#PLATFORM_LDFLAGS += --gc-sections
++#TEXT_BASE = 0x10000000
++#TEXT_BASE = 0x00000000
++TEXT_BASE = 0x73f00000
++#TEXT_BASE = 0x00300800
++#LDSCRIPT = $(obj)board/in-circuit/icnova/u-boot.lds
++#CONFIG_ATMEL_USART = y
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/flash2x8.c u-boot-2009.11.new/board/in-circuit/icnova/flash2x8.c
+--- u-boot-2009.11/board/in-circuit/icnova/flash2x8.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/flash2x8.c 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,241 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#ifndef CONFIG_ICNOVA_ARM9
++#include <asm/cacheflush.h>
++#include <asm/sections.h>
++#else
++#define dcache_flush_unlocked() while(0)
++#define sync_write_buffer() while(0)
++#define uncached(addr) addr
++#endif
++#include <asm/io.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++flash_info_t flash_info[1];
++
++static void flash_identify(uint16_t *flash, flash_info_t *info)
++{
++ unsigned long flags;
++
++ flags = disable_interrupts();
++
++ dcache_flush_unlocked();
++
++ writew(0xaaaa, flash + 0x555);
++ writew(0x5555, flash + 0xaaa);
++ writew(0x9090, flash + 0x555);
++ info->flash_id = readl(flash);
++ writew(0xf0f0, flash);
++
++ readw(flash);
++
++ if (flags)
++ enable_interrupts();
++}
++
++#if CONFIG_SYS_FLASH_SECT > CONFIG_SYS_MAX_FLASH_SECT
++# error Flash has more sectors than allowed at max
++#endif
++
++unsigned long flash_init(void)
++{
++ unsigned long addr;
++ unsigned int i;
++
++ flash_info[0].size = CONFIG_SYS_FLASH_SIZE;
++ flash_info[0].sector_count = CONFIG_SYS_FLASH_SECT;
++
++ flash_identify(uncached((void *)CONFIG_SYS_FLASH_BASE), &flash_info[0]);
++
++ for (i=0, addr =0;
++ i < CONFIG_SYS_MAX_FLASH_SECT;
++ i++,addr+=(CONFIG_SYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT))
++ flash_info[0].start[i] = addr;
++
++ return CONFIG_SYS_FLASH_SIZE;
++}
++
++void flash_print_info(flash_info_t *info)
++{
++ int i;
++ printf("Flash: Vendor ID: 0x%02lx, Product ID: 0x%02lx\n",
++ info->flash_id >> 16, info->flash_id & 0xffff);
++ printf("Size: %ld MB in %d sectors\n",
++ info->size >> 10, info->sector_count);
++ for(i=0; i<CONFIG_SYS_FLASH_SECT; i++)
++ printf("\tSect %i @ 0x%08lx\n",i, flash_info[0].start[i]);
++}
++
++int flash_erase(flash_info_t *info, int s_first, int s_last)
++{
++ unsigned long flags;
++ unsigned long start_time;
++ uint16_t *fb, *sb;
++ unsigned int i;
++ int ret;
++ uint16_t status;
++
++ if ((s_first < 0) || (s_first > s_last)
++ || (s_last >= info->sector_count)) {
++ puts("Error: first and/or last sector out of range\n");
++ return ERR_INVAL;
++ }
++
++ for (i = s_first; i < s_last; i++)
++ if (info->protect[i]) {
++ printf("Error: sector %d is protected\n", i);
++ return ERR_PROTECTED;
++ }
++
++ fb = (uint16_t *)uncached(info->start[0]);
++
++ dcache_flush_unlocked();
++
++ for (i = s_first; (i <= s_last) && !ctrlc(); i++) {
++ printf("Erasing sector %3d...", i);
++
++ sb = (uint16_t *)uncached(info->start[i]);
++
++ flags = disable_interrupts();
++
++ start_time = get_timer(0);
++
++ /* Unlock sector */
++ writew(0xaaaa, fb + 0x555);
++ writew(0x7070, sb);
++
++ /* Erase sector */
++ writew(0xaaaa, fb + 0x555);
++ writew(0x5555, fb + 0xaaa);
++ writew(0x8080, fb + 0x555);
++ writew(0xaaaa, fb + 0x555);
++ writew(0x5555, fb + 0xaaa);
++ writew(0x3030, sb);
++
++ /* Wait for completion */
++ ret = ERR_OK;
++ do {
++ /* TODO: Timeout */
++ status = readw(sb);
++ } while ((status != 0xffff) /*&& !(status & 0x2828)*/);
++
++ writew(0xf0f0, fb);
++
++ /*
++ * Make sure the command actually makes it to the bus
++ * before we re-enable interrupts.
++ */
++ readw(fb);
++
++ if (flags)
++ enable_interrupts();
++
++ if (status != 0xffff) {
++ printf("Flash erase error at address 0x%p: 0x%02x\n",
++ sb, status);
++ ret = ERR_PROG_ERROR;
++ break;
++ }
++ }
++
++ if (ctrlc())
++ printf("User interrupt!\n");
++
++ return ERR_OK;
++}
++
++int write_buff(flash_info_t *info, uchar *src,
++ ulong addr, ulong count)
++{
++ unsigned long flags;
++ uint16_t *base, *p, *s, *end;
++ uint16_t word, status, status1;
++ int ret = ERR_OK;
++
++ if (addr < info->start[0]
++ || (addr + count) > (info->start[0] + info->size)
++ || (addr + count) < addr) {
++ puts("Error: invalid address range\n");
++ return ERR_INVAL;
++ }
++
++ if (addr & 1 || count & 1 || (unsigned int)src & 1) {
++ puts("Error: misaligned source, destination or count\n");
++ return ERR_ALIGN;
++ }
++
++ base = (uint16_t *)uncached(info->start[0]);
++ end = (uint16_t *)uncached(addr + count);
++
++ flags = disable_interrupts();
++
++ dcache_flush_unlocked();
++ sync_write_buffer();
++
++ for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src;
++ p < end && !ctrlc(); p++, s++) {
++ word = *s;
++
++ writew(0xaaaa, base + 0x555);
++ writew(0x5555, base + 0xaaa);
++ writew(0xa0a0, base + 0x555);
++ writew(word, p);
++
++ sync_write_buffer();
++
++ /* Wait for completion */
++ status1 = readw(p);
++ do {
++ /* TODO: Timeout */
++ status = status1;
++ status1 = readw(p);
++ } while (((status ^ status1) & 0x4040) /* toggled */
++ /*&& !(status1 & 0x2828)*/); /* error bits */
++
++ /*
++ * We'll need to check once again for toggle bit
++ * because the toggle bit may stop toggling as I/O5
++ * changes to "1" (ref at49bv642.pdf p9)
++ */
++ status1 = readw(p);
++ status = readw(p);
++
++ //writew(0xf0f0, base);
++ //readw(base);
++
++ if ((status ^ status1) & 0x4040) {
++ printf("Flash write error at address 0x%p: "
++ "0x%02x != 0x%02x\n",
++ p, status,word);
++ ret = ERR_PROG_ERROR;
++ break;
++ }
++ }
++
++ if (flags)
++ enable_interrupts();
++
++ return ret;
++}
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/flash.c u-boot-2009.11.new/board/in-circuit/icnova/flash.c
+--- u-boot-2009.11/board/in-circuit/icnova/flash.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/flash.c 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,229 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#include <asm/cacheflush.h>
++#include <asm/io.h>
++#include <asm/sections.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++flash_info_t flash_info[1];
++
++static void flash_identify(uint16_t *flash, flash_info_t *info)
++{
++ unsigned long flags;
++
++ flags = disable_interrupts();
++
++ dcache_flush_unlocked();
++
++ writew(0xaa, flash + 0x555);
++ writew(0x55, flash + 0xaaa);
++ writew(0x90, flash + 0x555);
++ info->flash_id = readl(flash);
++ writew(0xff, flash);
++
++ readw(flash);
++
++ if (flags)
++ enable_interrupts();
++}
++
++unsigned long flash_init(void)
++{
++ unsigned long addr;
++ unsigned int i;
++
++ flash_info[0].size = CONFIG_SYS_FLASH_SIZE;
++ flash_info[0].sector_count = 135;
++
++ flash_identify(uncached((void *)CONFIG_SYS_FLASH_BASE), &flash_info[0]);
++
++ for (i = 0, addr = 0; i < 8; i++, addr += 0x2000)
++ flash_info[0].start[i] = addr;
++ for (; i < flash_info[0].sector_count; i++, addr += 0x10000)
++ flash_info[0].start[i] = addr;
++
++ return CONFIG_SYS_FLASH_SIZE;
++}
++
++void flash_print_info(flash_info_t *info)
++{
++ printf("Flash: Vendor ID: 0x%02lx, Product ID: 0x%02lx\n",
++ info->flash_id >> 16, info->flash_id & 0xffff);
++ printf("Size: %ld MB in %d sectors\n",
++ info->size >> 10, info->sector_count);
++}
++
++int flash_erase(flash_info_t *info, int s_first, int s_last)
++{
++ unsigned long flags;
++ unsigned long start_time;
++ uint16_t *fb, *sb;
++ unsigned int i;
++ int ret;
++ uint16_t status;
++
++ if ((s_first < 0) || (s_first > s_last)
++ || (s_last >= info->sector_count)) {
++ puts("Error: first and/or last sector out of range\n");
++ return ERR_INVAL;
++ }
++
++ for (i = s_first; i < s_last; i++)
++ if (info->protect[i]) {
++ printf("Error: sector %d is protected\n", i);
++ return ERR_PROTECTED;
++ }
++
++ fb = (uint16_t *)uncached(info->start[0]);
++
++ dcache_flush_unlocked();
++
++ for (i = s_first; (i <= s_last) && !ctrlc(); i++) {
++ printf("Erasing sector %3d...", i);
++
++ sb = (uint16_t *)uncached(info->start[i]);
++
++ flags = disable_interrupts();
++
++ start_time = get_timer(0);
++
++ /* Unlock sector */
++ writew(0xaa, fb + 0x555);
++ writew(0x70, sb);
++
++ /* Erase sector */
++ writew(0xaa, fb + 0x555);
++ writew(0x55, fb + 0xaaa);
++ writew(0x80, fb + 0x555);
++ writew(0xaa, fb + 0x555);
++ writew(0x55, fb + 0xaaa);
++ writew(0x30, sb);
++
++ /* Wait for completion */
++ ret = ERR_OK;
++ do {
++ /* TODO: Timeout */
++ status = readw(sb);
++ } while ((status != 0xffff) && !(status & 0x28));
++
++ writew(0xf0, fb);
++
++ /*
++ * Make sure the command actually makes it to the bus
++ * before we re-enable interrupts.
++ */
++ readw(fb);
++
++ if (flags)
++ enable_interrupts();
++
++ if (status != 0xffff) {
++ printf("Flash erase error at address 0x%p: 0x%02x\n",
++ sb, status);
++ ret = ERR_PROG_ERROR;
++ break;
++ }
++ }
++
++ if (ctrlc())
++ printf("User interrupt!\n");
++
++ return ERR_OK;
++}
++
++int write_buff(flash_info_t *info, uchar *src,
++ ulong addr, ulong count)
++{
++ unsigned long flags;
++ uint16_t *base, *p, *s, *end;
++ uint16_t word, status, status1;
++ int ret = ERR_OK;
++
++ if (addr < info->start[0]
++ || (addr + count) > (info->start[0] + info->size)
++ || (addr + count) < addr) {
++ puts("Error: invalid address range\n");
++ return ERR_INVAL;
++ }
++
++ if (addr & 1 || count & 1 || (unsigned int)src & 1) {
++ puts("Error: misaligned source, destination or count\n");
++ return ERR_ALIGN;
++ }
++
++ base = (uint16_t *)uncached(info->start[0]);
++ end = (uint16_t *)uncached(addr + count);
++
++ flags = disable_interrupts();
++
++ dcache_flush_unlocked();
++ sync_write_buffer();
++
++ for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src;
++ p < end && !ctrlc(); p++, s++) {
++ word = *s;
++
++ writew(0xaa, base + 0x555);
++ writew(0x55, base + 0xaaa);
++ writew(0xa0, base + 0x555);
++ writew(word, p);
++
++ sync_write_buffer();
++
++ /* Wait for completion */
++ status1 = readw(p);
++ do {
++ /* TODO: Timeout */
++ status = status1;
++ status1 = readw(p);
++ } while (((status ^ status1) & 0x40) /* toggled */
++ && !(status1 & 0x28)); /* error bits */
++
++ /*
++ * We'll need to check once again for toggle bit
++ * because the toggle bit may stop toggling as I/O5
++ * changes to "1" (ref at49bv642.pdf p9)
++ */
++ status1 = readw(p);
++ status = readw(p);
++ if ((status ^ status1) & 0x40) {
++ printf("Flash write error at address 0x%p: "
++ "0x%02x != 0x%02x\n",
++ p, status,word);
++ ret = ERR_PROG_ERROR;
++ writew(0xf0, base);
++ readw(base);
++ break;
++ }
++
++ writew(0xf0, base);
++ readw(base);
++ }
++
++ if (flags)
++ enable_interrupts();
++
++ return ret;
++}
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/icnova_arm.c u-boot-2009.11.new/board/in-circuit/icnova/icnova_arm.c
+--- u-boot-2009.11/board/in-circuit/icnova/icnova_arm.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/icnova_arm.c 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,294 @@
++/*
++ * (C) 2010 Benjamin Tietz, In-Circuit <benjamin.tietz@in-circuit.de>
++ *
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/sizes.h>
++#include <asm/arch/at91sam9g45.h>
++#include <asm/arch/at91sam9_matrix.h>
++#include <asm/arch/at91sam9_smc.h>
++#include <asm/arch/at91_common.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++#include <asm/arch/clk.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++#include <asm/arch/hardware.h>
++#include <lcd.h>
++#include <atmel_lcdc.h>
++#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
++#include <net.h>
++#endif
++#include <netdev.h>
++#include "nand.h"
++
++DECLARE_GLOBAL_DATA_PTR;
++
++/* ------------------------------------------------------------------------- */
++/*
++ * Miscelaneous platform dependent initialisations
++ */
++
++
++#ifdef CONFIG_MACB
++static void icnova_arm9_macb_hw_init(void)
++{
++ //unsigned long rstc;
++ /*
++ * Disable pull-up on:
++ * RXDV (PA15) => PHY normal mode (not Test mode)
++ * ERX0 (PA12) => PHY ADDR0
++ * ERX1 (PA13) => PHY ADDR1
++ * ERX2 (PA8) => PHY ADDR2
++ * ERX3 (PA9) => PHY ADDR3
++ * ECRS (PA29) => PHY ADDR4 => PHYADDR = 0x0
++ * ECOL (PA30) => full MII interface
++ * ERXER (PA16) => no repeater
++ * ETXCLK (PA17) => no isolate
++ */
++ unsigned long phy_mask = pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA8) | pin_to_mask(AT91_PIN_PA9) |
++ pin_to_mask(AT91_PIN_PA12) | pin_to_mask(AT91_PIN_PA13) |
++ pin_to_mask(AT91_PIN_PA29) | pin_to_mask(AT91_PIN_PA30) |
++ pin_to_mask(AT91_PIN_PA16) | pin_to_mask(AT91_PIN_PA17);
++ /* Reset and pdwn-pins */
++ unsigned long rst = pin_to_mask(AT91_PIN_PA26);
++ unsigned long pdwn = pin_to_mask(AT91_PIN_PA25);
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_EMAC);
++
++ /*
++ * Set up Pins
++ */
++ writel(rst | pdwn | phy_mask,
++ pin_to_controller(AT91_PIN_PA0) + PIO_PER);
++ writel(rst | pdwn | phy_mask,
++ pin_to_controller(AT91_PIN_PA0) + PIO_OER);
++ writel(rst | pdwn | phy_mask,
++ pin_to_controller(AT91_PIN_PA0) + PIO_CODR);
++ udelay(1000);
++ writel(rst,
++ pin_to_controller(AT91_PIN_PA0) + PIO_SODR);
++ udelay(500000);
++ // phy-mask will be resetted by internal hardware
++
++#if 0
++ rstc = readl(AT91_BASE_SYS + AT91_RSTC_MR);
++
++ /* Need to reset PHY -> 500ms reset */
++ writel(AT91_BASE_SYS + AT91_RSTC_MR, AT91_RSTC_KEY |
++ (AT91_RSTC_ERSTL & (0x0D << 8)) |
++ AT91_RSTC_URSTEN);
++
++ writel(AT91_BASE_SYS + AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
++
++ /* Wait for end hardware reset */
++ while (!(readl(AT91_BASE_SYS + AT91_RSTC_SR) & AT91_RSTC_NRSTL))
++ asm("nop");
++
++ /* Restore NRST value */
++ writel(AT91_BASE_SYS + AT91_RSTC_MR, AT91_RSTC_KEY |
++ (rstc) |
++ AT91_RSTC_URSTEN);
++#endif
++
++ at91_macb_hw_init();
++}
++#endif
++
++#ifdef CONFIG_LCD
++
++vidinfo_t panel_info = {
++ vl_col: 480,
++ vl_row: 272,
++ vl_clk: 9000000,
++ vl_sync: ATMEL_LCDC_INVLINE_NORMAL |
++ ATMEL_LCDC_INVFRAME_NORMAL,
++ vl_bpix: 3,
++ vl_tft: 1,
++ vl_hsync_len: 45,
++ vl_left_margin: 1,
++ vl_right_margin:1,
++ vl_vsync_len: 1,
++ vl_upper_margin:40,
++ vl_lower_margin:1,
++ mmio: AT91SAM9G45_LCDC_BASE,
++};
++
++
++void lcd_enable(void)
++{
++ at91_set_A_periph(AT91_PIN_PE6, 1); /* power up */
++}
++
++void lcd_disable(void)
++{
++ at91_set_A_periph(AT91_PIN_PE6, 0); /* power down */
++}
++
++static void at91sam9m10g45ek_lcd_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
++ at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
++ at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
++ at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
++ at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
++
++ at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
++ at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
++ at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
++ at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
++ at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
++ at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
++ at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
++ at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
++ at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
++ at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
++ at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
++ at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
++ at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
++ at91_set_B_periph(AT91_PIN_PE20, 0); /* LCDD13 */
++ at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
++ at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
++ at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
++ at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
++ at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
++ at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
++ at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
++ at91_set_B_periph(AT91_PIN_PE28, 0); /* LCDD21 */
++ at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
++ at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_LCDC);
++
++ gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE;
++}
++
++#ifdef CONFIG_LCD_INFO
++#include <nand.h>
++#include <version.h>
++
++void lcd_show_board_info(void)
++{
++ ulong dram_size, nand_size;
++ int i;
++ char temp[32];
++
++ lcd_printf ("%s\n", U_BOOT_VERSION);
++ lcd_printf ("(C) 2008 ATMEL Corp\n");
++ lcd_printf ("at91support@atmel.com\n");
++ lcd_printf ("%s CPU at %s MHz\n",
++ AT91_CPU_NAME,
++ strmhz(temp, get_cpu_clk_rate()));
++
++ dram_size = 0;
++ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
++ dram_size += gd->bd->bi_dram[i].size;
++ nand_size = 0;
++ for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
++ nand_size += nand_info[i].size;
++ lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
++ dram_size >> 20,
++ nand_size >> 20 );
++}
++#endif /* CONFIG_LCD_INFO */
++#endif
++
++#ifdef CONFIG_MMC
++static void icnova_arm9_mmc_init(void) {
++ at91_set_A_periph(AT91_PIN_PA0, 0);
++ at91_set_A_periph(AT91_PIN_PA1, 1);
++ at91_set_A_periph(AT91_PIN_PA2, 1);
++ at91_set_A_periph(AT91_PIN_PA3, 1);
++ at91_set_A_periph(AT91_PIN_PA4, 1);
++ at91_set_A_periph(AT91_PIN_PA5, 1);
++
++ at91_sys_write(AT91_PMC_PCER, 1<<AT91SAM9G45_ID_MCI0);
++}
++
++int board_mmc_init(bd_t *bd) {
++ icnova_arm9_mmc_init();
++ return atmel_mmc_init(bd);
++}
++#endif
++
++int board_init(void)
++{
++ /* Enable Ctrlc */
++ console_init_f();
++
++ /* arch number of AT91SAM9M10G45EK-Board */
++//#ifdef CONFIG_AT91SAM9M10G45EK
++// gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9M10G45EK;
++//#elif defined CONFIG_AT91SAM9G45EKES
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G45EKES;
++//#endif
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
++
++ at91_serial_hw_init();
++#ifdef CONFIG_CMD_NAND
++ icnova_nand_hw_init();
++#endif
++#ifdef CONFIG_MACB
++ icnova_arm9_macb_hw_init();
++#endif
++
++#ifdef CONFIG_LCD
++ icnova_arm9_lcd_hw_init();
++#endif
++
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->bd->bi_dram[0].start = PHYS_SDRAM;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
++ return 0;
++}
++
++#ifdef CONFIG_RESET_PHY_R
++void reset_phy(void)
++{
++#ifdef CONFIG_MACB
++ /*
++ * Initialize ethernet HW addr prior to starting Linux,
++ * needed for nfsroot
++ */
++ eth_init(gd->bd);
++#endif
++}
++#endif
++
++int board_eth_init(bd_t *bis)
++{
++ int rc = 0;
++#ifdef CONFIG_MACB
++ rc = macb_eth_initialize(0, (void *)AT91SAM9G45_BASE_EMAC, 0x00);
++#endif
++ return rc;
++}
++
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/icnova.c u-boot-2009.11.new/board/in-circuit/icnova/icnova.c
+--- u-boot-2009.11/board/in-circuit/icnova/icnova.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/icnova.c 2010-10-08 12:11:21.000000000 +0200
+@@ -0,0 +1,127 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#include <asm/io.h>
++#include <asm/sdram.h>
++#include <asm/arch/clk.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/hmatrix.h>
++#include <netdev.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++static const struct sdram_config sdram_config = {
++ .data_bits = SDRAM_DATA_32BIT,
++ .row_bits = 13,
++ .col_bits = 9,
++ .bank_bits = 2,
++ .cas = 2,
++ .twr = 2,
++ .trc = 7,
++ .trp = 2,
++ .trcd = 2,
++ .tras = 4,
++ .txsr = 7,
++ /* 7.81 us */
++ .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
++};
++
++int board_early_init_f(void)
++{
++ /* Enable SDRAM in the EBI mux */
++ hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
++
++ gpio_enable_ebi();
++#ifdef CONFIG_USART0
++ gpio_enable_usart0();
++#endif
++#ifdef CONFIG_USART1
++ gpio_enable_usart1();
++#endif
++#ifdef CONFIG_USART2
++ gpio_enable_usart2();
++#endif
++#ifdef CONFIG_USART3
++ gpio_enable_usart3();
++#endif
++#ifdef CONFIG_USART4
++ gpio_enable_usart4();
++#endif
++#ifdef CONFIG_MACB
++ gpio_select_pio(GPIO_PIN_PB30, GPIOF_OUTPUT);
++ gpio_set_value(GPIO_PIN_PB30, 0);
++ gpio_select_pio(GPIO_PIN_PB29, GPIOF_OUTPUT);
++ gpio_set_value(GPIO_PIN_PB29, 0);
++ udelay(100);
++ gpio_set_value(GPIO_PIN_PB29, 1);
++ gpio_enable_macb0();
++#endif
++#ifdef CONFIG_MACB2
++ gpio_enable_macb1();
++#endif
++#ifdef CONFIG_MMC
++ gpio_enable_mmci();
++#endif
++
++ return 0;
++}
++
++
++phys_size_t initdram(int board_type)
++{
++ unsigned long expected_size;
++ unsigned long actual_size;
++ void *sdram_base;
++
++ sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
++
++ expected_size = sdram_init(sdram_base, &sdram_config);
++ actual_size = get_ram_size(sdram_base, expected_size);
++
++ unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
++
++ if (expected_size != actual_size)
++ printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
++ actual_size >> 20, expected_size >> 20);
++
++ return actual_size;
++}
++
++void board_init_info(void)
++{
++ gd->bd->bi_phy_id[0] = 0x00;
++#ifdef CONFIG_MACB2
++ gd->bd->bi_phy_id[1] = 0x00;
++#endif
++}
++
++#ifdef CONFIG_CMD_NET
++int board_eth_init(bd_t *bi)
++{
++ macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
++#ifdef CONFIG_MACB2
++ macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
++#endif
++ return 0;
++}
++#endif
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/Makefile u-boot-2009.11.new/board/in-circuit/icnova/Makefile
+--- u-boot-2009.11/board/in-circuit/icnova/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/Makefile 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,51 @@
++#
++# (C) Copyright 2001-2006
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# Copyright (C) 2005-2006 Atmel Corporation
++#
++# (C) 2008 - 2010 Benjamin Tietz, In-Circuit benjamin.tietz@in-circuit.de
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++
++include $(TOPDIR)/config.mk
++include $(TOPDIR)/include/config.mk
++
++LIB := $(obj)lib$(BOARD).a
++
++COBJS := $(BOARD).o flash.o
++
++include Makefile.$(BNAME)
++
++COBJS-y += $(COBJS)
++SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
++OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
++
++# $(obj).depend
++$(LIB): $(OBJS)
++ $(AR) $(ARFLAGS) $@ $(OBJS)
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/Makefile.icnova_arm9oem u-boot-2009.11.new/board/in-circuit/icnova/Makefile.icnova_arm9oem
+--- u-boot-2009.11/board/in-circuit/icnova/Makefile.icnova_arm9oem 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/Makefile.icnova_arm9oem 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,6 @@
++
++COBJS := $(BOARD)_$(ARCH).o flash2x8.o
++ifdef CONFIG_CMD_NAND
++COBJS += at91_nand.o
++endif
++
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/Makefile.icnova_arm9oem_u4 u-boot-2009.11.new/board/in-circuit/icnova/Makefile.icnova_arm9oem_u4
+--- u-boot-2009.11/board/in-circuit/icnova/Makefile.icnova_arm9oem_u4 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/Makefile.icnova_arm9oem_u4 2010-10-08 13:02:52.000000000 +0200
+@@ -0,0 +1,6 @@
++
++COBJS := $(BOARD)_$(ARCH).o flash2x8.o
++ifdef CONFIG_CMD_NAND
++COBJS += at91_nand.o
++endif
++
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/Makefile.icnova_oemplus u-boot-2009.11.new/board/in-circuit/icnova/Makefile.icnova_oemplus
+--- u-boot-2009.11/board/in-circuit/icnova/Makefile.icnova_oemplus 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/Makefile.icnova_oemplus 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,2 @@
++
++COBJS := $(BOARD).o flash2x8.o avr32_nand.o
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/nand.h u-boot-2009.11.new/board/in-circuit/icnova/nand.h
+--- u-boot-2009.11/board/in-circuit/icnova/nand.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/nand.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,2 @@
++
++void icnova_nand_hw_init(void);
+diff -Naur u-boot-2009.11/board/in-circuit/icnova/u-boot.lds u-boot-2009.11.new/board/in-circuit/icnova/u-boot.lds
+--- u-boot-2009.11/board/in-circuit/icnova/u-boot.lds 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/board/in-circuit/icnova/u-boot.lds 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,73 @@
++/* -*- Fundamental -*-
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
++OUTPUT_ARCH(avr32)
++ENTRY(_start)
++
++SECTIONS
++{
++ . = 0;
++ _text = .;
++ .text : {
++ *(.exception.text)
++ *(.text)
++ *(.text.*)
++ }
++ _etext = .;
++
++ .rodata : {
++ *(.rodata)
++ *(.rodata.*)
++ }
++
++ . = ALIGN(8);
++ _data = .;
++ .data : {
++ *(.data)
++ *(.data.*)
++ }
++
++ . = ALIGN(4);
++ __u_boot_cmd_start = .;
++ .u_boot_cmd : {
++ KEEP(*(.u_boot_cmd))
++ }
++ __u_boot_cmd_end = .;
++
++ . = ALIGN(4);
++ _got = .;
++ .got : {
++ *(.got)
++ }
++ _egot = .;
++
++ . = ALIGN(8);
++ _edata = .;
++
++ .bss (NOLOAD) : {
++ *(.bss)
++ *(.bss.*)
++ }
++ . = ALIGN(8);
++ _end = .;
++}
+diff -Naur u-boot-2009.11/common/env_flash.c u-boot-2009.11.new/common/env_flash.c
+--- u-boot-2009.11/common/env_flash.c 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/common/env_flash.c 2010-10-08 12:09:30.000000000 +0200
+@@ -25,6 +25,7 @@
+ */
+
+ /* #define DEBUG */
++#define DEBUG
+
+ #include <common.h>
+ #include <command.h>
+@@ -313,6 +314,7 @@
+ return 1;
+
+ puts ("Writing to Flash... ");
++ debug(" %08lX + %08lX", (ulong) flash_sect_addr, len);
+ rc = flash_write((char *)env_buffer, flash_sect_addr, len);
+ if (rc != 0) {
+ flash_perror (rc);
+diff -Naur u-boot-2009.11/cpu/arm926ejs/at91/at91sam9m10g45_devices.c u-boot-2009.11.new/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
+--- u-boot-2009.11/cpu/arm926ejs/at91/at91sam9m10g45_devices.c 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/cpu/arm926ejs/at91/at91sam9m10g45_devices.c 2010-10-08 12:11:21.000000000 +0200
+@@ -31,31 +31,38 @@
+ void at91_serial0_hw_init(void)
+ {
+ at91_set_A_periph(AT91_PIN_PB19, 1); /* TXD0 */
+- at91_set_A_periph(AT91_PIN_PB18, 0); /* RXD0 */
++ at91_set_A_periph(AT91_PIN_PB18, 1); /* RXD0 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US0);
+ }
+
+ void at91_serial1_hw_init(void)
+ {
+ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD1 */
+- at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD1 */
++ at91_set_A_periph(AT91_PIN_PB5, 1); /* RXD1 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US1);
+ }
+
+ void at91_serial2_hw_init(void)
+ {
+- at91_set_A_periph(AT91_PIN_PD6, 1); /* TXD2 */
+- at91_set_A_periph(AT91_PIN_PD7, 0); /* RXD2 */
++ at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD2 */
++ at91_set_A_periph(AT91_PIN_PB7, 1); /* RXD2 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US2);
+ }
+
+ void at91_serial3_hw_init(void)
+ {
+- at91_set_A_periph(AT91_PIN_PB12, 0); /* DRXD */
++ at91_set_A_periph(AT91_PIN_PB12, 1); /* DRXD */
+ at91_set_A_periph(AT91_PIN_PB13, 1); /* DTXD */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);;
+ }
+
++void at91_serial4_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD3 */
++ at91_set_A_periph(AT91_PIN_PB9, 1); /* RXD3 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US3);
++}
++
+ void at91_serial_hw_init(void)
+ {
+ #ifdef CONFIG_USART0
+@@ -73,6 +80,10 @@
+ #ifdef CONFIG_USART3 /* DBGU */
+ at91_serial3_hw_init();
+ #endif
++
++#ifdef CONFIG_USART4
++ at91_serial4_hw_init();
++#endif
+ }
+
+ #ifdef CONFIG_ATMEL_SPI
+diff -Naur u-boot-2009.11/cpu/arm926ejs/at91/lowlevel_init.S u-boot-2009.11.new/cpu/arm926ejs/at91/lowlevel_init.S
+--- u-boot-2009.11/cpu/arm926ejs/at91/lowlevel_init.S 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/cpu/arm926ejs/at91/lowlevel_init.S 2010-10-08 12:09:30.000000000 +0200
+@@ -36,6 +36,9 @@
+ #include <asm/arch/at91sam9_matrix.h>
+ #include <asm/arch/at91sam9_sdramc.h>
+ #include <asm/arch/at91sam9_smc.h>
++#ifdef CONFIG_SYS_AT91_DDRAM
++#include <asm/arch/at91sam9g45_ddrsdram.h>
++#endif
+
+ _TEXT_BASE:
+ .word TEXT_BASE
+@@ -102,9 +105,36 @@
+ /* ----------------------------------------------------------------------------
+ * PMC Init Step 2.
+ * ----------------------------------------------------------------------------
++ * - Switch on the Main Oscillator
++ * ----------------------------------------------------------------------------
++ */
++ ldr r1, =(AT91_BASE_SYS + AT91_PMC_MCKR)
++
++ /* -Master Clock Controller register PMC_MCKR */
++ ldr r0, =CONFIG_SYS_MCKR1_VAL
++ str r0, [r1]
++
++ /* Reading the PMC Status to detect when the Master clock is ready */
++ mov r4, #AT91_PMC_MCKRDY
++MCKRDY_Loop:
++ ldr r3, [r2]
++ and r3, r4, r3
++ cmp r3, #AT91_PMC_MCKRDY
++ bne MCKRDY_Loop
++
++/* ----------------------------------------------------------------------------
++ * PMC Init Step 3.
++ * ----------------------------------------------------------------------------
+ * Setup PLLA
+ * ----------------------------------------------------------------------------
+ */
++#ifdef CONFIG_SYS_PLLICPR_VAL
++
++ ldr r1, =(AT91_BASE_SYS + AT91_PMC_PLLICPR)
++ ldr r0, =CONFIG_SYS_PLLICPR_VAL
++ str r0, [r1]
++
++#endif
+ ldr r1, =(AT91_BASE_SYS + AT91_CKGR_PLLAR)
+ ldr r0, =CONFIG_SYS_PLLAR_VAL
+ str r0, [r1]
+@@ -117,26 +147,14 @@
+ cmp r3, #AT91_PMC_LOCKA
+ bne MOSCS_Loop1
+
++
+ /* ----------------------------------------------------------------------------
+- * PMC Init Step 3.
++ * PMC Init Step 4.
+ * ----------------------------------------------------------------------------
+- * - Switch on the Main Oscillator
++ * - Switch on the Main Oscillator part 2
+ * ----------------------------------------------------------------------------
+ */
+ ldr r1, =(AT91_BASE_SYS + AT91_PMC_MCKR)
+-
+- /* -Master Clock Controller register PMC_MCKR */
+- ldr r0, =CONFIG_SYS_MCKR1_VAL
+- str r0, [r1]
+-
+- /* Reading the PMC Status to detect when the Master clock is ready */
+- mov r4, #AT91_PMC_MCKRDY
+-MCKRDY_Loop:
+- ldr r3, [r2]
+- and r3, r4, r3
+- cmp r3, #AT91_PMC_MCKRDY
+- bne MCKRDY_Loop
+-
+ ldr r0, =CONFIG_SYS_MCKR2_VAL
+ str r0, [r1]
+
+@@ -154,10 +172,14 @@
+ * - memory control configuration 2
+ * ----------------------------------------------------------------------------
+ */
++#ifdef CONFIG_SYS_AT91_DDRAM
++ ldr r0, =(AT91_BASE_SYS + AT91_DDRSDRAMC_RTR)
++#else
+ ldr r0, =(AT91_BASE_SYS + AT91_SDRAMC_TR)
++#endif
+ ldr r1, [r0]
+ cmp r1, #0
+- bne SDRAM_setup_end
++ //bne SDRAM_setup_end
+
+ ldr r0, =SMRDATA1
+ ldr r2, =SMRDATA2
+@@ -176,10 +198,89 @@
+ cmp r2, r0
+ bne 2b
+
++#ifdef CONFIG_SYS_AT91_DDRAM
++.macro AT91_DDR_CMD cmd, offset, timeout
++ ldr r1, =(AT91_BASE_SYS + AT91_DDRSDRAMC_MR)
++ ldr r0, =\cmd
++ str r0, [r1]
++ ldr r1, =(PHYS_SDRAM + \offset)
++ ldr r0, =0
++ str r0, [r1]
++ ldr r5, =\timeout
++ bl at91_sleep_ns
++.endm
++
++ mov r3, lr
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_NOP, 0, 200000
++ /* Step 4: Another NOP to enable cke */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_NOP, 0, 400
++ /* Step 5: Set All Bank precharge*/
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_PRECHARGE, 0, 400
++ /* Step 6: Set EMR operation EMRS2 */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_EXT_LMR, 0x04000000, 400
++ /* Step 7: Set EMR operation EMRS3 */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_EXT_LMR, 0x06000000, 400
++ /* Step 8: Set EMR operation EMRS1 */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_EXT_LMR, 0x02000000, 400
++ /* Step 9: Enable DLL-Reset */
++ ldr r1, =(AT91_BASE_SYS + AT91_DDRSDRAMC_CR)
++ ldr r0, [r1]
++ orr r0, r0, #AT91_DDRSDRAMC_DLL
++ str r0, [r1]
++ /* Step 10: reset DLL */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_LMR, 0x0, 400
++ /* Step 11: Set All Bank precharge*/
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_PRECHARGE, 0, 400
++ /* Step 12: Enable auto-refresh */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_REFRESH, 0, 400
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_REFRESH, 0, 400
++ /* Step 13: Disable DLL reset */
++ ldr r1, =(AT91_BASE_SYS + AT91_DDRSDRAMC_CR)
++ ldr r0, [r1]
++ bic r0, r0, #AT91_DDRSDRAMC_DLL
++ str r0, [r1]
++ /* Step 14: MRS cycle */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_LMR, 0, 400
++ /* Step 15: Program OCD int Config-reg */
++ ldr r1, =(AT91_BASE_SYS + AT91_DDRSDRAMC_CR)
++ ldr r0, [r1]
++ orr r0, r0, #AT91_DDRSDRAMC_OCD
++ str r0, [r1]
++ /* Step 16: Set EMR operation EMRS1 */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_EXT_LMR, 0x02000000, 400
++ /* Step 17: Program End OCD int Config-reg */
++ ldr r1, =(AT91_BASE_SYS + AT91_DDRSDRAMC_CR)
++ ldr r0, [r1]
++ bic r0, r0, #AT91_DDRSDRAMC_OCD
++ str r0, [r1]
++ /* Step 18: Set EMR operation EMRS1 */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_EXT_LMR, 0x02000000, 400
++ /* Step 19-21: End calibration and set up refresh */
++ AT91_DDR_CMD AT91_DDRSDRAMC_MODE_NORMAL, 0, 10
++ str r0, [r1]
++ ldr r1, =(AT91_BASE_SYS + AT91_DDRSDRAMC_RTR)
++ ldr r0, =CONFIG_SYS_SDRAM_REFRESH_VAL
++ str r0, [r1]
++ ldr r5, =2000
++ bl at91_sleep_ns
++ mov lr, r3
++#endif
++
+ SDRAM_setup_end:
+ /* everything is fine now */
+ mov pc, lr
+
++
++at91_sleep_ns:
++ lsl r5, r5, #3
++ /* 1ns */
++sl_inner:
++ sub r5, r5, #1
++ cmp r5, #0
++ bne sl_inner
++ /* Done */
++ mov pc, lr
++
+ .ltorg
+
+ SMRDATA:
+@@ -224,6 +325,20 @@
+ .word CONFIG_SYS_SMC0_SETUP0_VAL
+
+ SMRDATA1:
++#ifdef CONFIG_SYS_AT91_DDRAM
++ .word (AT91_BASE_SYS + AT91_PMC_SCER)
++ .word AT91CAP9_PMC_DDR
++ .word (AT91_BASE_SYS + AT91_DDRSDRAMC_MDR)
++ .word CONFIG_SYS_DDRC_MDR_VAL
++ .word (AT91_BASE_SYS + AT91_DDRSDRAMC_CR)
++ .word CONFIG_SYS_DDRC_CR0_VAL
++ .word (AT91_BASE_SYS + AT91_DDRSDRAMC_T0PR)
++ .word CONFIG_SYS_DDRC_T0PR_VAL
++ .word (AT91_BASE_SYS + AT91_DDRSDRAMC_T1PR)
++ .word CONFIG_SYS_DDRC_T1PR_VAL
++ .word (AT91_BASE_SYS + AT91_DDRSDRAMC_T2PR)
++ .word CONFIG_SYS_DDRC_T2PR_VAL
++#else
+ .word (AT91_BASE_SYS + AT91_SDRAMC_MR)
+ .word CONFIG_SYS_SDRC_MR_VAL1
+ .word (AT91_BASE_SYS + AT91_SDRAMC_TR)
+@@ -266,6 +381,7 @@
+ .word CONFIG_SYS_SDRC_TR_VAL2
+ .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_VAL12
++#endif
+ /* User reset enable*/
+ .word (AT91_BASE_SYS + AT91_RSTC_MR)
+ .word CONFIG_SYS_RSTC_RMR_VAL
+diff -Naur u-boot-2009.11/cpu/arm926ejs/start.S u-boot-2009.11.new/cpu/arm926ejs/start.S
+--- u-boot-2009.11/cpu/arm926ejs/start.S 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/cpu/arm926ejs/start.S 2010-10-08 12:09:30.000000000 +0200
+@@ -184,8 +184,8 @@
+ cmp r0, r1
+ ble clbss_l
+
+- bl coloured_LED_init
+- bl red_LED_on
++// bl coloured_LED_init
++// bl red_LED_on
+
+ ldr pc, _start_armboot
+
+diff -Naur u-boot-2009.11/drivers/mmc/gen_atmel_mci.c u-boot-2009.11.new/drivers/mmc/gen_atmel_mci.c
+--- u-boot-2009.11/drivers/mmc/gen_atmel_mci.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/drivers/mmc/gen_atmel_mci.c 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,329 @@
++/*
++ * Copyright 2010, Rob Emanuele <rob at emanuele.us>
++ *
++ * Original Driver:
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++//#define GEN_ATMEL_MCI_DEBUG 1
++#include <config.h>
++#include <common.h>
++#include <command.h>
++#include <hwconfig.h>
++#include <mmc.h>
++#include <part.h>
++#include <malloc.h>
++#include <mmc.h>
++#include <asm/io.h>
++#include <asm/errno.h>
++#include <asm/byteorder.h>
++#include <asm/arch/clk.h>
++#include <asm/arch/memory-map.h>
++#include "atmel_mci.h"
++
++DECLARE_GLOBAL_DATA_PTR;
++
++#ifndef CONFIG_SYS_MMC_CLK_OD
++#define CONFIG_SYS_MMC_CLK_OD 150000
++#endif
++#define MMC_DEFAULT_BLKLEN 512
++
++void dump_cmd(uint cmdr, uint arg, uint status, const char* msg)
++{
++ printf("gen_atmel_mci: CMDR 0x%08x (%2u) ARGR 0x%08x (SR: 0x%08x) %s\n",
++ cmdr, cmdr&0x3F, arg, status, msg);
++}
++
++/* Setup for MCI Clock and Block Size */
++static void mci_set_mode(unsigned long hz, unsigned long blklen)
++{
++ unsigned long bus_hz;
++ unsigned long clkdiv;
++
++ if (hz > 0) {
++ bus_hz = get_mck_clk_rate();
++ clkdiv = (bus_hz / hz) / 2 - 1;
++ } else {
++ clkdiv = ~0UL;
++ }
++
++ //printf("mmc: setting clock %lu Hz, block size %lu\n", hz, blklen);
++
++ if (clkdiv & ~255UL) {
++ clkdiv = 255;
++ //printf("mmc: clock %lu too low; setting CLKDIV to 255\n", hz);
++ }
++
++ blklen &= 0xfffc;
++ /* On some platforms RDPROOF and WRPROOF are ignored */
++ mmci_writel(MR, (MMCI_BF(CLKDIV, clkdiv)
++ | MMCI_BF(BLKLEN, blklen)
++ | MMCI_BIT(RDPROOF)
++ | MMCI_BIT(WRPROOF)));
++}
++
++/* Return the CMDR with flags for a given command and data packet */
++static uint atmel_encode_cmd(struct mmc_cmd *cmd, struct mmc_data *data, uint* error_flags)
++{
++ uint cmdr = 0;
++ /* Default Flags for Errors */
++ *error_flags |= (MMCI_BIT(DTOE) | MMCI_BIT(RDIRE) | MMCI_BIT(RENDE) | MMCI_BIT(RINDE) | MMCI_BIT(RTOE));
++
++ /* Default Flags for the Command */
++ cmdr |= MMCI_BIT(MAXLAT);
++
++ if (data) {
++ cmdr |= MMCI_BF(TRCMD,1);
++
++ if (data->blocks > 1) {
++ cmdr |= MMCI_BF(TRTYP,1);
++ }
++
++ if (data->flags & MMC_DATA_READ)
++ cmdr |= MMCI_BIT(TRDIR);
++ }
++
++ if (cmd->resp_type & MMC_RSP_CRC)
++ *error_flags |= MMCI_BIT(RCRCE);
++
++ if (cmd->resp_type & MMC_RSP_136)
++ cmdr |= MMCI_BF(RSPTYP,2);
++ else if (cmd->resp_type & MMC_RSP_BUSY)
++ cmdr |= MMCI_BF(RSPTYP,3);
++ else if (cmd->resp_type & MMC_RSP_PRESENT)
++ cmdr |= MMCI_BF(RSPTYP,1);
++
++ return cmdr | MMCI_BF(CMDNB,cmd->cmdidx);
++}
++
++static uint atmel_data_read(uint* data, uint error_flags)
++{
++ uint status;
++ do {
++ status = mmci_readl(SR);
++ if (status & (error_flags | MMCI_BIT(OVRE)))
++ goto io_fail;
++ } while (!(status & MMCI_BIT(RXRDY)));
++
++ if (status & MMCI_BIT(RXRDY)) {
++ *data = mmci_readl(RDR);
++ status = 0;
++ }
++io_fail:
++ return status;
++}
++
++static uint atmel_data_write(uint* data, uint error_flags)
++{
++ uint status;
++ do {
++ status = mmci_readl(SR);
++ if (status & (error_flags | MMCI_BIT(UNRE)))
++ goto io_fail;
++ } while (!(status & MMCI_BIT(TXRDY)));
++
++ if (status & MMCI_BIT(TXRDY)) {
++ mmci_writel(TDR,*data);
++ status = 0;
++ }
++io_fail:
++ return status;
++}
++
++/*
++ * Sends a command out on the bus and deals with the block data.
++ * Takes the mmc pointer, a command pointer, and an optional data pointer.
++ */
++static int
++atmel_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
++{
++ uint cmdr;
++ uint error_flags = 0;
++ uint status;
++
++ /* Figure out the transfer arguments */
++ cmdr = atmel_encode_cmd(cmd, data, &error_flags);
++
++ /* Send the command */
++ mmci_writel(ARGR,cmd->cmdarg);
++ mmci_writel(CMDR, cmdr);
++
++#if GEN_ATMEL_MCI_DEBUG
++ dump_cmd(cmdr, cmd->cmdarg, 0, "COMMAND Dbg Msg");
++#endif
++
++ /* Wait for the command to complete */
++ while (!((status = mmci_readl(SR)) & MMCI_BIT(CMDRDY)));
++
++ if (status & error_flags) {
++ //dump_cmd(cmdr, cmd->cmdarg, status, "COMMAND Failed");
++ return COMM_ERR;
++ }
++
++ /* Copy the response to the response buffer */
++ if (cmd->resp_type & MMC_RSP_136) {
++ cmd->response[0] = mmci_readl(RSPR);
++ cmd->response[1] = mmci_readl(RSPR1);
++ cmd->response[2] = mmci_readl(RSPR2);
++ cmd->response[3] = mmci_readl(RSPR3);
++ } else
++ cmd->response[0] = mmci_readl(RSPR);
++
++ /* transfer all of the blocks */
++ if (data) {
++ uint word_count, block_count;
++ uint* ioptr;
++ uint sys_blocksize, dummy, i;
++ uint (*atmel_data_op)(uint* data, uint error_flags);
++
++ if (data->flags & MMC_DATA_READ) {
++ atmel_data_op = atmel_data_read;
++ sys_blocksize = mmc->read_bl_len;
++ ioptr = (uint*)data->dest;
++ } else {
++ atmel_data_op = atmel_data_write;
++ sys_blocksize = mmc->write_bl_len;
++ ioptr = (uint*)data->src;
++ }
++
++ status = 0;
++ for(block_count = 0; block_count < data->blocks && !status; block_count++) {
++ word_count = 0;
++ do {
++ status = atmel_data_op(ioptr,error_flags);
++ word_count++;
++ ioptr++;
++ } while(!status && word_count < (data->blocksize / 4));
++#if GEN_ATMEL_MCI_DEBUG
++ if (data->flags & MMC_DATA_READ)
++ {
++ char *mem_args[3];
++ char mem_addr_str[16];
++ char mem_len_str[16];
++ printf("Command caused a block read for %u bytes (read %u bytes)\n", data->blocksize, word_count*4);
++ mem_args[0] = "md.l";
++ sprintf(mem_addr_str,"0x%08x",(uint)(data->dest));
++ mem_args[1] = mem_addr_str;
++ sprintf(mem_len_str,"0x%x",word_count);
++ mem_args[2] = mem_len_str;
++ printf("Dumping with: %s %s %s\n", mem_args[0], mem_args[1], mem_args[2]);
++ do_mem_md(NULL, 0, 3, mem_args);
++ }
++#endif
++#if GEN_ATMEL_MCI_DEBUG
++ if (!status && word_count < (sys_blocksize / 4))
++ printf("sponging....\n");
++#endif
++ /* sponge the rest of a full block */
++ while (!status && word_count < (sys_blocksize / 4)) {
++ status = atmel_data_op(&dummy,error_flags);
++ word_count++;
++ }
++ if (status) {
++ dump_cmd(cmdr, cmd->cmdarg, status, "XFER Failed");
++ return COMM_ERR;
++ }
++ }
++
++ /* Wait for Transfer End */
++ i = 0;
++ do {
++ status = mmci_readl(SR);
++
++ if (status & error_flags) {
++ dump_cmd(cmdr, cmd->cmdarg, status, "XFER DTIP Wait Failed");
++ return COMM_ERR;
++ }
++ i++;
++ } while ((status & MMCI_BIT(DTIP)) && i < 10000);
++ if (status & MMCI_BIT(DTIP)) {
++ dump_cmd(cmdr, cmd->cmdarg, status, "XFER DTIP never unset, ignoring");
++ }
++ }
++
++ return 0;
++}
++
++static void atmel_set_ios(struct mmc *mmc)
++{
++ /* Set the clock speed */
++ mci_set_mode(mmc->clock, MMC_DEFAULT_BLKLEN);
++
++ /* set the bus width and select slot A for this interface
++ * there is no capability for multiple slots on the same interface yet
++ */
++ /* Bitfield SCDBUS needs to be expanded to 2 bits for 8-bit buses
++ */
++ if (mmc->bus_width == 4)
++ mmci_writel(SDCR, MMCI_BF(SCDBUS,0x1)|MMCI_BF(SCDSEL,0x0));
++ else
++ mmci_writel(SDCR, MMCI_BF(SCDBUS,0x0)|MMCI_BF(SCDSEL,0x0));
++}
++
++static int atmel_init(struct mmc *mmc)
++{
++ /* Initialize controller */
++ mmci_writel(CR, MMCI_BIT(SWRST)); /* soft reset */
++ mmci_writel(CR, MMCI_BIT(PWSDIS)); /* disable power save */
++ mmci_writel(CR, MMCI_BIT(MCIEN)); /* enable mci */
++
++ /* Initial Time-outs */
++ mmci_writel(DTOR, 0x7f);
++ /* Disable Interrupts */
++ mmci_writel(IDR, ~0UL);
++
++ /* Set defualt clocks and blocklen */
++ mci_set_mode(CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
++
++ return 0;
++}
++
++static int atmel_initialize(bd_t *bis)
++{
++ struct mmc *mmc;
++
++ mmc = malloc(sizeof(struct mmc));
++
++ sprintf(mmc->name, "Atmel MCI");
++ /* We set this but atmel_mci.h makes use of MMCI_BASE directly */
++ mmc->priv = (void *)MMCI_BASE;
++ mmc->send_cmd = atmel_send_cmd;
++ mmc->set_ios = atmel_set_ios;
++ mmc->init = atmel_init;
++
++ /* need to be able to pass these in on a baord by board basis */
++ mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
++ mmc->host_caps = MMC_MODE_4BIT;
++
++ /* High Speed Support? */
++
++ mmc->f_min = get_mck_clk_rate() / (2*(0xFF+1));
++ mmc->f_max = get_mck_clk_rate() / (2);
++
++ mmc_register(mmc);
++
++ return 0;
++}
++
++int atmel_mmc_init(bd_t *bis)
++{
++ return atmel_initialize(bis);
++}
+diff -Naur u-boot-2009.11/drivers/mmc/Makefile u-boot-2009.11.new/drivers/mmc/Makefile
+--- u-boot-2009.11/drivers/mmc/Makefile 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/drivers/mmc/Makefile 2010-10-08 12:09:30.000000000 +0200
+@@ -26,6 +26,7 @@
+ LIB := $(obj)libmmc.a
+
+ COBJS-$(CONFIG_GENERIC_MMC) += mmc.o
++COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
+ COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o
+ COBJS-$(CONFIG_BFIN_SDH) += bfin_sdh.o
+ COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o
+diff -Naur u-boot-2009.11/drivers/mmc/mmc.c u-boot-2009.11.new/drivers/mmc/mmc.c
+--- u-boot-2009.11/drivers/mmc/mmc.c 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/drivers/mmc/mmc.c 2010-10-08 12:09:30.000000000 +0200
+@@ -36,6 +36,13 @@
+ static struct list_head mmc_devices;
+ static int cur_dev_num = -1;
+
++int __board_mmc_getcd(u8 *cd, struct mmc *mmc) {
++ return -1;
++}
++
++int board_mmc_getcd(u8 *cd, struct mmc *mmc)__attribute__((weak,
++ alias("__board_mmc_getcd")));
++
+ int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
+ {
+ return mmc->send_cmd(mmc, cmd, data);
+@@ -172,7 +179,7 @@
+ err = mmc_set_blocklen(mmc, mmc->read_bl_len);
+
+ if (err)
+- return err;
++ goto free_buffer;
+
+ for (i = startblock; i <= endblock; i++) {
+ int segment_size;
+@@ -273,7 +280,15 @@
+
+ cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
+ cmd.resp_type = MMC_RSP_R3;
+- cmd.cmdarg = mmc->voltages;
++
++ /*
++ * Most cards do not answer if some reserved bits
++ * in the ocr are set. However, Some controller
++ * can set bit 7 (reserved for low voltages), but
++ * how to manage low voltages SD card is not yet
++ * specified.
++ */
++ cmd.cmdarg = mmc->voltages & 0xff8000;
+
+ if (mmc->version == SD_VERSION_2)
+ cmd.cmdarg |= OCR_HCS;
+diff -Naur u-boot-2009.11/drivers/serial/atmel_usart.c u-boot-2009.11.new/drivers/serial/atmel_usart.c
+--- u-boot-2009.11/drivers/serial/atmel_usart.c 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/drivers/serial/atmel_usart.c 2010-10-08 12:11:21.000000000 +0200
+@@ -34,6 +34,9 @@
+ #elif defined(CONFIG_USART3)
+ # define USART_ID 3
+ # define USART_BASE USART3_BASE
++#elif defined(CONFIG_USART4)
++# define USART_ID 4
++# define USART_BASE USART4_BASE
+ #endif
+
+ #include "atmel_usart.h"
+diff -Naur u-boot-2009.11/include/asm-arm/arch-at91/at91_pmc.h u-boot-2009.11.new/include/asm-arm/arch-at91/at91_pmc.h
+--- u-boot-2009.11/include/asm-arm/arch-at91/at91_pmc.h 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/include/asm-arm/arch-at91/at91_pmc.h 2010-10-08 12:09:30.000000000 +0200
+@@ -111,6 +111,8 @@
+ #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
+ #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
+ #define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
++#define AT91_PMC_PLLICPR (AT91_PMC + 0x80) /* Charge Pump Configuration register */
++#define AT91_PMC_ICPLLA (1 << 0)
+
+ #define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */
+ #define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */
+diff -Naur u-boot-2009.11/include/asm-arm/arch-at91/at91sam9g45_ddrsdram.h u-boot-2009.11.new/include/asm-arm/arch-at91/at91sam9g45_ddrsdram.h
+--- u-boot-2009.11/include/asm-arm/arch-at91/at91sam9g45_ddrsdram.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/asm-arm/arch-at91/at91sam9g45_ddrsdram.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,118 @@
++/*
++ * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_wdt.h]
++ *
++ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
++ * Copyright (C) 2007 Andrew Victor
++ * Copyright (C) 2007 Atmel Corporation.
++ *
++ * DDRSDRAM Controllers (SDRAMC) - System peripherals registers.
++ * Based on AT91SAM9261 datasheet revision D.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef AT91SAM9_DDRSDRAMC_H
++#define AT91SAM9_DDRSDRAMC_H
++
++/* DDRSDRAM Controller (SDRAMC) registers */
++#define AT91_DDRSDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */
++#define AT91_DDRSDRAMC_MODE (0xf << 0) /* Command Mode */
++#define AT91_DDRSDRAMC_MODE_NORMAL 0
++#define AT91_DDRSDRAMC_MODE_NOP 1
++#define AT91_DDRSDRAMC_MODE_PRECHARGE 2
++#define AT91_DDRSDRAMC_MODE_LMR 3
++#define AT91_DDRSDRAMC_MODE_REFRESH 4
++#define AT91_DDRSDRAMC_MODE_EXT_LMR 5
++#define AT91_DDRSDRAMC_MODE_DEEP 6
++
++#define AT91_DDRSDRAMC_RTR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */
++#define AT91_DDRSDRAMC_COUNT (0xfff << 0) /* Refresh Timer Counter */
++
++#define AT91_DDRSDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */
++#define AT91_DDRSDRAMC_NC (3 << 0) /* Number of Column Bits */
++#define AT91_DDRSDRAMC_NC_8 (0 << 0)
++#define AT91_DDRSDRAMC_NC_9 (1 << 0)
++#define AT91_DDRSDRAMC_NC_10 (2 << 0)
++#define AT91_DDRSDRAMC_NC_11 (3 << 0)
++#define AT91_DDRSDRAMC_NC_DDR_9 (0 << 0)
++#define AT91_DDRSDRAMC_NC_DDR_10 (1 << 0)
++#define AT91_DDRSDRAMC_NC_DDR_11 (2 << 0)
++#define AT91_DDRSDRAMC_NC_DDR_12 (3 << 0)
++#define AT91_DDRSDRAMC_NR (3 << 2) /* Number of Row Bits */
++#define AT91_DDRSDRAMC_NR_11 (0 << 2)
++#define AT91_DDRSDRAMC_NR_12 (1 << 2)
++#define AT91_DDRSDRAMC_NR_13 (2 << 2)
++#define AT91_DDRSDRAMC_NR_14 (3 << 2)
++#define AT91_DDRSDRAMC_CAS (7 << 4) /* CAS Latency */
++#define AT91_DDRSDRAMC_CAS_1 (1 << 4)
++#define AT91_DDRSDRAMC_CAS_2 (2 << 4)
++#define AT91_DDRSDRAMC_CAS_3 (3 << 4)
++#define AT91_DDRSDRAMC_DLL (1 << 7)
++#define AT91_DDRSDRAMC_DIC (1 << 8) /* Weak Pullups*/
++#define AT91_DDRSDRAMC_DIS_DLL (1 << 9) /* Disable DLL*/
++#define AT91_DDRSDRAMC_OCD (0x7 << 12) /* Row Precharge Delay */
++#define AT91_DDRSDRAMC_DQMS (0x1 << 16) /* Mask Data shared */
++#define AT91_DDRSDRAMC_ACTBST (0x1 << 18) /* Active Boost to busrt stop*/
++
++#define AT91_DDRSDRAMC_T0PR (AT91_SDRAMC + 0x0C)
++#define AT91_DDRSDRAMC_TRAS(x) ((x)<<0)
++#define AT91_DDRSDRAMC_TRCD(x) ((x)<<4)
++#define AT91_DDRSDRAMC_TWR(x) ((x)<<8)
++#define AT91_DDRSDRAMC_TRC(x) ((x)<<12)
++#define AT91_DDRSDRAMC_TRP(x) ((x)<<16)
++#define AT91_DDRSDRAMC_TRRD(x) ((x)<<20)
++#define AT91_DDRSDRAMC_TWTR(x) ((x)<<24)
++#define AT91_DDRSDRAMC_rWRRD (1<<27)
++#define AT91_DDRSDRAMC_TMRD(x) ((x)<<28)
++#define AT91_DDRSDRAMC_T1PR (AT91_SDRAMC + 0x10)
++#define AT91_DDRSDRAMC_TRFC(x) (((x) & 0x1F)<<0)
++#define AT91_DDRSDRAMC_TXSNR(x) (((x) & 0x0FF)<<8)
++#define AT91_DDRSDRAMC_TXSRD(x) (((x) & 0x0FF)<<16)
++#define AT91_DDRSDRAMC_TXP(x) (((x) & 0x0F)<<24)
++#define AT91_DDRSDRAMC_T2PR (AT91_SDRAMC + 0x14)
++#define AT91_DDRSDRAMC_TXARD(x) (((x) & 0x0F)<<0)
++#define AT91_DDRSDRAMC_TXARDS(x) (((x) & 0x0F)<<4)
++#define AT91_DDRSDRAMC_TRPA(x) (((x) & 0x0F)<<8)
++#define AT91_DDRSDRAMC_TRTP(x) (((x) & 0x0F)<<12)
++#define AT91_DDRSDRAMC_LPR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Low Power Register */
++#define AT91_DDRSDRAMC_LPCB (3 << 0) /* Low-power Configurations */
++#define AT91_DDRSDRAMC_LPCB_DISABLE 0
++#define AT91_DDRSDRAMC_LPCB_SELF_REFRESH 1
++#define AT91_DDRSDRAMC_LPCB_POWER_DOWN 2
++#define AT91_DDRSDRAMC_LPCB_DEEP_POWER_DOWN 3
++#define AT91_DDRSDRAMC_CLK_FR (1 << 2) /* Clock Frozen */
++#define AT91_DDRSDRAMC_PASR (7 << 4) /* Partial Array Self Refresh */
++#define AT91_DDRSDRAMC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */
++#define AT91_DDRSDRAMC_DS (3 << 10) /* Drive Strength */
++#define AT91_DDRSDRAMC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */
++#define AT91_DDRSDRAMC_TIMEOUT_0_CLK_CYCLES (0 << 12)
++#define AT91_DDRSDRAMC_TIMEOUT_64_CLK_CYCLES (1 << 12)
++#define AT91_DDRSDRAMC_TIMEOUT_128_CLK_CYCLES (2 << 12)
++#define AT91_DDRSDRAMC_APDE (1 << 16) /* Active power Down Exit */
++
++#define AT91_DDRSDRAMC_MDR (AT91_SDRAMC + 0x20) /* SDRAM Memory Device Register */
++#define AT91_DDRSDRAMC_MD (7 << 0) /* Memory Device Type */
++#define AT91_DDRSDRAMC_MD_SDRAM 0
++#define AT91_DDRSDRAMC_MD_LOW_POWER_SDRAM 1
++#define AT91_DDRSDRAMC_MD_LOW_POWER_DDRSDRAM 3
++#define AT91_DDRSDRAMC_MD_DDR2SDRAM 6
++
++#define AT91_DDRSDRAMC_DBW (1 << 4) /* Data Bus Width 18 Bit*/
++
++#define AT91_DDRSDRAMC_HS (AT91_SDRAMC + 0x2C) /* High Speed Register */
++#define AT91_DDRSDRAMC_NO_OPTI (1 << 1) /* No Optimization */
++#define AT91_DDRSDRAMC_DIS_ANTICIP_READ (1 << 2) /* Disable anticip read */
++#define AT91_DDRSDRAMC_DELAY1 (AT91_SDRAMC + 0x30) /* Delay on I/O */
++#define AT91_DDRSDRAMC_DELAY2 (AT91_SDRAMC + 0x34) /* Delay on I/O */
++#define AT91_DDRSDRAMC_DELAY3 (AT91_SDRAMC + 0x38) /* Delay on I/O */
++#define AT91_DDRSDRAMC_DELAY4 (AT91_SDRAMC + 0x3c) /* Delay on I/O */
++#define AT91_DDRSDRAMC_DRIVESTRENGTH (AT91_SDRAMC + 0x50) /* Drive Strength */
++#define AT91_DDRSDRAMC_DSC (1<<0) /* Full drive */
++#define AT91_DDRSDRAMC_WPMR (AT91_SDRAMC + 0xE4) /* Write protect Mode */
++
++#define AT91_DDRSDRAMC_WPEN 0x44445201 /* Enable */
++#define AT91_DDRSDRAMC_WPDIS 0x44445200 /* Disable */
++#endif
+diff -Naur u-boot-2009.11/include/asm-arm/arch-at91/gpio.h u-boot-2009.11.new/include/asm-arm/arch-at91/gpio.h
+--- u-boot-2009.11/include/asm-arm/arch-at91/gpio.h 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/include/asm-arm/arch-at91/gpio.h 2010-10-08 12:09:30.000000000 +0200
+@@ -358,7 +358,7 @@
+ {
+ void *pio = pin_to_controller(pin);
+ unsigned mask = pin_to_mask(pin);
+- u32 pdsr;
++ __u32 pdsr;
+
+ pdsr = __raw_readl(pio + PIO_PDSR);
+ return (pdsr & mask) != 0;
+diff -Naur u-boot-2009.11/include/asm-arm/arch-at91/memory-map.h u-boot-2009.11.new/include/asm-arm/arch-at91/memory-map.h
+--- u-boot-2009.11/include/asm-arm/arch-at91/memory-map.h 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/include/asm-arm/arch-at91/memory-map.h 2010-10-08 12:11:21.000000000 +0200
+@@ -30,6 +30,7 @@
+ #define USART1_BASE AT91_USART1
+ #define USART2_BASE AT91_USART2
+ #define USART3_BASE (AT91_BASE_SYS + AT91_DBGU)
++#define USART4_BASE AT91_USART3
+ #define SPI0_BASE AT91_BASE_SPI
+
+ #endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */
+diff -Naur u-boot-2009.11/include/configs/icnova/arm400MHz.h u-boot-2009.11.new/include/configs/icnova/arm400MHz.h
+--- u-boot-2009.11/include/configs/icnova/arm400MHz.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/arm400MHz.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,8 @@
++/*
++ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
++ * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
++ * PLL frequency.
++ * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
++ */
++#define AT91_MAIN_CLOCK 12000000 // 12MHz crystal
++#define CONFIG_ARCH_CPU_INIT
+diff -Naur u-boot-2009.11/include/configs/icnova/base_arm.h u-boot-2009.11.new/include/configs/icnova/base_arm.h
+--- u-boot-2009.11/include/configs/icnova/base_arm.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/base_arm.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,90 @@
++#define CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++#ifndef CONFIG_SKIP_LOWLEVEL_INIT
++#define MASTER_PLL_MUL 200
++#define MASTER_PLL_DIV 3
++
++/* clocks */
++#define CONFIG_SYS_MOR_VAL \
++ (AT91_PMC_MOSCEN | \
++ (255 << 8)) /* Main Oscillator Start-up Time */
++
++#define CONFIG_SYS_PLLICPR_VAL 0 /* AT91_PMC_ICPLLA */
++#define CONFIG_SYS_PLLAR_VAL \
++ (AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ \
++ AT91_PMC_PLLCOUNT | /* PLL Counter */ \
++ ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV))
++
++/* PCK/2 = MCK Master Clock from PLLA */
++#define CONFIG_SYS_MCKR1_VAL \
++ (AT91_PMC_CSS_MAIN | \
++ AT91_PMC_PRES_1 | \
++ AT91SAM9_PMC_MDIV_3 | \
++ AT91_PMC_PDIV_1)
++/* PCK/2 = MCK Master Clock from PLLA */
++#define CONFIG_SYS_MCKR2_VAL \
++ (AT91_PMC_CSS_PLLA | \
++ AT91_PMC_PRES_1 | \
++ AT91SAM9_PMC_MDIV_3 | \
++ AT91_PMC_PDIV_2)
++
++/* define PDC[31:16] as DATA[31:16] */
++#define CONFIG_SYS_PIOD_PDR_VAL1 0xFFFF0000
++/* no pull-up for D[31:16] */
++#define CONFIG_SYS_PIOD_PPUDR_VAL 0xFFFF0000
++/* EBI0_CSA, CS3 NAND Flash, 3.3V memories */
++#define CONFIG_SYS_MATRIX_EBI0CSA_VAL \
++ (AT91_MATRIX_EBI0_DBPUC | AT91_MATRIX_EBI0_VDDIOMSEL_3_3V )
++#define CONFIG_SYS_MATRIX_EBICSA_VAL 0x00070008 // 3.3V EBI, NAND-En
++
++
++/* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */
++#define CONFIG_SYS_SMC0_SETUP0_VAL \
++ (AT91_SMC_NWESETUP_(8) | AT91_SMC_NCS_WRSETUP_(0) | \
++ AT91_SMC_NRDSETUP_(16) | AT91_SMC_NCS_RDSETUP_(0))
++#define CONFIG_SYS_SMC0_PULSE0_VAL \
++ (AT91_SMC_NWEPULSE_(0x3b) | AT91_SMC_NCS_WRPULSE_(0x34) | \
++ AT91_SMC_NRDPULSE_(0x38) | AT91_SMC_NCS_RDPULSE_(0x3b))
++#define CONFIG_SYS_SMC0_CYCLE0_VAL \
++ (AT91_SMC_NWECYCLE_(0x3b) | AT91_SMC_NRDCYCLE_(0x3b))
++#define CONFIG_SYS_SMC0_MODE0_VAL \
++ AT91_SMC_DBW_16
++
++/* user reset enable */
++#define CONFIG_SYS_RSTC_RMR_VAL \
++ (AT91_RSTC_KEY | \
++ AT91_RSTC_PROCRST | \
++ AT91_RSTC_RSTTYP_WAKEUP | \
++ AT91_RSTC_RSTTYP_WATCHDOG)
++
++/* Disable Watchdog */
++#define CONFIG_SYS_WDTC_WDMR_VAL \
++ (AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT | \
++ AT91_WDT_WDV | \
++ AT91_WDT_WDDIS | \
++ AT91_WDT_WDD)
++
++/* DDR2-SDRAM */
++#define CONFIG_SYS_AT91_DDRAM
++
++#define AT91_SDRAMC (0xffffe600 - AT91_BASE_SYS)
++
++#define CONFIG_SYS_DDRC_MDR_VAL \
++ (AT91_DDRSDRAMC_DBW| AT91_DDRSDRAMC_MD_DDR2SDRAM)
++#define CONFIG_SYS_DDRC_CR0_VAL \
++ (AT91_DDRSDRAMC_NC_DDR_10 | AT91_DDRSDRAMC_NR_14 | AT91_DDRSDRAMC_CAS_3)
++#define CONFIG_SYS_DDRC_T0PR_VAL \
++ (AT91_DDRSDRAMC_TRAS(6) | AT91_DDRSDRAMC_TRCD(2) |\
++ AT91_DDRSDRAMC_TWR(2) | AT91_DDRSDRAMC_TRC(8) | \
++ AT91_DDRSDRAMC_TRP(2) | AT91_DDRSDRAMC_TRRD(1) | \
++ AT91_DDRSDRAMC_TWTR(1) | AT91_DDRSDRAMC_TMRD(2) )
++#define CONFIG_SYS_DDRC_T1PR_VAL \
++ (AT91_DDRSDRAMC_TRFC(14) | AT91_DDRSDRAMC_TXSNR(16) \
++ |AT91_DDRSDRAMC_TXSRD(200) | AT91_DDRSDRAMC_TXP(2))
++#define CONFIG_SYS_DDRC_T2PR_VAL \
++ (AT91_DDRSDRAMC_TXARD(2) | AT91_DDRSDRAMC_TXARDS(7) \
++ |AT91_DDRSDRAMC_TRPA(0) | AT91_DDRSDRAMC_TRTP(1))
++#define CONFIG_SYS_SDRAM_REFRESH_VAL 0x24B
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova/base.h u-boot-2009.11.new/include/configs/icnova/base.h
+--- u-boot-2009.11/include/configs/icnova/base.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/base.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,86 @@
++#ifdef CONFIG_ICNOVA_ARM9
++#define CONFIG_ARM926EJS 1
++#define CONFIG_AT91SAM9G45 1
++#else
++#define CONFIG_AVR32 1
++#define CONFIG_AT32AP 1
++#endif
++
++#include <asm/arch/memory-map.h>
++
++/*
++ * Timer clock frequency. We're using the CPU-internal COUNT register
++ * for this, so this is equivalent to the CPU core clock frequency
++ */
++#define CONFIG_SYS_HZ 1000
++
++#define CONFIG_CMDLINE_TAG 1
++#define CONFIG_SETUP_MEMORY_TAGS 1
++#define CONFIG_INITRD_TAG 1
++
++#include <config_cmd_default.h>
++#define CONFIG_CMD_ASKENV
++/*
++ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
++ * data on the serial line may interrupt the boot sequence.
++ */
++#define CONFIG_BOOTDELAY 3
++#if 0
++#define CONFIG_AUTOBOOT 1
++#define CONFIG_AUTOBOOT_KEYED 1
++#define CONFIG_AUTOBOOT_PROMPT \
++ "Press SPACE to abort autoboot in %d seconds\n", bootdelay
++#define CONFIG_AUTOBOOT_DELAY_STR "d"
++#define CONFIG_AUTOBOOT_STOP_STR " "
++#endif
++
++
++#ifdef CONFIG_ICNOVA_ARM9
++#define CONFIG_STACKSIZE (16*2048)
++
++#define PHYS_SDRAM 0x70000000
++#define PHYS_SDRAM_SIZE 0x08000000 // 128 MiB
++#define CONFIG_SYS_GBL_DATA_SIZE 128
++#define INTERNAL_SRAM_BASE 0x00300000
++#define INTERNAL_SRAM_SIZE 0x00010000
++#include <configs/icnova/base_arm.h>
++#else
++#define CONFIG_STACKSIZE (2048)
++
++#define CONFIG_SYS_DCACHE_LINESZ 32
++#define CONFIG_SYS_ICACHE_LINESZ 32
++
++#define CONFIG_PIO2 1
++#define CONFIG_SYS_NR_PIOS 5
++#define CONFIG_SYS_HSDRAMC 1
++#define PHYS_SDRAM EBI_SDRAM_BASE
++#define PHYS_SDRAM_SIZE 0x700000
++#endif
++
++#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
++#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE)
++
++#define CONFIG_NR_DRAM_BANKS 1
++
++#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
++#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
++#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
++
++#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
++
++#define CONFIG_SYS_MALLOC_LEN (256*1024)
++#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
++
++/* Allow 4MB for the kernel run-time image */
++#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM + 0x00400000)
++#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
++
++#define CONFIG_SYS_PROMPT "ICnova> "
++#define CONFIG_SYS_CBSIZE 256
++#define CONFIG_SYS_MAXARGS 16
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
++#define CONFIG_SYS_LONGHELP 1
++#define CONFIG_AUTO_COMPLETE
++#define CONFIG_SYS_HUSH_PARSER
++#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
++
+diff -Naur u-boot-2009.11/include/configs/icnova/cpu140MHz.h u-boot-2009.11.new/include/configs/icnova/cpu140MHz.h
+--- u-boot-2009.11/include/configs/icnova/cpu140MHz.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/cpu140MHz.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,42 @@
++
++/*
++ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
++ * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
++ * PLL frequency.
++ * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
++ */
++#define CONFIG_PLL 1
++#define CONFIG_SYS_POWER_MANAGER 1
++#define CONFIG_SYS_OSC0_HZ 20000000
++#define CONFIG_SYS_PLL0_DIV 1
++#define CONFIG_SYS_PLL0_MUL 7
++#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
++/*
++ * Set the CPU running at:
++ * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
++ */
++#define CONFIG_SYS_CLKDIV_CPU 0
++/*
++ * Set the HSB running at:
++ * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
++ */
++#define CONFIG_SYS_CLKDIV_HSB 1
++/*
++ * Set the PBA running at:
++ * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
++ */
++#define CONFIG_SYS_CLKDIV_PBA 2
++/*
++ * Set the PBB running at:
++ * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
++ */
++#define CONFIG_SYS_CLKDIV_PBB 1
++
++/*
++ * The PLLOPT register controls the PLL like this:
++ * icp = PLLOPT<2>
++ * ivco = PLLOPT<1:0>
++ *
++ * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
++ */
++#define CONFIG_SYS_PLL0_OPT 0x04
+diff -Naur u-boot-2009.11/include/configs/icnova/flash2x8.h u-boot-2009.11.new/include/configs/icnova/flash2x8.h
+--- u-boot-2009.11/include/configs/icnova/flash2x8.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/flash2x8.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,19 @@
++#define CONFIG_CMD_JFFS2
++#define CONFIG_CMD_FLASH
++
++//#ifdef CONFIG_ICNOVA_ARM9
++//#define CONFIG_SYS_FLASH_BASE 0x10000000
++//#else
++#define CONFIG_SYS_FLASH_BASE 0x00000000
++//#endif
++#define CONFIG_SYS_FLASH_SIZE 0x00100000
++#define CONFIG_SYS_MAX_FLASH_BANKS 1
++#define CONFIG_SYS_FLASH_SECT 8
++#define CONFIG_SYS_MAX_FLASH_SECT (CONFIG_SYS_FLASH_SECT+1)
++
++#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
++
++#define CONFIG_ENV_IS_IN_FLASH 1
++#define CONFIG_ENV_SIZE (CONFIG_SYS_FLASH_SIZE / CONFIG_SYS_FLASH_SECT)
++#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
++
+diff -Naur u-boot-2009.11/include/configs/icnova/flash.h u-boot-2009.11.new/include/configs/icnova/flash.h
+--- u-boot-2009.11/include/configs/icnova/flash.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/flash.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,24 @@
++#define CONFIG_CMD_JFFS2
++#define CONFIG_JFFS2_CMDLINE
++#define CONFIG_CMD_FLASH
++
++#define CONFIG_SYS_FLASH_BASE 0x00000000
++#define CONFIG_SYS_FLASH_SIZE 0x800000
++#define CONFIG_SYS_MAX_FLASH_BANKS 1
++#define CONFIG_SYS_MAX_FLASH_SECT 135
++
++#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
++
++#define CONFIG_ENV_IS_IN_FLASH 1
++#define CONFIG_ENV_SIZE 65536
++#define CONFIG_ENV_ADDR 0x20000
++
++#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(boot)ro,64k(env)ro,-(root)"
++#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
++
++#undef CONFIG_BOOTARGS
++#undef CONFIG_BOOTCOMMAND
++
++#define CONFIG_BOOTARGS "root=1F02 rootfstype=jffs2"
++#define CONFIG_BOOTCOMMAND \
++ "mtdparts default; chpart nor0,2; fsload boot/uImage; bootm"
+diff -Naur u-boot-2009.11/include/configs/icnova/mmc.h u-boot-2009.11.new/include/configs/icnova/mmc.h
+--- u-boot-2009.11/include/configs/icnova/mmc.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/mmc.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,25 @@
++
++#define CONFIG_DOS_PARTITION 1
++
++#undef CONFIG_BOOTARGS
++#undef CONFIG_BOOTCOMMAND
++
++#define CONFIG_BOOTARGS \
++ "root=/dev/mmcblk0p1 rootwait=1"
++
++#define CONFIG_BOOTCOMMAND \
++ "mmc rescan 0; fsload; bootm"
++
++#define CONFIG_CMD_EXT2
++#define CONFIG_CMD_FAT
++#define CONFIG_CMD_MMC
++
++#define CONFIG_MMC 1
++#ifdef CONFIG_ICNOVA_ARM9
++#define CONFIG_GENERIC_MMC 1
++#define CONFIG_GENERIC_ATMEL_MCI 1
++/*change this for your cpu */
++#define MMCI_BASE 0xFFF80000
++#else
++#define CONFIG_ATMEL_MCI 1
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova/mmcupdate.h u-boot-2009.11.new/include/configs/icnova/mmcupdate.h
+--- u-boot-2009.11/include/configs/icnova/mmcupdate.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/mmcupdate.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,30 @@
++#ifdef CONFIG_ICNOVA_ARM9
++#define MMCUPDATE_UADDRESS "0x70400000"
++#define MMCUPDATE_IADDRESS "0x71000000"
++#define MMCUPDATE_BOOTVAR "$bootargs"
++#else
++#define MMCUPDATE_UADDRESS "0x10400000"
++#define MMCUPDATE_IADDRESS "0x11000000"
++#define MMCUPDATE_BOOTVAR "$(bootargs)"
++#endif
++
++//#define MMCUPDATE_BOOTARGS CONFIG_BOOTARGS
++//#define MMCUPDATE_BOOTCOMMAND CONFIG_BOOTCOMMAND
++#define MMCUPDATE_BOOTARGS "rootfstype=ubifs root=ubi0:root ubi.mtd=2"
++#define MMCUPDATE_BOOTCOMMAND "mtdparts default; nand read "MMCUPDATE_UADDRESS" nand0,0; bootm"
++
++#undef CONFIG_BOOTARGS
++#undef CONFIG_BOOTCOMMAND
++
++#ifdef MTDPARTS_DEFAULT
++#define CONFIG_BOOTARGS MTDPARTS_DEFAULT
++#else
++#define CONFIG_BOOTARGS ""
++#endif
++#define CONFIG_BOOTCOMMAND \
++ "mtdparts default; mmc rescan 0; " \
++ "fatload mmc 0 "MMCUPDATE_IADDRESS" ramImage; "\
++ "fatload mmc 0 "MMCUPDATE_UADDRESS" uImage; " \
++ "bootm "MMCUPDATE_UADDRESS " " MMCUPDATE_IADDRESS"; "\
++ "setenv bootargs "MMCUPDATE_BOOTVAR" "MMCUPDATE_BOOTARGS"; "\
++ MMCUPDATE_BOOTCOMMAND
+diff -Naur u-boot-2009.11/include/configs/icnova/nand_arm9.h u-boot-2009.11.new/include/configs/icnova/nand_arm9.h
+--- u-boot-2009.11/include/configs/icnova/nand_arm9.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/nand_arm9.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,16 @@
++#include <configs/icnova/nand_base.h>
++#define CONFIG_BOOTCOMMAND \
++ "mtdparts default; nand read 0x71000000 nand0,0; bootm"
++
++#define CONFIG_SYS_NAND_BASE 0x40000000
++
++#ifndef __ASSEMBLY__
++#include <asm/arch/gpio.h>
++
++#define CFG_NAND_ALE 21
++#define CFG_NAND_CLE 22
++
++#define CFG_NAND_CE AT91_PIN_PC8
++#define CFG_NAND_RDY AT91_PIN_PC11
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova/nand_base.h u-boot-2009.11.new/include/configs/icnova/nand_base.h
+--- u-boot-2009.11/include/configs/icnova/nand_base.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/nand_base.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,32 @@
++
++#ifndef NULL
++#define NULL ((void *) 0)
++#endif
++
++#define CONFIG_CMD_NAND
++#define CONFIG_CMD_MTDPARTS
++#define CONFIG_MTD_DEVICE
++#define CONFIG_MTD_PARTITIONS
++#define CONFIG_MTD_NAND_ECC_JFFS2
++//#define CONFIG_CMD_UBIFS
++#define CONFIG_JFFS2_CMDLINE
++#define CONFIG_JFFS2_NAND
++#define CONFIG_SYS_MAX_NAND_DEVICE 1
++#define CONFIG_SYS_NAND_MAX_CHIPS 1
++#define NAND_MAX_FLOORS 1
++#define NAND_ChipID_UNKNOWN 0x00
++#define SECTORSIZE 2048
++#define ADDR_COLUMN 1
++#define ADDR_PAGE 2
++#define ADDR_COLUMN_PAGE 3
++//#define NAND_PAGE_SIZE 2048
++
++
++#define MTDIDS_DEFAULT "nand0=nand.0"
++#define MTDPARTS_DEFAULT "mtdparts=nand.0:2M(kernel),16M(root),-(Data)"
++
++
++#undef CONFIG_BOOTARGS
++#undef CONFIG_BOOTCOMMAND
++
++#define CONFIG_BOOTARGS "root=1F01 rootfstype=jffs2"
+diff -Naur u-boot-2009.11/include/configs/icnova/nand.h u-boot-2009.11.new/include/configs/icnova/nand.h
+--- u-boot-2009.11/include/configs/icnova/nand.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/nand.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,16 @@
++#include <configs/icnova/nand_base.h>
++#define CONFIG_BOOTCOMMAND \
++ "mtdparts default; nand read $(fileaddr) nand0,0; bootm"
++
++#define CONFIG_SYS_NAND_BASE 0x0C000000
++
++#ifndef __ASSEMBLY__
++#include <asm/arch/gpio.h>
++
++#define CFG_NAND_ALE 21
++#define CFG_NAND_CLE 22
++
++#define CFG_NAND_CE GPIO_PIN_PE19
++#define CFG_NAND_RDY GPIO_PIN_PE23
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova/net.h u-boot-2009.11.new/include/configs/icnova/net.h
+--- u-boot-2009.11/include/configs/icnova/net.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/net.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,22 @@
++
++/*
++ * After booting the board for the first time, new ethernet addresses
++ * should be generated and assigned to the environment variables
++ * "ethaddr" and "eth1addr". This is normally done during production.
++ */
++#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
++#define CONFIG_NET_MULTI 1
++#define CONFIG_MACB 1
++#ifndef CONFIG_ICNOVA_ARM9
++#define AT32AP700x_CHIP_HAS_MACB 1
++#endif
++
++/*
++ * BOOTP options
++ */
++#define CONFIG_BOOTP_SUBNETMASK
++#define CONFIG_BOOTP_GATEWAY
++
++#define CONFIG_CMD_NET
++#define CONFIG_CMD_NFS
++#define CONFIG_CMD_DHCP
+diff -Naur u-boot-2009.11/include/configs/icnova/usart0.h u-boot-2009.11.new/include/configs/icnova/usart0.h
+--- u-boot-2009.11/include/configs/icnova/usart0.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/usart0.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,9 @@
++
++#define CONFIG_ATMEL_USART y
++#define CONFIG_BAUDRATE 115200
++#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
++
++#define CONFIG_USART0
++#undef CONFIG_USART1
++#undef CONFIG_USART2
++#undef CONFIG_USART3
+diff -Naur u-boot-2009.11/include/configs/icnova/usart1.h u-boot-2009.11.new/include/configs/icnova/usart1.h
+--- u-boot-2009.11/include/configs/icnova/usart1.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/usart1.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,9 @@
++
++#define CONFIG_ATMEL_USART y
++#define CONFIG_BAUDRATE 115200
++#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
++
++#undef CONFIG_USART0
++#define CONFIG_USART1
++#undef CONFIG_USART2
++#undef CONFIG_USART3
+diff -Naur u-boot-2009.11/include/configs/icnova/usart2.h u-boot-2009.11.new/include/configs/icnova/usart2.h
+--- u-boot-2009.11/include/configs/icnova/usart2.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/usart2.h 2010-10-08 12:11:21.000000000 +0200
+@@ -0,0 +1,9 @@
++
++#define CONFIG_ATMEL_USART 1
++#define CONFIG_BAUDRATE 115200
++#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
++
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++#define CONFIG_USART2 1
++#undef CONFIG_USART3
+diff -Naur u-boot-2009.11/include/configs/icnova/usart3.h u-boot-2009.11.new/include/configs/icnova/usart3.h
+--- u-boot-2009.11/include/configs/icnova/usart3.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/usart3.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,9 @@
++
++#define CONFIG_ATMEL_USART 1
++#define CONFIG_BAUDRATE 115200
++#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
++
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++#undef CONFIG_USART2
++#define CONFIG_USART3 1
+diff -Naur u-boot-2009.11/include/configs/icnova/usart4.h u-boot-2009.11.new/include/configs/icnova/usart4.h
+--- u-boot-2009.11/include/configs/icnova/usart4.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova/usart4.h 2010-10-08 12:11:21.000000000 +0200
+@@ -0,0 +1,9 @@
++#define CONFIG_ATMEL_USART 1
++#define CONFIG_BAUDRATE 115200
++#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
++
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++#undef CONFIG_USART2
++#undef CONFIG_USART3
++#define CONFIG_USART4 1
+diff -Naur u-boot-2009.11/include/configs/icnova_arm9oem.h u-boot-2009.11.new/include/configs/icnova_arm9oem.h
+--- u-boot-2009.11/include/configs/icnova_arm9oem.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova_arm9oem.h 2010-10-08 12:11:21.000000000 +0200
+@@ -0,0 +1,17 @@
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#define CONFIG_ICNOVA_ARM9
++#include <configs/icnova/base.h>
++#include <configs/icnova/arm400MHz.h>
++#include <configs/icnova/mmc.h>
++#include <configs/icnova/flash2x8.h>
++#include <configs/icnova/nand_arm9.h>
++#include <configs/icnova/net.h>
++#define CONFIG_MACB_SEARCH_PHY
++#include <configs/icnova/usart3.h> // DBGU
++#include <configs/icnova/mmcupdate.h>
++//#include <configs/icnova/lcd320_240.h>
++//#include <configs/icnova/usb.h>
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova_arm9oem.h.orig u-boot-2009.11.new/include/configs/icnova_arm9oem.h.orig
+--- u-boot-2009.11/include/configs/icnova_arm9oem.h.orig 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova_arm9oem.h.orig 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,17 @@
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#define CONFIG_ICNOVA_ARM9
++#include <configs/icnova/base.h>
++#include <configs/icnova/arm400MHz.h>
++#include <configs/icnova/mmc.h>
++#include <configs/icnova/flash2x8.h>
++#include <configs/icnova/nand_arm9.h>
++#include <configs/icnova/net.h>
++#define CONFIG_MACB_SEARCH_PHY
++#include <configs/icnova/usart3.h> // DBGU
++#include <configs/icnova/mmcupdate.h>
++//#include <configs/icnova/lcd320_240.h>
++//#include <configs/icnova/usb.h>
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova_arm9oem_u4.h u-boot-2009.11.new/include/configs/icnova_arm9oem_u4.h
+--- u-boot-2009.11/include/configs/icnova_arm9oem_u4.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova_arm9oem_u4.h 2010-10-08 12:13:16.000000000 +0200
+@@ -0,0 +1,17 @@
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#define CONFIG_ICNOVA_ARM9
++#include <configs/icnova/base.h>
++#include <configs/icnova/arm400MHz.h>
++#include <configs/icnova/mmc.h>
++#include <configs/icnova/flash2x8.h>
++#include <configs/icnova/nand_arm9.h>
++#include <configs/icnova/net.h>
++#define CONFIG_MACB_SEARCH_PHY
++#include <configs/icnova/usart4.h>
++#include <configs/icnova/mmcupdate.h>
++//#include <configs/icnova/lcd320_240.h>
++//#include <configs/icnova/usb.h>
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova_base.h u-boot-2009.11.new/include/configs/icnova_base.h
+--- u-boot-2009.11/include/configs/icnova_base.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova_base.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,10 @@
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#include <configs/icnova/base.h>
++#include <configs/icnova/cpu140MHz.h>
++#include <configs/icnova/flash.h>
++#include <configs/icnova/net.h>
++#include <configs/icnova/usart1.h>
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova_oem.h u-boot-2009.11.new/include/configs/icnova_oem.h
+--- u-boot-2009.11/include/configs/icnova_oem.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova_oem.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,11 @@
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#include <configs/icnova/base.h>
++#include <configs/icnova/cpu140MHz.h>
++#include <configs/icnova/mmc.h>
++#include <configs/icnova/flash.h>
++#include <configs/icnova/net.h>
++#include <configs/icnova/usart0.h>
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova_oemplus.h u-boot-2009.11.new/include/configs/icnova_oemplus.h
+--- u-boot-2009.11/include/configs/icnova_oemplus.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova_oemplus.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,12 @@
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#include <configs/icnova/base.h>
++#include <configs/icnova/cpu140MHz.h>
++#include <configs/icnova/mmc.h>
++#include <configs/icnova/flash2x8.h>
++#include <configs/icnova/nand.h>
++#include <configs/icnova/net.h>
++#include <configs/icnova/usart0.h>
++
++#endif
+diff -Naur u-boot-2009.11/include/configs/icnova_old.h u-boot-2009.11.new/include/configs/icnova_old.h
+--- u-boot-2009.11/include/configs/icnova_old.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/include/configs/icnova_old.h 2010-10-08 12:09:30.000000000 +0200
+@@ -0,0 +1,11 @@
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#include <configs/icnova/base.h>
++#include <configs/icnova/cpu140MHz.h>
++#include <configs/icnova/flash.h>
++#include <configs/icnova/mmc.h>
++#include <configs/icnova/net.h>
++#include <configs/icnova/usart0.h>
++
++#endif
+diff -Naur u-boot-2009.11/include/mmc.h u-boot-2009.11.new/include/mmc.h
+--- u-boot-2009.11/include/mmc.h 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/include/mmc.h 2010-10-08 12:09:30.000000000 +0200
+@@ -272,6 +272,7 @@
+ int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
+ struct mmc *find_mmc_device(int dev_num);
+ void print_mmc_devices(char separator);
++int board_mmc_getcd(u8 *cd, struct mmc *mmc);
+
+ #ifndef CONFIG_GENERIC_MMC
+ int mmc_legacy_init(int verbose);
+diff -Naur u-boot-2009.11/lib_arm/board.c u-boot-2009.11.new/lib_arm/board.c
+--- u-boot-2009.11/lib_arm/board.c 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/lib_arm/board.c 2010-10-08 12:09:30.000000000 +0200
+@@ -356,8 +356,10 @@
+ serial_initialize();
+ #endif
+
++#ifdef CONFIG_CMD_NET
+ /* IP Address */
+ gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
++#endif
+
+ stdio_init (); /* get the devices list going. */
+
+diff -Naur u-boot-2009.11/Makefile u-boot-2009.11.new/Makefile
+--- u-boot-2009.11/Makefile 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/Makefile 2010-10-08 12:15:00.000000000 +0200
+@@ -3586,6 +3586,15 @@
+ mimc200_config : unconfig
+ @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 mimc at32ap700x
+
++ICNOVA_BOARDS = oem oemplus base old
++$(ICNOVA_BOARDS:%=icnova_%_config): unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap icnova in-circuit at32ap700x
++
++ICNOVA_ARM_BOARDS = arm9oem arm9oem_u4
++$(ICNOVA_ARM_BOARDS:%=icnova_%_config): unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs icnova in-circuit at91
++
++
+ #========================================================================
+ # SH3 (SuperH)
+ #========================================================================
+diff -Naur u-boot-2009.11/Makefile.orig u-boot-2009.11.new/Makefile.orig
+--- u-boot-2009.11/Makefile.orig 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11.new/Makefile.orig 2009-12-15 23:20:54.000000000 +0100
+@@ -0,0 +1,3775 @@
++#
++# (C) Copyright 2000-2009
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundatio; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++VERSION = 2009
++PATCHLEVEL = 11
++SUBLEVEL =
++EXTRAVERSION =
++ifneq "$(SUBLEVEL)" ""
++U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
++else
++U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL)$(EXTRAVERSION)
++endif
++TIMESTAMP_FILE = $(obj)include/timestamp_autogenerated.h
++VERSION_FILE = $(obj)include/version_autogenerated.h
++
++HOSTARCH := $(shell uname -m | \
++ sed -e s/i.86/i386/ \
++ -e s/sun4u/sparc64/ \
++ -e s/arm.*/arm/ \
++ -e s/sa110/arm/ \
++ -e s/powerpc/ppc/ \
++ -e s/ppc64/ppc/ \
++ -e s/macppc/ppc/)
++
++HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
++ sed -e 's/\(cygwin\).*/cygwin/')
++
++# Set shell to bash if possible, otherwise fall back to sh
++SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
++ else if [ -x /bin/bash ]; then echo /bin/bash; \
++ else echo sh; fi; fi)
++
++export HOSTARCH HOSTOS SHELL
++
++# Deal with colliding definitions from tcsh etc.
++VENDOR=
++
++#########################################################################
++# Allow for silent builds
++ifeq (,$(findstring s,$(MAKEFLAGS)))
++XECHO = echo
++else
++XECHO = :
++endif
++
++#########################################################################
++#
++# U-boot build supports producing a object files to the separate external
++# directory. Two use cases are supported:
++#
++# 1) Add O= to the make command line
++# 'make O=/tmp/build all'
++#
++# 2) Set environement variable BUILD_DIR to point to the desired location
++# 'export BUILD_DIR=/tmp/build'
++# 'make'
++#
++# The second approach can also be used with a MAKEALL script
++# 'export BUILD_DIR=/tmp/build'
++# './MAKEALL'
++#
++# Command line 'O=' setting overrides BUILD_DIR environent variable.
++#
++# When none of the above methods is used the local build is performed and
++# the object files are placed in the source directory.
++#
++
++ifdef O
++ifeq ("$(origin O)", "command line")
++BUILD_DIR := $(O)
++endif
++endif
++
++ifneq ($(BUILD_DIR),)
++saved-output := $(BUILD_DIR)
++
++# Attempt to create a output directory.
++$(shell [ -d ${BUILD_DIR} ] || mkdir -p ${BUILD_DIR})
++
++# Verify if it was successful.
++BUILD_DIR := $(shell cd $(BUILD_DIR) && /bin/pwd)
++$(if $(BUILD_DIR),,$(error output directory "$(saved-output)" does not exist))
++endif # ifneq ($(BUILD_DIR),)
++
++OBJTREE := $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
++SRCTREE := $(CURDIR)
++TOPDIR := $(SRCTREE)
++LNDIR := $(OBJTREE)
++export TOPDIR SRCTREE OBJTREE
++
++MKCONFIG := $(SRCTREE)/mkconfig
++export MKCONFIG
++
++ifneq ($(OBJTREE),$(SRCTREE))
++REMOTE_BUILD := 1
++export REMOTE_BUILD
++endif
++
++# $(obj) and (src) are defined in config.mk but here in main Makefile
++# we also need them before config.mk is included which is the case for
++# some targets like unconfig, clean, clobber, distclean, etc.
++ifneq ($(OBJTREE),$(SRCTREE))
++obj := $(OBJTREE)/
++src := $(SRCTREE)/
++else
++obj :=
++src :=
++endif
++export obj src
++
++# Make sure CDPATH settings don't interfere
++unexport CDPATH
++
++#########################################################################
++
++ifeq ($(ARCH),powerpc)
++ARCH = ppc
++endif
++
++# The "tools" are needed early, so put this first
++# Don't include stuff already done in $(LIBS)
++SUBDIRS = tools \
++ examples/standalone \
++ examples/api
++
++.PHONY : $(SUBDIRS)
++
++ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk))
++
++# Include autoconf.mk before config.mk so that the config options are available
++# to all top level build files. We need the dummy all: target to prevent the
++# dependency target in autoconf.mk.dep from being the default.
++all:
++sinclude $(obj)include/autoconf.mk.dep
++sinclude $(obj)include/autoconf.mk
++
++# load ARCH, BOARD, and CPU configuration
++include $(obj)include/config.mk
++export ARCH CPU BOARD VENDOR SOC
++
++# set default to nothing for native builds
++ifeq ($(HOSTARCH),$(ARCH))
++CROSS_COMPILE ?=
++endif
++
++# load other configuration
++include $(TOPDIR)/config.mk
++
++#########################################################################
++# U-Boot objects....order is important (i.e. start must be first)
++
++OBJS = cpu/$(CPU)/start.o
++ifeq ($(CPU),i386)
++OBJS += cpu/$(CPU)/start16.o
++OBJS += cpu/$(CPU)/resetvec.o
++endif
++ifeq ($(CPU),ppc4xx)
++OBJS += cpu/$(CPU)/resetvec.o
++endif
++ifeq ($(CPU),mpc85xx)
++OBJS += cpu/$(CPU)/resetvec.o
++endif
++
++OBJS := $(addprefix $(obj),$(OBJS))
++
++LIBS = lib_generic/libgeneric.a
++LIBS += lib_generic/lzma/liblzma.a
++LIBS += lib_generic/lzo/liblzo.a
++LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
++ "board/$(VENDOR)/common/lib$(VENDOR).a"; fi)
++LIBS += cpu/$(CPU)/lib$(CPU).a
++ifdef SOC
++LIBS += cpu/$(CPU)/$(SOC)/lib$(SOC).a
++endif
++ifeq ($(CPU),ixp)
++LIBS += cpu/ixp/npe/libnpe.a
++endif
++LIBS += lib_$(ARCH)/lib$(ARCH).a
++LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \
++ fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/libyaffs2.a \
++ fs/ubifs/libubifs.a
++LIBS += net/libnet.a
++LIBS += disk/libdisk.a
++LIBS += drivers/bios_emulator/libatibiosemu.a
++LIBS += drivers/block/libblock.a
++LIBS += drivers/dma/libdma.a
++LIBS += drivers/fpga/libfpga.a
++LIBS += drivers/gpio/libgpio.a
++LIBS += drivers/hwmon/libhwmon.a
++LIBS += drivers/i2c/libi2c.a
++LIBS += drivers/input/libinput.a
++LIBS += drivers/misc/libmisc.a
++LIBS += drivers/mmc/libmmc.a
++LIBS += drivers/mtd/libmtd.a
++LIBS += drivers/mtd/nand/libnand.a
++LIBS += drivers/mtd/onenand/libonenand.a
++LIBS += drivers/mtd/ubi/libubi.a
++LIBS += drivers/mtd/spi/libspi_flash.a
++LIBS += drivers/net/libnet.a
++LIBS += drivers/net/phy/libphy.a
++LIBS += drivers/net/sk98lin/libsk98lin.a
++LIBS += drivers/pci/libpci.a
++LIBS += drivers/pcmcia/libpcmcia.a
++LIBS += drivers/power/libpower.a
++LIBS += drivers/spi/libspi.a
++ifeq ($(CPU),mpc83xx)
++LIBS += drivers/qe/qe.a
++endif
++ifeq ($(CPU),mpc85xx)
++LIBS += drivers/qe/qe.a
++LIBS += cpu/mpc8xxx/ddr/libddr.a
++LIBS += cpu/mpc8xxx/lib8xxx.a
++TAG_SUBDIRS += cpu/mpc8xxx
++endif
++ifeq ($(CPU),mpc86xx)
++LIBS += cpu/mpc8xxx/ddr/libddr.a
++LIBS += cpu/mpc8xxx/lib8xxx.a
++TAG_SUBDIRS += cpu/mpc8xxx
++endif
++LIBS += drivers/rtc/librtc.a
++LIBS += drivers/serial/libserial.a
++LIBS += drivers/twserial/libtws.a
++LIBS += drivers/usb/gadget/libusb_gadget.a
++LIBS += drivers/usb/host/libusb_host.a
++LIBS += drivers/usb/musb/libusb_musb.a
++LIBS += drivers/video/libvideo.a
++LIBS += drivers/watchdog/libwatchdog.a
++LIBS += common/libcommon.a
++LIBS += libfdt/libfdt.a
++LIBS += api/libapi.a
++LIBS += post/libpost.a
++
++LIBS := $(addprefix $(obj),$(LIBS))
++.PHONY : $(LIBS) $(TIMESTAMP_FILE) $(VERSION_FILE)
++
++LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).a
++LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
++
++# Add GCC lib
++ifdef USE_PRIVATE_LIBGCC
++ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
++PLATFORM_LIBGCC = -L $(OBJTREE)/lib_$(ARCH) -lgcc
++else
++PLATFORM_LIBGCC = -L $(USE_PRIVATE_LIBGCC) -lgcc
++endif
++else
++PLATFORM_LIBGCC = -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
++endif
++PLATFORM_LIBS += $(PLATFORM_LIBGCC)
++export PLATFORM_LIBS
++
++# Special flags for CPP when processing the linker script.
++# Pass the version down so we can handle backwards compatibility
++# on the fly.
++LDPPFLAGS += \
++ -include $(TOPDIR)/include/u-boot/u-boot.lds.h \
++ $(shell $(LD) --version | \
++ sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
++
++ifeq ($(CONFIG_NAND_U_BOOT),y)
++NAND_SPL = nand_spl
++U_BOOT_NAND = $(obj)u-boot-nand.bin
++endif
++
++ifeq ($(CONFIG_ONENAND_U_BOOT),y)
++ONENAND_IPL = onenand_ipl
++U_BOOT_ONENAND = $(obj)u-boot-onenand.bin
++ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
++endif
++
++__OBJS := $(subst $(obj),,$(OBJS))
++__LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
++
++#########################################################################
++#########################################################################
++
++# Always append ALL so that arch config.mk's can add custom ones
++ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND)
++
++all: $(ALL)
++
++$(obj)u-boot.hex: $(obj)u-boot
++ $(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@
++
++$(obj)u-boot.srec: $(obj)u-boot
++ $(OBJCOPY) -O srec $< $@
++
++$(obj)u-boot.bin: $(obj)u-boot
++ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
++
++$(obj)u-boot.ldr: $(obj)u-boot
++ $(obj)tools/envcrc --binary > $(obj)env-ldr.o
++ $(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS)
++
++$(obj)u-boot.ldr.hex: $(obj)u-boot.ldr
++ $(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@ -I binary
++
++$(obj)u-boot.ldr.srec: $(obj)u-boot.ldr
++ $(OBJCOPY) ${OBJCFLAGS} -O srec $< $@ -I binary
++
++$(obj)u-boot.img: $(obj)u-boot.bin
++ ./tools/mkimage -A $(ARCH) -T firmware -C none \
++ -a $(TEXT_BASE) -e 0 \
++ -n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
++ sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
++ -d $< $@
++
++$(obj)u-boot.kwb: $(obj)u-boot.bin
++ $(obj)tools/mkimage -n $(KWD_CONFIG) -T kwbimage \
++ -a $(TEXT_BASE) -e $(TEXT_BASE) -d $< $@
++
++$(obj)u-boot.sha1: $(obj)u-boot.bin
++ $(obj)tools/ubsha1 $(obj)u-boot.bin
++
++$(obj)u-boot.dis: $(obj)u-boot
++ $(OBJDUMP) -d $< > $@
++
++GEN_UBOOT = \
++ UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
++ sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
++ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
++ --start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
++ -Map u-boot.map -o u-boot
++$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) $(obj)u-boot.lds
++ $(GEN_UBOOT)
++ifeq ($(CONFIG_KALLSYMS),y)
++ smap=`$(call SYSTEM_MAP,u-boot) | \
++ awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\\\000"}'` ; \
++ $(CC) $(CFLAGS) -DSYSTEM_MAP="\"$${smap}\"" \
++ -c common/system_map.c -o $(obj)common/system_map.o
++ $(GEN_UBOOT) $(obj)common/system_map.o
++endif
++
++$(OBJS): depend
++ $(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@))
++
++$(LIBS): depend $(SUBDIRS)
++ $(MAKE) -C $(dir $(subst $(obj),,$@))
++
++$(LIBBOARD): depend $(LIBS)
++ $(MAKE) -C $(dir $(subst $(obj),,$@))
++
++$(SUBDIRS): depend
++ $(MAKE) -C $@ all
++
++$(LDSCRIPT): depend
++ $(MAKE) -C $(dir $@) $(notdir $@)
++
++$(obj)u-boot.lds: $(LDSCRIPT)
++ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
++
++$(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
++ $(MAKE) -C nand_spl/board/$(BOARDDIR) all
++
++$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin
++ cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
++
++$(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
++ $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
++
++$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin
++ cat $(ONENAND_BIN) $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
++
++$(VERSION_FILE):
++ @( printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' "$(U_BOOT_VERSION)" \
++ '$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ) > $@.tmp
++ @cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
++
++$(TIMESTAMP_FILE):
++ @date +'#define U_BOOT_DATE "%b %d %C%y"' > $@
++ @date +'#define U_BOOT_TIME "%T"' >> $@
++
++gdbtools:
++ $(MAKE) -C tools/gdb all || exit 1
++
++updater:
++ $(MAKE) -C tools/updater all || exit 1
++
++env:
++ $(MAKE) -C tools/env all MTD_VERSION=${MTD_VERSION} || exit 1
++
++depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
++ for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done
++
++TAG_SUBDIRS += include
++TAG_SUBDIRS += lib_generic board/$(BOARDDIR)
++TAG_SUBDIRS += cpu/$(CPU)
++TAG_SUBDIRS += lib_$(ARCH)
++TAG_SUBDIRS += fs/cramfs
++TAG_SUBDIRS += fs/fat
++TAG_SUBDIRS += fs/fdos
++TAG_SUBDIRS += fs/jffs2
++TAG_SUBDIRS += fs/yaffs2
++TAG_SUBDIRS += net
++TAG_SUBDIRS += disk
++TAG_SUBDIRS += common
++TAG_SUBDIRS += drivers/bios_emulator
++TAG_SUBDIRS += drivers/block
++TAG_SUBDIRS += drivers/gpio
++TAG_SUBDIRS += drivers/hwmon
++TAG_SUBDIRS += drivers/i2c
++TAG_SUBDIRS += drivers/input
++TAG_SUBDIRS += drivers/misc
++TAG_SUBDIRS += drivers/mmc
++TAG_SUBDIRS += drivers/mtd
++TAG_SUBDIRS += drivers/mtd/nand
++TAG_SUBDIRS += drivers/mtd/onenand
++TAG_SUBDIRS += drivers/mtd/spi
++TAG_SUBDIRS += drivers/net
++TAG_SUBDIRS += drivers/net/sk98lin
++TAG_SUBDIRS += drivers/pci
++TAG_SUBDIRS += drivers/pcmcia
++TAG_SUBDIRS += drivers/qe
++TAG_SUBDIRS += drivers/rtc
++TAG_SUBDIRS += drivers/serial
++TAG_SUBDIRS += drivers/spi
++TAG_SUBDIRS += drivers/usb
++TAG_SUBDIRS += drivers/video
++
++tags ctags:
++ ctags -w -o $(obj)ctags `find $(SUBDIRS) $(TAG_SUBDIRS) \
++ -name '*.[ch]' -print`
++
++etags:
++ etags -a -o $(obj)etags `find $(SUBDIRS) $(TAG_SUBDIRS) \
++ -name '*.[ch]' -print`
++cscope:
++ find $(SUBDIRS) $(TAG_SUBDIRS) -name '*.[ch]' -print \
++ > cscope.files
++ cscope -b -q -k
++
++SYSTEM_MAP = \
++ $(NM) $1 | \
++ grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
++ LC_ALL=C sort
++$(obj)System.map: $(obj)u-boot
++ @$(call SYSTEM_MAP,$<) > $(obj)System.map
++
++#
++# Auto-generate the autoconf.mk file (which is included by all makefiles)
++#
++# This target actually generates 2 files; autoconf.mk and autoconf.mk.dep.
++# the dep file is only include in this top level makefile to determine when
++# to regenerate the autoconf.mk file.
++$(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
++ @$(XECHO) Generating $@ ; \
++ set -e ; \
++ : Generate the dependancies ; \
++ $(CC) -x c -DDO_DEPS_ONLY -M $(HOSTCFLAGS) $(CPPFLAGS) \
++ -MQ $(obj)include/autoconf.mk include/common.h > $@
++
++$(obj)include/autoconf.mk: $(obj)include/config.h
++ @$(XECHO) Generating $@ ; \
++ set -e ; \
++ : Extract the config macros ; \
++ $(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h | \
++ sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
++ mv $@.tmp $@
++
++#########################################################################
++else # !config.mk
++all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
++$(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \
++$(SUBDIRS) $(TIMESTAMP_FILE) $(VERSION_FILE) gdbtools updater env depend \
++dep tags ctags etags cscope $(obj)System.map:
++ @echo "System not configured - see README" >&2
++ @ exit 1
++endif # config.mk
++
++.PHONY : CHANGELOG
++CHANGELOG:
++ git log --no-merges U-Boot-1_1_5.. | \
++ unexpand -a | sed -e 's/\s\s*$$//' > $@
++
++include/license.h: tools/bin2header COPYING
++ cat COPYING | gzip -9 -c | ./tools/bin2header license_gzip > include/license.h
++#########################################################################
++
++unconfig:
++ @rm -f $(obj)include/config.h $(obj)include/config.mk \
++ $(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
++ $(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep
++
++%: %_config
++ $(MAKE)
++
++#========================================================================
++# PowerPC
++#========================================================================
++
++#########################################################################
++## MPC5xx Systems
++#########################################################################
++
++canmb_config: unconfig
++ @$(MKCONFIG) -a canmb ppc mpc5xxx canmb
++
++cmi_mpc5xx_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc5xx cmi
++
++PATI_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc5xx pati mpl
++
++#########################################################################
++## MPC5xxx Systems
++#########################################################################
++
++aev_config: unconfig
++ @$(MKCONFIG) -a aev ppc mpc5xxx tqm5200 tqc
++
++BC3450_config: unconfig
++ @$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450
++
++cm5200_config: unconfig
++ @$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
++
++cpci5200_config: unconfig
++ @$(MKCONFIG) -a cpci5200 ppc mpc5xxx cpci5200 esd
++
++digsy_mtc_config \
++digsy_mtc_LOWBOOT_config \
++digsy_mtc_RAMBOOT_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/digsy_mtc
++ @ >$(obj)include/config.h
++ @[ -z "$(findstring LOWBOOT_,$@)" ] || \
++ { echo "TEXT_BASE = 0xFF000000" >$(obj)board/digsy_mtc/config.tmp ; \
++ echo "... with LOWBOOT configuration" ; \
++ }
++ @[ -z "$(findstring RAMBOOT_,$@)" ] || \
++ { echo "TEXT_BASE = 0x00100000" >$(obj)board/digsy_mtc/config.tmp ; \
++ echo "... with RAMBOOT configuration" ; \
++ }
++ @$(MKCONFIG) -a digsy_mtc ppc mpc5xxx digsy_mtc
++
++galaxy5200_LOWBOOT_config \
++galaxy5200_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a galaxy5200 ppc mpc5xxx galaxy5200
++
++hmi1001_config: unconfig
++ @$(MKCONFIG) hmi1001 ppc mpc5xxx hmi1001
++
++Lite5200_config \
++Lite5200_LOWBOOT_config \
++Lite5200_LOWBOOT08_config \
++icecube_5200_config \
++icecube_5200_LOWBOOT_config \
++icecube_5200_LOWBOOT08_config \
++icecube_5200_DDR_config \
++icecube_5200_DDR_LOWBOOT_config \
++icecube_5200_DDR_LOWBOOT08_config \
++icecube_5100_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/icecube
++ @[ -z "$(findstring LOWBOOT_,$@)" ] || \
++ { if [ "$(findstring DDR,$@)" ] ; \
++ then echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp ; \
++ else echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \
++ fi ; \
++ $(XECHO) "... with LOWBOOT configuration" ; \
++ }
++ @[ -z "$(findstring LOWBOOT08,$@)" ] || \
++ { echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp ; \
++ echo "... with 8 MB flash only" ; \
++ $(XECHO) "... with LOWBOOT configuration" ; \
++ }
++ @[ -z "$(findstring DDR,$@)" ] || \
++ { echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h ; \
++ $(XECHO) "... DDR memory revision" ; \
++ }
++ @[ -z "$(findstring 5200,$@)" ] || \
++ { echo "#define CONFIG_MPC5200" >>$(obj)include/config.h ; \
++ $(XECHO) "... with MPC5200 processor" ; \
++ }
++ @[ -z "$(findstring 5100,$@)" ] || \
++ { echo "#define CONFIG_MGT5100" >>$(obj)include/config.h ; \
++ $(XECHO) "... with MGT5100 processor" ; \
++ }
++ @$(MKCONFIG) -a IceCube ppc mpc5xxx icecube
++
++jupiter_config: unconfig
++ @$(MKCONFIG) jupiter ppc mpc5xxx jupiter
++
++inka4x0_config: unconfig
++ @$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
++
++lite5200b_config \
++lite5200b_PM_config \
++lite5200b_LOWBOOT_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/icecube
++ @ echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h
++ @ $(XECHO) "... DDR memory revision"
++ @ echo "#define CONFIG_MPC5200" >>$(obj)include/config.h
++ @ echo "#define CONFIG_LITE5200B" >>$(obj)include/config.h
++ @[ -z "$(findstring _PM_,$@)" ] || \
++ { echo "#define CONFIG_LITE5200B_PM" >>$(obj)include/config.h ; \
++ $(XECHO) "... with power management (low-power mode) support" ; \
++ }
++ @[ -z "$(findstring LOWBOOT_,$@)" ] || \
++ { echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \
++ $(XECHO) "... with LOWBOOT configuration" ; \
++ }
++ @ $(XECHO) "... with MPC5200B processor"
++ @$(MKCONFIG) -a IceCube ppc mpc5xxx icecube
++
++mcc200_config \
++mcc200_SDRAM_config \
++mcc200_highboot_config \
++mcc200_COM12_config \
++mcc200_COM12_SDRAM_config \
++mcc200_COM12_highboot_config \
++mcc200_COM12_highboot_SDRAM_config \
++mcc200_highboot_SDRAM_config \
++prs200_config \
++prs200_DDR_config \
++prs200_highboot_config \
++prs200_highboot_DDR_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/mcc200
++ @[ -n "$(findstring highboot,$@)" ] || \
++ { $(XECHO) "... with lowboot configuration" ; \
++ }
++ @[ -z "$(findstring highboot,$@)" ] || \
++ { echo "TEXT_BASE = 0xFFF00000" >$(obj)board/mcc200/config.tmp ; \
++ $(XECHO) "... with highboot configuration" ; \
++ }
++ @[ -n "$(findstring _SDRAM,$@)" ] || \
++ { if [ -n "$(findstring mcc200,$@)" ]; \
++ then \
++ $(XECHO) "... with DDR" ; \
++ else \
++ if [ -n "$(findstring _DDR,$@)" ];\
++ then \
++ $(XECHO) "... with DDR" ; \
++ else \
++ echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h ;\
++ $(XECHO) "... with SDRAM" ; \
++ fi; \
++ fi; \
++ }
++ @[ -z "$(findstring _SDRAM,$@)" ] || \
++ { echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h ; \
++ $(XECHO) "... with SDRAM" ; \
++ }
++ @[ -z "$(findstring COM12,$@)" ] || \
++ { echo "#define CONFIG_CONSOLE_COM12" >>$(obj)include/config.h ; \
++ $(XECHO) "... with console on COM12" ; \
++ }
++ @[ -z "$(findstring prs200,$@)" ] || \
++ { echo "#define CONFIG_PRS200" >>$(obj)include/config.h ;\
++ }
++ @$(MKCONFIG) -n $@ -a mcc200 ppc mpc5xxx mcc200
++
++mecp5200_config: unconfig
++ @$(MKCONFIG) mecp5200 ppc mpc5xxx mecp5200 esd
++
++motionpro_config: unconfig
++ @$(MKCONFIG) motionpro ppc mpc5xxx motionpro
++
++mucmc52_config: unconfig
++ @$(MKCONFIG) mucmc52 ppc mpc5xxx mucmc52
++
++munices_config: unconfig
++ @$(MKCONFIG) munices ppc mpc5xxx munices
++
++MVBC_P_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/mvbc_p
++ @ >$(obj)include/config.h
++ @[ -z "$(findstring MVBC_P,$@)" ] || \
++ { echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h; }
++ @$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
++
++o2dnt_config: unconfig
++ @$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
++
++pcm030_config \
++pcm030_LOWBOOT_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/phytec/pcm030
++ @ >$(obj)include/config.h
++ @[ -z "$(findstring LOWBOOT_,$@)" ] || \
++ { echo "TEXT_BASE = 0xFF000000" >$(obj)board/phytec/pcm030/config.tmp ; \
++ echo "... with LOWBOOT configuration" ; \
++ }
++ @$(MKCONFIG) -a pcm030 ppc mpc5xxx pcm030 phytec
++
++pf5200_config: unconfig
++ @$(MKCONFIG) pf5200 ppc mpc5xxx pf5200 esd
++
++PM520_config \
++PM520_DDR_config \
++PM520_ROMBOOT_config \
++PM520_ROMBOOT_DDR_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring DDR,$@)" ] || \
++ { echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h ; \
++ $(XECHO) "... DDR memory revision" ; \
++ }
++ @[ -z "$(findstring ROMBOOT,$@)" ] || \
++ { echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
++ $(XECHO) "... booting from 8-bit flash" ; \
++ }
++ @$(MKCONFIG) -a PM520 ppc mpc5xxx pm520
++
++smmaco4_config: unconfig
++ @$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200 tqc
++
++spieval_config: unconfig
++ @$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200 tqc
++
++TB5200_B_config \
++TB5200_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _B,$@)" ] || \
++ { echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
++ $(XECHO) "... with MPC5200B processor" ; \
++ }
++ @$(MKCONFIG) -n $@ -a TB5200 ppc mpc5xxx tqm5200 tqc
++
++MINI5200_config \
++EVAL5200_config \
++TOP5200_config: unconfig
++ @mkdir -p $(obj)include
++ @ echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a TOP5200 ppc mpc5xxx top5200 emk
++
++Total5100_config \
++Total5200_config \
++Total5200_lowboot_config \
++Total5200_Rev2_config \
++Total5200_Rev2_lowboot_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/total5200
++ @[ -z "$(findstring 5100,$@)" ] || \
++ { echo "#define CONFIG_MGT5100" >>$(obj)include/config.h ; \
++ $(XECHO) "... with MGT5100 processor" ; \
++ }
++ @[ -z "$(findstring 5200,$@)" ] || \
++ { echo "#define CONFIG_MPC5200" >>$(obj)include/config.h ; \
++ $(XECHO) "... with MPC5200 processor" ; \
++ }
++ @[ -n "$(findstring Rev,$@)" ] || \
++ { echo "#define CONFIG_TOTAL5200_REV 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... revision 1 board" ; \
++ }
++ @[ -z "$(findstring Rev2_,$@)" ] || \
++ { echo "#define CONFIG_TOTAL5200_REV 2" >>$(obj)include/config.h ; \
++ $(XECHO) "... revision 2 board" ; \
++ }
++ @[ -z "$(findstring lowboot_,$@)" ] || \
++ { echo "TEXT_BASE = 0xFE000000" >$(obj)board/total5200/config.tmp ; \
++ $(XECHO) "... with lowboot configuration" ; \
++ }
++ @$(MKCONFIG) -a Total5200 ppc mpc5xxx total5200
++
++cam5200_config \
++cam5200_niosflash_config \
++fo300_config \
++MiniFAP_config \
++TQM5200S_config \
++TQM5200S_HIGHBOOT_config \
++TQM5200_B_config \
++TQM5200_B_HIGHBOOT_config \
++TQM5200_config \
++TQM5200_STK100_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/tqc/tqm5200
++ @[ -z "$(findstring cam5200,$@)" ] || \
++ { echo "#define CONFIG_CAM5200" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
++ $(XECHO) "... TQM5200S on Cam5200" ; \
++ }
++ @[ -z "$(findstring niosflash,$@)" ] || \
++ { echo "#define CONFIG_CAM5200_NIOSFLASH" >>$(obj)include/config.h ; \
++ $(XECHO) "... with NIOS flash driver" ; \
++ }
++ @[ -z "$(findstring fo300,$@)" ] || \
++ { echo "#define CONFIG_FO300" >>$(obj)include/config.h ; \
++ $(XECHO) "... TQM5200 on FO300" ; \
++ }
++ @[ -z "$(findstring MiniFAP,$@)" ] || \
++ { echo "#define CONFIG_MINIFAP" >>$(obj)include/config.h ; \
++ $(XECHO) "... TQM5200_AC on MiniFAP" ; \
++ }
++ @[ -z "$(findstring STK100,$@)" ] || \
++ { echo "#define CONFIG_STK52XX_REV100" >>$(obj)include/config.h ; \
++ $(XECHO) "... on a STK52XX.100 base board" ; \
++ }
++ @[ -z "$(findstring TQM5200_B,$@)" ] || \
++ { echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring TQM5200S,$@)" ] || \
++ { echo "#define CONFIG_TQM5200S" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring HIGHBOOT,$@)" ] || \
++ { echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
++ }
++ @$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200 tqc
++
++uc101_config: unconfig
++ @$(MKCONFIG) uc101 ppc mpc5xxx uc101
++
++v38b_config: unconfig
++ @$(MKCONFIG) -a v38b ppc mpc5xxx v38b
++
++#########################################################################
++## MPC512x Systems
++#########################################################################
++
++aria_config: unconfig
++ @$(MKCONFIG) -a aria ppc mpc512x aria davedenx
++
++mecp5123_config: unconfig
++ @$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd
++
++mpc5121ads_config \
++mpc5121ads_rev2_config \
++ : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring rev2,$@)" ] ; then \
++ echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
++ fi
++ @$(MKCONFIG) -a mpc5121ads ppc mpc512x mpc5121ads freescale
++
++#########################################################################
++## MPC8xx Systems
++#########################################################################
++
++Adder_config \
++Adder87x_config \
++AdderII_config \
++ : unconfig
++ @mkdir -p $(obj)include
++ $(if $(findstring AdderII,$@), \
++ @echo "#define CONFIG_MPC852T" > $(obj)include/config.h)
++ @$(MKCONFIG) -a Adder ppc mpc8xx adder
++
++AdderUSB_config: unconfig
++ @$(MKCONFIG) -a AdderUSB ppc mpc8xx adder
++
++ADS860_config \
++FADS823_config \
++FADS850SAR_config \
++MPC86xADS_config \
++MPC885ADS_config \
++FADS860T_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx fads
++
++AMX860_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx amx860 westel
++
++c2mon_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx c2mon
++
++CCM_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx CCM siemens
++
++cogent_mpc8xx_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx cogent
++
++ELPT860_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx elpt860 LEOX
++
++EP88x_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx ep88x
++
++ESTEEM192E_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx esteem192e
++
++ETX094_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx etx094
++
++FLAGADM_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx flagadm
++
++xtract_GEN860T = $(subst _SC,,$(subst _config,,$1))
++
++GEN860T_SC_config \
++GEN860T_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _SC,$@)" ] || \
++ { echo "#define CONFIG_SC" >>$(obj)include/config.h ; \
++ $(XECHO) "With reduced H/W feature set (SC)..." ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_GEN860T,$@) ppc mpc8xx gen860t
++
++GENIETV_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx genietv
++
++GTH_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx gth
++
++hermes_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx hermes
++
++HMI10_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc
++
++IAD210_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx IAD210 siemens
++
++xtract_ICU862 = $(subst _100MHz,,$(subst _config,,$1))
++
++ICU862_100MHz_config \
++ICU862_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _100MHz,$@)" ] || \
++ { echo "#define CONFIG_100MHz" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 100MHz system clock" ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_ICU862,$@) ppc mpc8xx icu862
++
++IP860_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx ip860
++
++IVML24_256_config \
++IVML24_128_config \
++IVML24_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring IVML24_config,$@)" ] || \
++ { echo "#define CONFIG_IVML24_16M" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring IVML24_128_config,$@)" ] || \
++ { echo "#define CONFIG_IVML24_32M" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring IVML24_256_config,$@)" ] || \
++ { echo "#define CONFIG_IVML24_64M" >>$(obj)include/config.h ; \
++ }
++ @$(MKCONFIG) -a IVML24 ppc mpc8xx ivm
++
++IVMS8_256_config \
++IVMS8_128_config \
++IVMS8_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring IVMS8_config,$@)" ] || \
++ { echo "#define CONFIG_IVMS8_16M" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring IVMS8_128_config,$@)" ] || \
++ { echo "#define CONFIG_IVMS8_32M" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring IVMS8_256_config,$@)" ] || \
++ { echo "#define CONFIG_IVMS8_64M" >>$(obj)include/config.h ; \
++ }
++ @$(MKCONFIG) -a IVMS8 ppc mpc8xx ivm
++
++kmsupx4_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx km8xx keymile
++
++KUP4K_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx kup4k kup
++
++KUP4X_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx kup4x kup
++
++LANTEC_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx lantec
++
++lwmon_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx lwmon
++
++MBX_config \
++MBX860T_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx mbx8xx
++
++mgsuvd_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx km8xx keymile
++
++MHPC_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx mhpc eltec
++
++xtract_NETVIA = $(subst _V2,,$(subst _config,,$1))
++
++NETVIA_V2_config \
++NETVIA_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring NETVIA_config,$@)" ] || \
++ { echo "#define CONFIG_NETVIA_VERSION 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... Version 1" ; \
++ }
++ @[ -z "$(findstring NETVIA_V2_config,$@)" ] || \
++ { echo "#define CONFIG_NETVIA_VERSION 2" >>$(obj)include/config.h ; \
++ $(XECHO) "... Version 2" ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_NETVIA,$@) ppc mpc8xx netvia
++
++xtract_NETPHONE = $(subst _V2,,$(subst _config,,$1))
++
++NETPHONE_V2_config \
++NETPHONE_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring NETPHONE_config,$@)" ] || \
++ { echo "#define CONFIG_NETPHONE_VERSION 1" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \
++ { echo "#define CONFIG_NETPHONE_VERSION 2" >>$(obj)include/config.h ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_NETPHONE,$@) ppc mpc8xx netphone
++
++xtract_NETTA = $(subst _SWAPHOOK,,$(subst _6412,,$(subst _ISDN,,$(subst _config,,$1))))
++
++NETTA_ISDN_6412_SWAPHOOK_config \
++NETTA_ISDN_SWAPHOOK_config \
++NETTA_6412_SWAPHOOK_config \
++NETTA_SWAPHOOK_config \
++NETTA_ISDN_6412_config \
++NETTA_ISDN_config \
++NETTA_6412_config \
++NETTA_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring ISDN_,$@)" ] || \
++ { echo "#define CONFIG_NETTA_ISDN 1" >>$(obj)include/config.h ; \
++ }
++ @[ -n "$(findstring ISDN_,$@)" ] || \
++ { echo "#undef CONFIG_NETTA_ISDN" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring 6412_,$@)" ] || \
++ { echo "#define CONFIG_NETTA_6412 1" >>$(obj)include/config.h ; \
++ }
++ @[ -n "$(findstring 6412_,$@)" ] || \
++ { echo "#undef CONFIG_NETTA_6412" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring SWAPHOOK_,$@)" ] || \
++ { echo "#define CONFIG_NETTA_SWAPHOOK 1" >>$(obj)include/config.h ; \
++ }
++ @[ -n "$(findstring SWAPHOOK_,$@)" ] || \
++ { echo "#undef CONFIG_NETTA_SWAPHOOK" >>$(obj)include/config.h ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_NETTA,$@) ppc mpc8xx netta
++
++xtract_NETTA2 = $(subst _V2,,$(subst _config,,$1))
++
++NETTA2_V2_config \
++NETTA2_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring NETTA2_config,$@)" ] || \
++ { echo "#define CONFIG_NETTA2_VERSION 1" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring NETTA2_V2_config,$@)" ] || \
++ { echo "#define CONFIG_NETTA2_VERSION 2" >>$(obj)include/config.h ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_NETTA2,$@) ppc mpc8xx netta2
++
++NC650_Rev1_config \
++NC650_Rev2_config \
++CP850_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring CP850,$@)" ] || \
++ { echo "#define CONFIG_CP850 1" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring Rev1,$@)" ] || \
++ { echo "#define CONFIG_IDS852_REV1 1" >>$(obj)include/config.h ; \
++ }
++ @[ -z "$(findstring Rev2,$@)" ] || \
++ { echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
++ }
++ @$(MKCONFIG) -a NC650 ppc mpc8xx nc650
++
++NX823_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx nx823
++
++pcu_e_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx pcu_e siemens
++
++QS850_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx qs850 snmc
++
++QS823_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx qs850 snmc
++
++QS860T_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx qs860t snmc
++
++quantum_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx quantum
++
++R360MPI_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx r360mpi
++
++RBC823_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx rbc823
++
++RPXClassic_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx RPXClassic
++
++RPXlite_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx RPXlite
++
++RPXlite_DW_64_config \
++RPXlite_DW_LCD_config \
++RPXlite_DW_64_LCD_config \
++RPXlite_DW_NVRAM_config \
++RPXlite_DW_NVRAM_64_config \
++RPXlite_DW_NVRAM_LCD_config \
++RPXlite_DW_NVRAM_64_LCD_config \
++RPXlite_DW_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _64,$@)" ] || \
++ { echo "#define RPXlite_64MHz" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 64MHz system clock ..."; \
++ }
++ @[ -z "$(findstring _LCD,$@)" ] || \
++ { echo "#define CONFIG_LCD" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
++ $(XECHO) "... with LCD display ..."; \
++ }
++ @[ -z "$(findstring _NVRAM,$@)" ] || \
++ { echo "#define CONFIG_ENV_IS_IN_NVRAM" >>$(obj)include/config.h ; \
++ $(XECHO) "... with ENV in NVRAM ..."; \
++ }
++ @$(MKCONFIG) -a RPXlite_DW ppc mpc8xx RPXlite_dw
++
++rmu_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx rmu
++
++RRvision_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx RRvision
++
++RRvision_LCD_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_LCD" >$(obj)include/config.h
++ @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
++ @$(MKCONFIG) -a RRvision ppc mpc8xx RRvision
++
++SM850_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc
++
++spc1920_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx spc1920
++
++SPD823TS_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx spd8xx
++
++stxxtc_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx stxxtc stx
++
++svm_sc8xx_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx svm_sc8xx
++
++SXNI855T_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx sixnet
++
++# EMK MPC8xx based modules
++TOP860_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx top860 emk
++
++# Play some tricks for configuration selection
++# Only 855 and 860 boards may come with FEC
++# and only 823 boards may have LCD support
++xtract_8xx = $(subst _LCD,,$(subst _config,,$1))
++
++FPS850L_config \
++FPS860L_config \
++NSCU_config \
++TQM823L_config \
++TQM823L_LCD_config \
++TQM850L_config \
++TQM855L_config \
++TQM860L_config \
++TQM862L_config \
++TQM823M_config \
++TQM850M_config \
++TQM855M_config \
++TQM860M_config \
++TQM862M_config \
++TQM866M_config \
++TQM885D_config \
++TK885D_config \
++virtlab2_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _LCD,$@)" ] || \
++ { echo "#define CONFIG_LCD" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \
++ $(XECHO) "... with LCD display" ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_8xx,$@) ppc mpc8xx tqm8xx tqc
++
++TTTech_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_LCD" >$(obj)include/config.h
++ @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
++ @$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc
++
++uc100_config : unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx uc100
++
++v37_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_LCD" >$(obj)include/config.h
++ @echo "#define CONFIG_SHARP_LQ084V1DG21" >>$(obj)include/config.h
++ @$(MKCONFIG) $(@:_config=) ppc mpc8xx v37
++
++wtk_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_LCD" >$(obj)include/config.h
++ @echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h
++ @$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc
++
++#########################################################################
++## PPC4xx Systems
++#########################################################################
++xtract_4xx = $(subst _25,,$(subst _33,,$(subst _BA,,$(subst _ME,,$(subst _HI,,$(subst _config,,$1))))))
++
++acadia_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx acadia amcc
++
++acadia_nand_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/amcc/acadia
++ @mkdir -p $(obj)nand_spl/board/amcc/acadia
++ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a acadia ppc ppc4xx acadia amcc
++ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/acadia/config.tmp
++ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
++
++ADCIOP_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx adciop esd
++
++alpr_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx alpr prodrive
++
++AP1000_config:unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx ap1000 amirix
++
++APC405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx apc405 esd
++
++AR405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx ar405 esd
++
++ASH405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx ash405 esd
++
++bamboo_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx bamboo amcc
++
++bamboo_nand_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/amcc/bamboo
++ @mkdir -p $(obj)nand_spl/board/amcc/bamboo
++ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a bamboo ppc ppc4xx bamboo amcc
++ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/bamboo/config.tmp
++ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
++
++bubinga_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx bubinga amcc
++
++CANBT_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx canbt esd
++
++# Arches, Canyonlands & Glacier use different U-Boot images
++arches_config \
++canyonlands_config \
++glacier_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
++ tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a canyonlands ppc ppc4xx canyonlands amcc
++
++canyonlands_nand_config \
++glacier_nand_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/amcc/canyonlands
++ @mkdir -p $(obj)nand_spl/board/amcc/canyonlands
++ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
++ @echo "#define CONFIG_$$(echo $(subst ,,$(@:_nand_config=)) | \
++ tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a canyonlands ppc ppc4xx canyonlands amcc
++ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/canyonlands/config.tmp
++ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
++
++CATcenter_config \
++CATcenter_25_config \
++CATcenter_33_config: unconfig
++ @mkdir -p $(obj)include
++ @ echo "/* CATcenter uses PPChameleon Model ME */" > $(obj)include/config.h
++ @ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >> $(obj)include/config.h
++ @[ -z "$(findstring _25,$@)" ] || \
++ { echo "#define CONFIG_PPCHAMELEON_CLK_25" >> $(obj)include/config.h ; \
++ $(XECHO) "SysClk = 25MHz" ; \
++ }
++ @[ -z "$(findstring _33,$@)" ] || \
++ { echo "#define CONFIG_PPCHAMELEON_CLK_33" >> $(obj)include/config.h ; \
++ $(XECHO) "SysClk = 33MHz" ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
++
++CMS700_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
++
++CPCI2DP_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
++
++CPCI405_config \
++CPCI4052_config \
++CPCI405DT_config \
++CPCI405AB_config: unconfig
++ @mkdir -p $(obj)board/esd/cpci405
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci405 esd
++
++CPCIISER4_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpciiser4 esd
++
++CRAYL1_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx L1 cray
++
++csb272_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx csb272
++
++csb472_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx csb472
++
++DASA_SIM_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx dasa_sim esd
++
++dlvision_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx dlvision gdsys
++
++DP405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx dp405 esd
++
++DU405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx du405 esd
++
++DU440_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx du440 esd
++
++ebony_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx ebony amcc
++
++ERIC_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx eric
++
++EXBITGEN_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx exbitgen
++
++fx12mm_flash_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
++ @mkdir -p $(obj)include $(obj)board/avnet/fx12mm
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\
++ > $(obj)board/avnet/fx12mm/config.tmp
++ @echo "TEXT_BASE := 0xFFCB0000" \
++ >> $(obj)board/avnet/fx12mm/config.tmp
++ @$(MKCONFIG) fx12mm ppc ppc4xx fx12mm avnet
++
++fx12mm_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
++ @mkdir -p $(obj)include $(obj)board/avnet/fx12mm
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\
++ > $(obj)board/avnet/fx12mm/config.tmp
++ @echo "TEXT_BASE := 0x03000000" \
++ >> $(obj)board/avnet/fx12mm/config.tmp
++ @$(MKCONFIG) fx12mm ppc ppc4xx fx12mm avnet
++
++G2000_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000
++
++gdppc440etx_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx gdppc440etx gdsys
++
++hcu4_config: unconfig
++ @mkdir -p $(obj)board/netstal/common
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu4 netstal
++
++hcu5_config: unconfig
++ @mkdir -p $(obj)board/netstal/common
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu5 netstal
++
++HH405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx hh405 esd
++
++HUB405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx hub405 esd
++
++# Compact-Center(codename intip) & DevCon-Center use different U-Boot images
++intip_config \
++devconcenter_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
++ tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a intip ppc ppc4xx intip gdsys
++
++JSE_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx jse
++
++KAREF_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx karef sandburst
++
++katmai_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx katmai amcc
++
++# Kilauea & Haleakala images are identical (recognized via PVR)
++kilauea_config \
++haleakala_config: unconfig
++ @$(MKCONFIG) -n $@ -a kilauea ppc ppc4xx kilauea amcc
++
++kilauea_nand_config \
++haleakala_nand_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/amcc/kilauea
++ @mkdir -p $(obj)nand_spl/board/amcc/kilauea
++ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a kilauea ppc ppc4xx kilauea amcc
++ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/kilauea/config.tmp
++ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
++
++korat_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx korat
++
++luan_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx luan amcc
++
++lwmon5_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx lwmon5
++
++makalu_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx makalu amcc
++
++mcu25_config: unconfig
++ @mkdir -p $(obj)board/netstal/common
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx mcu25 netstal
++
++METROBOX_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx metrobox sandburst
++
++MIP405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx mip405 mpl
++
++MIP405T_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_MIP405T" >$(obj)include/config.h
++ @$(XECHO) "Enable subset config for MIP405T"
++ @$(MKCONFIG) -a MIP405 ppc ppc4xx mip405 mpl
++
++ML2_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml2
++
++ml300_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx
++
++ml507_flash_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
++ @mkdir -p $(obj)include $(obj)board/xilinx/ml507
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
++ > $(obj)board/xilinx/ml507/config.tmp
++ @echo "TEXT_BASE := 0xFE360000" \
++ >> $(obj)board/xilinx/ml507/config.tmp
++ @$(MKCONFIG) ml507 ppc ppc4xx ml507 xilinx
++
++ml507_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
++ @mkdir -p $(obj)include $(obj)board/xilinx/ml507
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
++ > $(obj)board/xilinx/ml507/config.tmp
++ @echo "TEXT_BASE := 0x04000000" \
++ >> $(obj)board/xilinx/ml507/config.tmp
++ @$(MKCONFIG) ml507 ppc ppc4xx ml507 xilinx
++
++neo_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx neo gdsys
++
++ocotea_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx ocotea amcc
++
++OCRTC_config \
++ORSG_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx ocrtc esd
++
++p3p440_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx p3p440 prodrive
++
++PCI405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx pci405 esd
++
++pcs440ep_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx pcs440ep
++
++PIP405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx pip405 mpl
++
++PLU405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx plu405 esd
++
++PMC405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc405 esd
++
++PMC405DE_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc405de esd
++
++PMC440_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc440 esd
++
++PPChameleonEVB_config \
++PPChameleonEVB_BA_25_config \
++PPChameleonEVB_ME_25_config \
++PPChameleonEVB_HI_25_config \
++PPChameleonEVB_BA_33_config \
++PPChameleonEVB_ME_33_config \
++PPChameleonEVB_HI_33_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring EVB_BA,$@)" ] || \
++ { echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 0" >>$(obj)include/config.h ; \
++ $(XECHO) "... BASIC model" ; \
++ }
++ @[ -z "$(findstring EVB_ME,$@)" ] || \
++ { echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... MEDIUM model" ; \
++ }
++ @[ -z "$(findstring EVB_HI,$@)" ] || \
++ { echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 2" >>$(obj)include/config.h ; \
++ $(XECHO) "... HIGH-END model" ; \
++ }
++ @[ -z "$(findstring _25,$@)" ] || \
++ { echo "#define CONFIG_PPCHAMELEON_CLK_25" >>$(obj)include/config.h ; \
++ $(XECHO) "SysClk = 25MHz" ; \
++ }
++ @[ -z "$(findstring _33,$@)" ] || \
++ { echo "#define CONFIG_PPCHAMELEON_CLK_33" >>$(obj)include/config.h ; \
++ $(XECHO) "SysClk = 33MHz" ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
++
++quad100hd_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx quad100hd
++
++redwood_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx redwood amcc
++
++sbc405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
++
++sc3_config:unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
++
++sequoia_config \
++rainier_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
++ tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc
++
++sequoia_nand_config \
++rainier_nand_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/amcc/sequoia
++ @mkdir -p $(obj)nand_spl/board/amcc/sequoia
++ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
++ @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
++ tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc
++ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
++ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
++
++sequoia_ramboot_config \
++rainier_ramboot_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/amcc/sequoia
++ @echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h
++ @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
++ tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc
++ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
++ @echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \
++ $(obj)board/amcc/sequoia/config.tmp
++
++taihu_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
++
++taishan_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx taishan amcc
++
++v5fx30teval_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
++ @mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
++ > $(obj)board/avnet/v5fx30teval/config.tmp
++ @echo "TEXT_BASE := 0x03000000" \
++ >> $(obj)board/avnet/v5fx30teval/config.tmp
++ @$(MKCONFIG) v5fx30teval ppc ppc4xx v5fx30teval avnet
++
++v5fx30teval_flash_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
++ @mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
++ > $(obj)board/avnet/v5fx30teval/config.tmp
++ @echo "TEXT_BASE := 0xFF1C0000" \
++ >> $(obj)board/avnet/v5fx30teval/config.tmp
++ @$(MKCONFIG) v5fx30teval ppc ppc4xx v5fx30teval avnet
++
++VOH405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx voh405 esd
++
++VOM405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd
++
++W7OLMC_config \
++W7OLMG_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o
++
++# Walnut & Sycamore images are identical (recognized via PVR)
++walnut_config \
++sycamore_config: unconfig
++ @$(MKCONFIG) -n $@ -a walnut ppc ppc4xx walnut amcc
++
++WUH405_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx wuh405 esd
++
++xilinx-ppc405-generic_flash_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\
++ > $(obj)board/xilinx/ppc405-generic/config.tmp
++ @echo "TEXT_BASE := 0xFE360000" \
++ >> $(obj)board/xilinx/ppc405-generic/config.tmp
++ @$(MKCONFIG) xilinx-ppc405-generic ppc ppc4xx ppc405-generic xilinx
++
++xilinx-ppc405-generic_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\
++ > $(obj)board/xilinx/ppc405-generic/config.tmp
++ @echo "TEXT_BASE := 0x04000000" \
++ >> $(obj)board/xilinx/ppc405-generic/config.tmp
++ @$(MKCONFIG) xilinx-ppc405-generic ppc ppc4xx ppc405-generic xilinx
++
++xilinx-ppc440-generic_flash_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
++ > $(obj)board/xilinx/ppc440-generic/config.tmp
++ @echo "TEXT_BASE := 0xFE360000" \
++ >> $(obj)board/xilinx/ppc440-generic/config.tmp
++ @$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx
++
++xilinx-ppc440-generic_config: unconfig
++ @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
++ @echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
++ > $(obj)board/xilinx/ppc440-generic/config.tmp
++ @echo "TEXT_BASE := 0x04000000" \
++ >> $(obj)board/xilinx/ppc440-generic/config.tmp
++ @$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx
++
++XPEDITE1000_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx xpedite1000 xes
++
++yosemite_config \
++yellowstone_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
++ tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
++ @$(MKCONFIG) -n $@ -a yosemite ppc ppc4xx yosemite amcc
++
++yucca_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx yucca amcc
++
++zeus_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc ppc4xx zeus
++
++#########################################################################
++## MPC8220 Systems
++#########################################################################
++
++Alaska8220_config \
++Yukon8220_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8220 alaska
++
++sorcery_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8220 sorcery
++
++#########################################################################
++## MPC824x Systems
++#########################################################################
++xtract_82xx = $(subst _BIGFLASH,,$(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1))))))
++
++A3000_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x a3000
++
++barco_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x barco
++
++BMW_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x bmw
++
++CPC45_config \
++CPC45_ROMBOOT_config: unconfig
++ @$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc824x cpc45
++ @cd $(obj)include ; \
++ if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
++ echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
++ $(XECHO) "... booting from 8-bit flash" ; \
++ else \
++ echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
++ $(XECHO) "... booting from 64-bit flash" ; \
++ fi; \
++ echo "export CONFIG_BOOT_ROM" >> config.mk;
++
++CU824_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x cu824
++
++debris_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x debris etin
++
++eXalion_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x eXalion
++
++HIDDEN_DRAGON_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x hidden_dragon
++
++kvme080_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x kvme080 etin
++
++# HDLAN is broken ATM. Should be fixed as soon as hardware is available and as
++# time permits.
++#linkstation_HDLAN_config \
++# Remove this line when HDLAN is fixed
++linkstation_HGLAN_config: unconfig
++ @mkdir -p $(obj)include
++ @case $@ in \
++ *HGLAN*) echo "#define CONFIG_HGLAN 1" >$(obj)include/config.h; ;; \
++ *HDLAN*) echo "#define CONFIG_HLAN 1" >$(obj)include/config.h; ;; \
++ esac
++ @$(MKCONFIG) -n $@ -a linkstation ppc mpc824x linkstation
++
++MOUSSE_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x mousse
++
++MUSENKI_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x musenki
++
++MVBLUE_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x mvblue
++
++OXC_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x oxc
++
++PN62_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x pn62
++
++Sandpoint8240_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x sandpoint
++
++Sandpoint8245_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x sandpoint
++
++sbc8240_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x sbc8240
++
++SL8245_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x sl8245
++
++utx8245_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc824x utx8245
++
++#########################################################################
++## MPC8260 Systems
++#########################################################################
++
++atc_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 atc
++
++cogent_mpc8260_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 cogent
++
++CPU86_config \
++CPU86_ROMBOOT_config: unconfig
++ @$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc8260 cpu86
++ @cd $(obj)include ; \
++ if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
++ echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
++ $(XECHO) "... booting from 8-bit flash" ; \
++ else \
++ echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
++ $(XECHO) "... booting from 64-bit flash" ; \
++ fi; \
++ echo "export CONFIG_BOOT_ROM" >> config.mk;
++
++CPU87_config \
++CPU87_ROMBOOT_config: unconfig
++ @$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc8260 cpu87
++ @cd $(obj)include ; \
++ if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
++ echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
++ $(XECHO) "... booting from 8-bit flash" ; \
++ else \
++ echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
++ $(XECHO) "... booting from 64-bit flash" ; \
++ fi; \
++ echo "export CONFIG_BOOT_ROM" >> config.mk;
++
++ep8248_config \
++ep8248E_config : unconfig
++ @$(MKCONFIG) ep8248 ppc mpc8260 ep8248
++
++ep8260_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 ep8260
++
++ep82xxm_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 ep82xxm
++
++gw8260_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 gw8260
++
++hymod_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 hymod
++
++IDS8247_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 ids8247
++
++IPHASE4539_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 iphase4539
++
++ISPAN_config \
++ISPAN_REVB_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _REVB_,$@)" ] ; then \
++ echo "#define CONFIG_SYS_REV_B" > $(obj)include/config.h ; \
++ fi
++ @$(MKCONFIG) -a ISPAN ppc mpc8260 ispan
++
++mgcoge_config : unconfig
++ @$(MKCONFIG) mgcoge ppc mpc8260 mgcoge keymile
++
++MPC8260ADS_config \
++MPC8260ADS_lowboot_config \
++MPC8260ADS_33MHz_config \
++MPC8260ADS_33MHz_lowboot_config \
++MPC8260ADS_40MHz_config \
++MPC8260ADS_40MHz_lowboot_config \
++MPC8272ADS_config \
++MPC8272ADS_lowboot_config \
++PQ2FADS_config \
++PQ2FADS_lowboot_config \
++PQ2FADS-VR_config \
++PQ2FADS-VR_lowboot_config \
++PQ2FADS-ZU_config \
++PQ2FADS-ZU_lowboot_config \
++PQ2FADS-ZU_66MHz_config \
++PQ2FADS-ZU_66MHz_lowboot_config \
++ : unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/freescale/mpc8260ads
++ $(if $(findstring PQ2FADS,$@), \
++ @echo "#define CONFIG_ADSTYPE CONFIG_SYS_PQ2FADS" > $(obj)include/config.h, \
++ @echo "#define CONFIG_ADSTYPE CONFIG_SYS_"$(subst MPC,,$(word 1,$(subst _, ,$@))) > $(obj)include/config.h)
++ $(if $(findstring MHz,$@), \
++ @echo "#define CONFIG_8260_CLKIN" $(subst MHz,,$(word 2,$(subst _, ,$@)))"000000" >> $(obj)include/config.h, \
++ $(if $(findstring VR,$@), \
++ @echo "#define CONFIG_8260_CLKIN 66000000" >> $(obj)include/config.h))
++ @[ -z "$(findstring lowboot_,$@)" ] || \
++ { echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp ; \
++ $(XECHO) "... with lowboot configuration" ; \
++ }
++ @$(MKCONFIG) -a MPC8260ADS ppc mpc8260 mpc8260ads freescale
++
++MPC8266ADS_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 mpc8266ads freescale
++
++muas3001_dev_config \
++muas3001_config : unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/muas3001
++ @if [ "$(findstring dev,$@)" ] ; then \
++ echo "#define CONFIG_MUAS_DEV_BOARD" > $(obj)include/config.h ; \
++ fi
++ @$(MKCONFIG) -a muas3001 ppc mpc8260 muas3001
++
++# PM825/PM826 default configuration: small (= 8 MB) Flash / boot from 64-bit flash
++PM825_config \
++PM825_ROMBOOT_config \
++PM825_BIGFLASH_config \
++PM825_ROMBOOT_BIGFLASH_config \
++PM826_config \
++PM826_ROMBOOT_config \
++PM826_BIGFLASH_config \
++PM826_ROMBOOT_BIGFLASH_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/pm826
++ @if [ "$(findstring PM825_,$@)" ] ; then \
++ echo "#define CONFIG_PCI" >$(obj)include/config.h ; \
++ else \
++ >$(obj)include/config.h ; \
++ fi
++ @if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
++ $(XECHO) "... booting from 8-bit flash" ; \
++ echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
++ echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \
++ if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
++ $(XECHO) "... with 32 MB Flash" ; \
++ echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \
++ fi; \
++ else \
++ $(XECHO) "... booting from 64-bit flash" ; \
++ if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
++ $(XECHO) "... with 32 MB Flash" ; \
++ echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \
++ echo "TEXT_BASE = 0x40000000" >$(obj)board/pm826/config.tmp ; \
++ else \
++ echo "TEXT_BASE = 0xFF000000" >$(obj)board/pm826/config.tmp ; \
++ fi; \
++ fi
++ @$(MKCONFIG) -a PM826 ppc mpc8260 pm826
++
++PM828_config \
++PM828_PCI_config \
++PM828_ROMBOOT_config \
++PM828_ROMBOOT_PCI_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/pm826
++ @if [ "$(findstring _PCI_,$@)" ] ; then \
++ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
++ $(XECHO) "... with PCI enabled" ; \
++ fi
++ @if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
++ $(XECHO) "... booting from 8-bit flash" ; \
++ echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
++ echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \
++ fi
++ @$(MKCONFIG) -a PM828 ppc mpc8260 pm828
++
++ppmc8260_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 ppmc8260
++
++Rattler8248_config \
++Rattler_config: unconfig
++ @mkdir -p $(obj)include
++ $(if $(findstring 8248,$@), \
++ @echo "#define CONFIG_MPC8248" > $(obj)include/config.h)
++ @$(MKCONFIG) -a Rattler ppc mpc8260 rattler
++
++RPXsuper_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 rpxsuper
++
++rsdproto_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 rsdproto
++
++sacsng_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 sacsng
++
++sbc8260_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 sbc8260
++
++SCM_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 SCM siemens
++
++TQM8255_AA_config \
++TQM8260_AA_config \
++TQM8260_AB_config \
++TQM8260_AC_config \
++TQM8260_AD_config \
++TQM8260_AE_config \
++TQM8260_AF_config \
++TQM8260_AG_config \
++TQM8260_AH_config \
++TQM8260_AI_config \
++TQM8265_AA_config: unconfig
++ @mkdir -p $(obj)include
++ @case "$@" in \
++ TQM8255_AA_config) CTYPE=MPC8255; CFREQ=300; CACHE=no; BMODE=8260;; \
++ TQM8260_AA_config) CTYPE=MPC8260; CFREQ=200; CACHE=no; BMODE=8260;; \
++ TQM8260_AB_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \
++ TQM8260_AC_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;; \
++ TQM8260_AD_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
++ TQM8260_AE_config) CTYPE=MPC8260; CFREQ=266; CACHE=no; BMODE=8260;; \
++ TQM8260_AF_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
++ TQM8260_AG_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=8260;; \
++ TQM8260_AH_config) CTYPE=MPC8260; CFREQ=300; CACHE=yes; BMODE=60x;; \
++ TQM8260_AI_config) CTYPE=MPC8260; CFREQ=300; CACHE=no; BMODE=60x;; \
++ TQM8265_AA_config) CTYPE=MPC8265; CFREQ=300; CACHE=no; BMODE=60x;; \
++ esac; \
++ if [ "$${CTYPE}" != "MPC8260" ] ; then \
++ echo "#define CONFIG_$${CTYPE}" >>$(obj)include/config.h ; \
++ fi; \
++ echo "#define CONFIG_$${CFREQ}MHz" >>$(obj)include/config.h ; \
++ echo "... with $${CFREQ}MHz system clock" ; \
++ if [ "$${CACHE}" = "yes" ] ; then \
++ echo "#define CONFIG_L2_CACHE" >>$(obj)include/config.h ; \
++ $(XECHO) "... with L2 Cache support" ; \
++ else \
++ echo "#undef CONFIG_L2_CACHE" >>$(obj)include/config.h ; \
++ $(XECHO) "... without L2 Cache support" ; \
++ fi; \
++ if [ "$${BMODE}" = "60x" ] ; then \
++ echo "#define CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 60x Bus Mode" ; \
++ else \
++ echo "#undef CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
++ $(XECHO) "... without 60x Bus Mode" ; \
++ fi
++ @$(MKCONFIG) -a TQM8260 ppc mpc8260 tqm8260 tqc
++
++TQM8272_config: unconfig
++ @$(MKCONFIG) TQM8272 ppc mpc8260 tqm8272 tqc
++
++VoVPN-GW_66MHz_config \
++VoVPN-GW_100MHz_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_CLKIN_$(word 2,$(subst _, ,$@))" > $(obj)include/config.h
++ @$(MKCONFIG) -a VoVPN-GW ppc mpc8260 vovpn-gw funkwerk
++
++ZPC1900_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc8260 zpc1900
++
++#########################################################################
++## Coldfire
++#########################################################################
++
++M5208EVBE_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5208evbe freescale
++
++M52277EVB_config \
++M52277EVB_spansion_config \
++M52277EVB_stmicro_config : unconfig
++ @case "$@" in \
++ M52277EVB_config) FLASH=SPANSION;; \
++ M52277EVB_spansion_config) FLASH=SPANSION;; \
++ M52277EVB_stmicro_config) FLASH=STMICRO;; \
++ esac; \
++ if [ "$${FLASH}" = "SPANSION" ] ; then \
++ echo "#define CONFIG_SYS_SPANSION_BOOT" >> $(obj)include/config.h ; \
++ echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m52277evb/config.tmp ; \
++ cp $(obj)board/freescale/m52277evb/u-boot.spa $(obj)board/freescale/m52277evb/u-boot.lds ; \
++ $(XECHO) "... with SPANSION boot..." ; \
++ fi; \
++ if [ "$${FLASH}" = "STMICRO" ] ; then \
++ echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
++ echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
++ echo "TEXT_BASE = 0x43E00000" > $(obj)board/freescale/m52277evb/config.tmp ; \
++ cp $(obj)board/freescale/m52277evb/u-boot.stm $(obj)board/freescale/m52277evb/u-boot.lds ; \
++ $(XECHO) "... with ST Micro boot..." ; \
++ fi
++ @$(MKCONFIG) -a M52277EVB m68k mcf5227x m52277evb freescale
++
++M5235EVB_config \
++M5235EVB_Flash16_config \
++M5235EVB_Flash32_config: unconfig
++ @case "$@" in \
++ M5235EVB_config) FLASH=16;; \
++ M5235EVB_Flash16_config) FLASH=16;; \
++ M5235EVB_Flash32_config) FLASH=32;; \
++ esac; \
++ if [ "$${FLASH}" != "16" ] ; then \
++ echo "#define NORFLASH_PS32BIT 1" >> $(obj)include/config.h ; \
++ echo "TEXT_BASE = 0xFFC00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
++ cp $(obj)board/freescale/m5235evb/u-boot.32 $(obj)board/freescale/m5235evb/u-boot.lds ; \
++ else \
++ echo "TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
++ cp $(obj)board/freescale/m5235evb/u-boot.16 $(obj)board/freescale/m5235evb/u-boot.lds ; \
++ fi
++ @$(MKCONFIG) -a M5235EVB m68k mcf523x m5235evb freescale
++
++M5249EVB_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5249evb freescale
++
++M5253DEMO_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5253demo freescale
++
++M5253EVBE_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5253evbe freescale
++
++cobra5272_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 cobra5272
++
++EB+MCF-EV123_config : unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/BuS/EB+MCF-EV123
++ @echo "TEXT_BASE = 0xFFE00000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
++ @$(MKCONFIG) EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
++
++EB+MCF-EV123_internal_config : unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/BuS/EB+MCF-EV123
++ @echo "TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
++ @$(MKCONFIG) EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
++
++idmr_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 idmr
++
++M5271EVB_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5271evb freescale
++
++M5272C3_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5272c3 freescale
++
++M5275EVB_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5275evb freescale
++
++M5282EVB_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb freescale
++
++M53017EVB_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf532x m53017evb freescale
++
++M5329AFEE_config \
++M5329BFEE_config : unconfig
++ @case "$@" in \
++ M5329AFEE_config) NAND=0;; \
++ M5329BFEE_config) NAND=16;; \
++ esac; \
++ if [ "$${NAND}" != "0" ] ; then \
++ echo "#define NANDFLASH_SIZE $${NAND}" > $(obj)include/config.h ; \
++ fi
++ @$(MKCONFIG) -a M5329EVB m68k mcf532x m5329evb freescale
++
++M5373EVB_config : unconfig
++ @case "$@" in \
++ M5373EVB_config) NAND=16;; \
++ esac; \
++ if [ "$${NAND}" != "0" ] ; then \
++ echo "#define NANDFLASH_SIZE $${NAND}" > $(obj)include/config.h ; \
++ fi
++ @$(MKCONFIG) -a M5373EVB m68k mcf532x m5373evb freescale
++
++M54451EVB_config \
++M54451EVB_stmicro_config : unconfig
++ @case "$@" in \
++ M54451EVB_config) FLASH=NOR;; \
++ M54451EVB_stmicro_config) FLASH=STMICRO;; \
++ esac; \
++ if [ "$${FLASH}" = "NOR" ] ; then \
++ echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \
++ cp $(obj)board/freescale/m54451evb/u-boot.spa $(obj)board/freescale/m54451evb/u-boot.lds ; \
++ $(XECHO) "... with NOR boot..." ; \
++ fi; \
++ if [ "$${FLASH}" = "STMICRO" ] ; then \
++ echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
++ echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
++ echo "TEXT_BASE = 0x47E00000" > $(obj)board/freescale/m54451evb/config.tmp ; \
++ cp $(obj)board/freescale/m54451evb/u-boot.stm $(obj)board/freescale/m54451evb/u-boot.lds ; \
++ $(XECHO) "... with ST Micro boot..." ; \
++ fi; \
++ echo "#define CONFIG_SYS_INPUT_CLKSRC 24000000" >> $(obj)include/config.h ;
++ @$(MKCONFIG) -a M54451EVB m68k mcf5445x m54451evb freescale
++
++M54455EVB_config \
++M54455EVB_atmel_config \
++M54455EVB_intel_config \
++M54455EVB_a33_config \
++M54455EVB_a66_config \
++M54455EVB_i33_config \
++M54455EVB_i66_config \
++M54455EVB_stm33_config : unconfig
++ @case "$@" in \
++ M54455EVB_config) FLASH=ATMEL; FREQ=33333333;; \
++ M54455EVB_atmel_config) FLASH=ATMEL; FREQ=33333333;; \
++ M54455EVB_intel_config) FLASH=INTEL; FREQ=33333333;; \
++ M54455EVB_a33_config) FLASH=ATMEL; FREQ=33333333;; \
++ M54455EVB_a66_config) FLASH=ATMEL; FREQ=66666666;; \
++ M54455EVB_i33_config) FLASH=INTEL; FREQ=33333333;; \
++ M54455EVB_i66_config) FLASH=INTEL; FREQ=66666666;; \
++ M54455EVB_stm33_config) FLASH=STMICRO; FREQ=33333333;; \
++ esac; \
++ if [ "$${FLASH}" = "INTEL" ] ; then \
++ echo "#define CONFIG_SYS_INTEL_BOOT" >> $(obj)include/config.h ; \
++ echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
++ cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \
++ $(XECHO) "... with INTEL boot..." ; \
++ fi; \
++ if [ "$${FLASH}" = "ATMEL" ] ; then \
++ echo "#define CONFIG_SYS_ATMEL_BOOT" >> $(obj)include/config.h ; \
++ echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
++ cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \
++ $(XECHO) "... with ATMEL boot..." ; \
++ fi; \
++ if [ "$${FLASH}" = "STMICRO" ] ; then \
++ echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
++ echo "#define CONFIG_SYS_STMICRO_BOOT" >> $(obj)include/config.h ; \
++ echo "TEXT_BASE = 0x4FE00000" > $(obj)board/freescale/m54455evb/config.tmp ; \
++ cp $(obj)board/freescale/m54455evb/u-boot.stm $(obj)board/freescale/m54455evb/u-boot.lds ; \
++ $(XECHO) "... with ST Micro boot..." ; \
++ fi; \
++ echo "#define CONFIG_SYS_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
++ $(XECHO) "... with $${FREQ}Hz input clock"
++ @$(MKCONFIG) -a M54455EVB m68k mcf5445x m54455evb freescale
++
++M5475AFE_config \
++M5475BFE_config \
++M5475CFE_config \
++M5475DFE_config \
++M5475EFE_config \
++M5475FFE_config \
++M5475GFE_config : unconfig
++ @case "$@" in \
++ M5475AFE_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
++ M5475BFE_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \
++ M5475CFE_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \
++ M5475DFE_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \
++ M5475EFE_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \
++ M5475FFE_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \
++ M5475GFE_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
++ esac; \
++ echo "#define CONFIG_SYS_BUSCLK 133333333" > $(obj)include/config.h ; \
++ echo "#define CONFIG_SYS_BOOTSZ $${BOOT}" >> $(obj)include/config.h ; \
++ echo "#define CONFIG_SYS_DRAMSZ $${RAM}" >> $(obj)include/config.h ; \
++ if [ "$${RAM1}" != "0" ] ; then \
++ echo "#define CONFIG_SYS_DRAMSZ1 $${RAM1}" >> $(obj)include/config.h ; \
++ fi; \
++ if [ "$${CODE}" != "0" ] ; then \
++ echo "#define CONFIG_SYS_NOR1SZ $${CODE}" >> $(obj)include/config.h ; \
++ fi; \
++ if [ "$${VID}" == "1" ] ; then \
++ echo "#define CONFIG_SYS_VIDEO" >> $(obj)include/config.h ; \
++ fi; \
++ if [ "$${USB}" == "1" ] ; then \
++ echo "#define CONFIG_SYS_USBCTRL" >> $(obj)include/config.h ; \
++ fi
++ @$(MKCONFIG) -a M5475EVB m68k mcf547x_8x m547xevb freescale
++
++M5485AFE_config \
++M5485BFE_config \
++M5485CFE_config \
++M5485DFE_config \
++M5485EFE_config \
++M5485FFE_config \
++M5485GFE_config \
++M5485HFE_config : unconfig
++ @case "$@" in \
++ M5485AFE_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
++ M5485BFE_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \
++ M5485CFE_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \
++ M5485DFE_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \
++ M5485EFE_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \
++ M5485FFE_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \
++ M5485GFE_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
++ M5485HFE_config) BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \
++ esac; \
++ echo "#define CONFIG_SYS_BUSCLK 100000000" > $(obj)include/config.h ; \
++ echo "#define CONFIG_SYS_BOOTSZ $${BOOT}" >> $(obj)include/config.h ; \
++ echo "#define CONFIG_SYS_DRAMSZ $${RAM}" >> $(obj)include/config.h ; \
++ if [ "$${RAM1}" != "0" ] ; then \
++ echo "#define CONFIG_SYS_DRAMSZ1 $${RAM1}" >> $(obj)include/config.h ; \
++ fi; \
++ if [ "$${CODE}" != "0" ] ; then \
++ echo "#define CONFIG_SYS_NOR1SZ $${CODE}" >> $(obj)include/config.h ; \
++ fi; \
++ if [ "$${VID}" == "1" ] ; then \
++ echo "#define CONFIG_SYS_VIDEO" >> $(obj)include/config.h ; \
++ fi; \
++ if [ "$${USB}" == "1" ] ; then \
++ echo "#define CONFIG_SYS_USBCTRL" >> $(obj)include/config.h ; \
++ fi
++ @$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
++
++TASREG_config : unconfig
++ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
++
++#########################################################################
++## MPC83xx Systems
++#########################################################################
++
++kmeter1_config: unconfig
++ @$(MKCONFIG) kmeter1 ppc mpc83xx kmeter1 keymile
++
++MPC8313ERDB_33_config \
++MPC8313ERDB_66_config \
++MPC8313ERDB_NAND_33_config \
++MPC8313ERDB_NAND_66_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/freescale/mpc8313erdb
++ @if [ "$(findstring _33_,$@)" ] ; then \
++ $(XECHO) -n "...33M ..." ; \
++ echo "#define CONFIG_SYS_33MHZ" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _66_,$@)" ] ; then \
++ $(XECHO) -n "...66M..." ; \
++ echo "#define CONFIG_SYS_66MHZ" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _NAND_,$@)" ] ; then \
++ $(XECHO) -n "...NAND..." ; \
++ echo "TEXT_BASE = 0x00100000" > $(obj)board/freescale/mpc8313erdb/config.tmp ; \
++ echo "#define CONFIG_NAND_U_BOOT" >>$(obj)include/config.h ; \
++ fi ;
++ @$(MKCONFIG) -a MPC8313ERDB ppc mpc83xx mpc8313erdb freescale
++ @if [ "$(findstring _NAND_,$@)" ] ; then \
++ echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ; \
++ fi ;
++
++MPC8315ERDB_config: unconfig
++ @$(MKCONFIG) -a MPC8315ERDB ppc mpc83xx mpc8315erdb freescale
++
++MPC8323ERDB_config: unconfig
++ @$(MKCONFIG) -a MPC8323ERDB ppc mpc83xx mpc8323erdb freescale
++
++MPC832XEMDS_config \
++MPC832XEMDS_HOST_33_config \
++MPC832XEMDS_HOST_66_config \
++MPC832XEMDS_SLAVE_config \
++MPC832XEMDS_ATM_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _HOST_,$@)" ] ; then \
++ $(XECHO) -n "... PCI HOST " ; \
++ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _SLAVE_,$@)" ] ; then \
++ $(XECHO) "...PCI SLAVE 66M" ; \
++ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _33_,$@)" ] ; then \
++ $(XECHO) -n "...33M ..." ; \
++ echo "#define PCI_33M" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _66_,$@)" ] ; then \
++ $(XECHO) -n "...66M..." ; \
++ echo "#define PCI_66M" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _ATM_,$@)" ] ; then \
++ $(XECHO) -n "...ATM..." ; \
++ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
++ fi ;
++ @$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds freescale
++
++MPC8349EMDS_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc83xx mpc8349emds freescale
++
++MPC8349ITX_config \
++MPC8349ITX_LOWBOOT_config \
++MPC8349ITXGP_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/freescale/mpc8349itx
++ @echo "#define CONFIG_$(subst _LOWBOOT,,$(@:_config=))" >> $(obj)include/config.h
++ @if [ "$(findstring GP,$@)" ] ; then \
++ echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
++ fi
++ @if [ "$(findstring LOWBOOT,$@)" ] ; then \
++ echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
++ fi
++ @$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX ppc mpc83xx mpc8349itx freescale
++
++MPC8360EMDS_config \
++MPC8360EMDS_HOST_33_config \
++MPC8360EMDS_HOST_66_config \
++MPC8360EMDS_SLAVE_config \
++MPC8360EMDS_ATM_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _HOST_,$@)" ] ; then \
++ $(XECHO) -n "... PCI HOST " ; \
++ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _SLAVE_,$@)" ] ; then \
++ $(XECHO) "...PCI SLAVE 66M" ; \
++ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _33_,$@)" ] ; then \
++ $(XECHO) -n "...33M ..." ; \
++ echo "#define PCI_33M" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _66_,$@)" ] ; then \
++ $(XECHO) -n "...66M..." ; \
++ echo "#define PCI_66M" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _ATM_,$@)" ] ; then \
++ $(XECHO) -n "...ATM..." ; \
++ echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
++ fi ;
++ @$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds freescale
++
++MPC8360ERDK_33_config \
++MPC8360ERDK_66_config \
++MPC8360ERDK_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _33_,$@)" ] ; then \
++ $(XECHO) -n "... CLKIN 33MHz " ; \
++ echo "#define CONFIG_CLKIN_33MHZ" >>$(obj)include/config.h ;\
++ fi ;
++ @$(MKCONFIG) -a MPC8360ERDK ppc mpc83xx mpc8360erdk freescale
++
++MPC837XEMDS_config \
++MPC837XEMDS_HOST_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _HOST_,$@)" ] ; then \
++ $(XECHO) -n "... PCI HOST " ; \
++ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
++ fi ;
++ @$(MKCONFIG) -a MPC837XEMDS ppc mpc83xx mpc837xemds freescale
++
++MPC837XERDB_config: unconfig
++ @$(MKCONFIG) -a MPC837XERDB ppc mpc83xx mpc837xerdb freescale
++
++MVBLM7_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7 matrix_vision
++
++sbc8349_config \
++sbc8349_PCI_33_config \
++sbc8349_PCI_66_config: unconfig
++ @$(MKCONFIG) -t $(@:_config=) sbc8349 ppc mpc83xx sbc8349
++
++SIMPC8313_LP_config \
++SIMPC8313_SP_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/sheldon/simpc8313
++ @if [ "$(findstring _LP_,$@)" ] ; then \
++ $(XECHO) -n "...Large Page NAND..." ; \
++ echo "#define CONFIG_NAND_LP" >> $(obj)include/config.h ; \
++ fi ; \
++ if [ "$(findstring _SP_,$@)" ] ; then \
++ $(XECHO) -n "...Small Page NAND..." ; \
++ echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \
++ fi ;
++ @$(MKCONFIG) -a SIMPC8313 ppc mpc83xx simpc8313 sheldon
++ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
++
++TQM834x_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
++
++vme8349_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc83xx vme8349 esd
++
++#########################################################################
++## MPC85xx Systems
++#########################################################################
++
++ATUM8548_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx atum8548
++
++MPC8536DS_NAND_config \
++MPC8536DS_SDCARD_config \
++MPC8536DS_SPIFLASH_config \
++MPC8536DS_36BIT_config \
++MPC8536DS_config: unconfig
++ @$(MKCONFIG) -t $(@:_config=) MPC8536DS ppc mpc85xx mpc8536ds freescale
++
++MPC8540ADS_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8540ads freescale
++
++MPC8540EVAL_config \
++MPC8540EVAL_33_config \
++MPC8540EVAL_66_config \
++MPC8540EVAL_33_slave_config \
++MPC8540EVAL_66_slave_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _33_,$@)" ] ; then \
++ $(XECHO) "... 33 MHz PCI" ; \
++ else \
++ echo "#define CONFIG_SYSCLK_66M" >>$(obj)include/config.h ; \
++ $(XECHO) "... 66 MHz PCI" ; \
++ fi ; \
++ if [ "$(findstring _slave_,$@)" ] ; then \
++ echo "#define CONFIG_PCI_SLAVE" >>$(obj)include/config.h ; \
++ $(XECHO) " slave" ; \
++ else \
++ $(XECHO) " host" ; \
++ fi
++ @$(MKCONFIG) -a MPC8540EVAL ppc mpc85xx mpc8540eval
++
++MPC8560ADS_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8560ads freescale
++
++MPC8541CDS_legacy_config \
++MPC8541CDS_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _legacy_,$@)" ] ; then \
++ echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
++ $(XECHO) "... legacy" ; \
++ fi
++ @$(MKCONFIG) -a MPC8541CDS ppc mpc85xx mpc8541cds freescale
++
++MPC8544DS_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8544ds freescale
++
++MPC8548CDS_legacy_config \
++MPC8548CDS_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _legacy_,$@)" ] ; then \
++ echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
++ $(XECHO) "... legacy" ; \
++ fi
++ @$(MKCONFIG) -a MPC8548CDS ppc mpc85xx mpc8548cds freescale
++
++MPC8555CDS_legacy_config \
++MPC8555CDS_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _legacy_,$@)" ] ; then \
++ echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
++ $(XECHO) "... legacy" ; \
++ fi
++ @$(MKCONFIG) -a MPC8555CDS ppc mpc85xx mpc8555cds freescale
++
++MPC8568MDS_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds freescale
++
++MPC8569MDS_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8569mds freescale
++
++MPC8572DS_36BIT_config \
++MPC8572DS_config: unconfig
++ @$(MKCONFIG) -t $(@:_config=) MPC8572DS ppc mpc85xx mpc8572ds freescale
++
++P2020DS_36BIT_config \
++P2020DS_config: unconfig
++ @$(MKCONFIG) -t $(@:_config=) P2020DS ppc mpc85xx p2020ds freescale
++
++P1011RDB_config \
++P1011RDB_NAND_config \
++P1011RDB_SDCARD_config \
++P1011RDB_SPIFLASH_config \
++P1020RDB_config \
++P1020RDB_NAND_config \
++P1020RDB_SDCARD_config \
++P1020RDB_SPIFLASH_config \
++P2010RDB_config \
++P2010RDB_NAND_config \
++P2010RDB_SDCARD_config \
++P2010RDB_SPIFLASH_config \
++P2020RDB_config \
++P2020RDB_NAND_config \
++P2020RDB_SDCARD_config \
++P2020RDB_SPIFLASH_config: unconfig
++ @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB ppc mpc85xx p1_p2_rdb freescale
++
++PM854_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx pm854
++
++PM856_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx pm856
++
++sbc8540_config \
++sbc8540_33_config \
++sbc8540_66_config: unconfig
++ @$(MKCONFIG) -t $(@:_config=) SBC8540 ppc mpc85xx sbc8560
++
++sbc8548_config \
++sbc8548_PCI_33_config \
++sbc8548_PCI_66_config \
++sbc8548_PCI_33_PCIE_config \
++sbc8548_PCI_66_PCIE_config: unconfig
++ @$(MKCONFIG) -t $(@:_config=) sbc8548 ppc mpc85xx sbc8548
++
++sbc8560_config \
++sbc8560_33_config \
++sbc8560_66_config: unconfig
++ @$(MKCONFIG) -t $(@:_config=) sbc8560 ppc mpc85xx sbc8560
++
++socrates_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx socrates
++
++stxgp3_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx stxgp3 stx
++
++stxssa_config \
++stxssa_4M_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _4M_,$@)" ] ; then \
++ echo "#define CONFIG_STXSSA_4M" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 4 MiB flash memory" ; \
++ fi
++ @$(MKCONFIG) -a stxssa ppc mpc85xx stxssa stx
++
++TQM8540_config \
++TQM8541_config \
++TQM8548_config \
++TQM8548_AG_config \
++TQM8548_BE_config \
++TQM8555_config \
++TQM8560_config: unconfig
++ @mkdir -p $(obj)include
++ @BTYPE=$(@:_config=); \
++ CTYPE=$(subst TQM,,$(subst _AG,,$(subst _BE,,$(@:_config=)))); \
++ $(XECHO) "... "$${BTYPE}" (MPC"$${CTYPE}")"; \
++ echo "#define CONFIG_MPC$${CTYPE}">>$(obj)include/config.h; \
++ echo "#define CONFIG_$${BTYPE}">>$(obj)include/config.h; \
++ echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \
++ echo "#define CONFIG_BOARDNAME \"$${BTYPE}\"">>$(obj)include/config.h;
++ @$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx tqc
++ @echo "CONFIG_$(@:_config=) = y">>$(obj)include/config.mk;
++
++XPEDITE5200_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5200 xes
++
++XPEDITE5370_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5370 xes
++
++#########################################################################
++## MPC86xx Systems
++#########################################################################
++
++MPC8610HPCD_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc86xx mpc8610hpcd freescale
++
++MPC8641HPCN_36BIT_config \
++MPC8641HPCN_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _36BIT_,$@)" ] ; then \
++ echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \
++ $(XECHO) "... enabling 36-bit physical addressing." ; \
++ fi
++ @$(MKCONFIG) -a MPC8641HPCN ppc mpc86xx mpc8641hpcn freescale
++
++sbc8641d_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc86xx sbc8641d
++
++XPEDITE5170_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc mpc86xx xpedite5170 xes
++
++#########################################################################
++## 74xx/7xx Systems
++#########################################################################
++
++AmigaOneG3SE_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx AmigaOneG3SE MAI
++
++BAB7xx_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx bab7xx eltec
++
++CPCI750_config: unconfig
++ @$(MKCONFIG) CPCI750 ppc 74xx_7xx cpci750 esd
++
++DB64360_config: unconfig
++ @$(MKCONFIG) DB64360 ppc 74xx_7xx db64360 Marvell
++
++DB64460_config: unconfig
++ @$(MKCONFIG) DB64460 ppc 74xx_7xx db64460 Marvell
++
++ELPPC_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx elppc eltec
++
++EVB64260_config \
++EVB64260_750CX_config: unconfig
++ @$(MKCONFIG) EVB64260 ppc 74xx_7xx evb64260
++
++mpc7448hpc2_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx mpc7448hpc2 freescale
++
++P3G4_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
++
++p3m750_config \
++p3m7448_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring 750_,$@)" ] ; then \
++ echo "#define CONFIG_P3M750" >>$(obj)include/config.h ; \
++ else \
++ echo "#define CONFIG_P3M7448" >>$(obj)include/config.h ; \
++ fi
++ @$(MKCONFIG) -a p3mx ppc 74xx_7xx p3mx prodrive
++
++PCIPPC2_config \
++PCIPPC6_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
++
++ppmc7xx_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
++
++ZUMA_config: unconfig
++ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
++
++#========================================================================
++# ARM
++#========================================================================
++#########################################################################
++## StrongARM Systems
++#########################################################################
++
++assabet_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm sa1100 assabet
++
++dnp1110_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm sa1100 dnp1110
++
++gcplus_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm sa1100 gcplus
++
++lart_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm sa1100 lart
++
++shannon_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm sa1100 shannon
++
++#########################################################################
++## ARM92xT Systems
++#########################################################################
++
++#########################################################################
++## Atmel AT91RM9200 Systems
++#########################################################################
++
++at91rm9200dk_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
++
++at91rm9200ek_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200ek atmel at91rm9200
++
++cmc_pu2_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
++
++CPUAT91_RAM_config \
++CPUAT91_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200
++
++csb637_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
++
++kb9202_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
++
++m501sk_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
++
++mp2usb_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
++
++#########################################################################
++## Atmel ARM926EJ-S Systems
++#########################################################################
++
++afeb9260_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs afeb9260 NULL at91
++
++at91cap9adk_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91
++
++at91sam9260ek_nandflash_config \
++at91sam9260ek_dataflash_cs0_config \
++at91sam9260ek_dataflash_cs1_config \
++at91sam9260ek_config \
++at91sam9g20ek_nandflash_config \
++at91sam9g20ek_dataflash_cs0_config \
++at91sam9g20ek_dataflash_cs1_config \
++at91sam9g20ek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring 9g20,$@)" ] ; then \
++ echo "#define CONFIG_AT91SAM9G20EK 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... 9G20 Variant" ; \
++ else \
++ echo "#define CONFIG_AT91SAM9260EK 1" >>$(obj)include/config.h ; \
++ fi;
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ else \
++ echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
++
++at91sam9xeek_nandflash_config \
++at91sam9xeek_dataflash_cs0_config \
++at91sam9xeek_dataflash_cs1_config \
++at91sam9xeek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ else \
++ echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
++ fi;
++ @$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
++
++at91sam9261ek_nandflash_config \
++at91sam9261ek_dataflash_cs0_config \
++at91sam9261ek_dataflash_cs3_config \
++at91sam9261ek_config \
++at91sam9g10ek_nandflash_config \
++at91sam9g10ek_dataflash_cs0_config \
++at91sam9g10ek_dataflash_cs3_config \
++at91sam9g10ek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring 9g10,$@)" ] ; then \
++ echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... 9G10 Variant" ; \
++ else \
++ echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \
++ fi;
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \
++ else \
++ echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91
++
++at91sam9263ek_norflash_config \
++at91sam9263ek_norflash_boot_config \
++at91sam9263ek_nandflash_config \
++at91sam9263ek_dataflash_config \
++at91sam9263ek_dataflash_cs0_config \
++at91sam9263ek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring norflash,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_NORFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NOR FLASH" ; \
++ else \
++ echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ fi;
++ @if [ "$(findstring norflash_boot,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_BOOT_NORFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... and boot from NOR FLASH" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91
++
++at91sam9rlek_nandflash_config \
++at91sam9rlek_dataflash_config \
++at91sam9rlek_dataflash_cs0_config \
++at91sam9rlek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ else \
++ echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
++
++CPU9G20_128M_config \
++CPU9G20_config \
++CPU9260_128M_config \
++CPU9260_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a cpu9260 arm arm926ejs cpu9260 eukrea at91
++
++meesc_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs meesc esd at91
++
++pm9261_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9261 ronetix at91
++
++at91sam9m10g45ek_nandflash_config \
++at91sam9m10g45ek_dataflash_config \
++at91sam9m10g45ek_dataflash_cs0_config \
++at91sam9m10g45ek_config \
++at91sam9g45ekes_nandflash_config \
++at91sam9g45ekes_dataflash_config \
++at91sam9g45ekes_dataflash_cs0_config \
++at91sam9g45ekes_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring 9m10,$@)" ] ; then \
++ echo "#define CONFIG_AT91SAM9M10G45EK 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... 9M10G45 Variant" ; \
++ else \
++ echo "#define CONFIG_AT91SAM9G45EKES 1" >>$(obj)include/config.h ; \
++ fi;
++
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ else \
++ echo "#define CONFIG_ATMEL_SPI 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91
++
++pm9263_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
++
++SBC35_A9G20_NANDFLASH_config \
++SBC35_A9G20_EEPROM_config \
++SBC35_A9G20_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a sbc35_a9g20 arm arm926ejs sbc35_a9g20 calao at91
++
++TNY_A9G20_NANDFLASH_config \
++TNY_A9G20_EEPROM_config \
++TNY_A9G20_config \
++TNY_A9260_NANDFLASH_config \
++TNY_A9260_EEPROM_config \
++TNY_A9260_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91
++
++########################################################################
++## ARM Integrator boards - see doc/README-integrator for more info.
++integratorap_config \
++ap_config \
++ap966_config \
++ap922_config \
++ap922_XA10_config \
++ap7_config \
++ap720t_config \
++ap920t_config \
++ap926ejs_config \
++ap946es_config: unconfig
++ @board/armltd/integrator/split_by_variant.sh ap $@
++
++integratorcp_config \
++cp_config \
++cp920t_config \
++cp926ejs_config \
++cp946es_config \
++cp1136_config \
++cp966_config \
++cp922_config \
++cp922_XA10_config \
++cp1026_config: unconfig
++ @board/armltd/integrator/split_by_variant.sh cp $@
++
++davinci_dvevm_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs dvevm davinci davinci
++
++davinci_schmoogie_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
++
++davinci_sffsdr_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
++
++davinci_sonata_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
++
++davinci_dm355evm_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs dm355evm davinci davinci
++
++davinci_dm355leopard_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs dm355leopard davinci davinci
++
++davinci_dm365evm_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs dm365evm davinci davinci
++
++davinci_dm6467evm_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
++
++imx27lite_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
++
++lpd7a400_config \
++lpd7a404_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
++
++mv88f6281gtw_ge_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
++
++mx1ads_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t mx1ads NULL imx
++
++mx1fs2_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t mx1fs2 NULL imx
++
++netstar_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm925t netstar
++
++nhk8815_config \
++nhk8815_onenand_config: unconfig
++ @mkdir -p $(obj)include
++ @ > $(obj)include/config.h
++ @if [ "$(findstring _onenand, $@)" ] ; then \
++ echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \
++ $(XECHO) "... configured to boot from OneNand Flash"; \
++ else \
++ $(XECHO) "... configured to boot from Nand Flash"; \
++ fi
++ @$(MKCONFIG) -a nhk8815 arm arm926ejs nhk8815 st nomadik
++
++omap1510inn_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn ti
++
++xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
++
++omap1610inn_config \
++omap1610inn_cs0boot_config \
++omap1610inn_cs3boot_config \
++omap1610inn_cs_autoboot_config \
++omap1610h2_config \
++omap1610h2_cs0boot_config \
++omap1610h2_cs3boot_config \
++omap1610h2_cs_autoboot_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _cs0boot_, $@)" ] ; then \
++ echo "#define CONFIG_CS0_BOOT" >> .$(obj)include/config.h ; \
++ $(XECHO) "... configured for CS0 boot"; \
++ elif [ "$(findstring _cs_autoboot_, $@)" ] ; then \
++ echo "#define CONFIG_CS_AUTOBOOT" >> $(obj)include/config.h ; \
++ $(XECHO) "... configured for CS_AUTO boot"; \
++ else \
++ echo "#define CONFIG_CS3_BOOT" >> $(obj)include/config.h ; \
++ $(XECHO) "... configured for CS3 boot"; \
++ fi;
++ @$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn ti omap
++
++omap5912osk_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk ti omap
++
++openrd_base_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
++
++xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
++
++omap730p2_config \
++omap730p2_cs0boot_config \
++omap730p2_cs3boot_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _cs0boot_, $@)" ] ; then \
++ echo "#define CONFIG_CS0_BOOT" >> $(obj)include/config.h ; \
++ $(XECHO) "... configured for CS0 boot"; \
++ else \
++ echo "#define CONFIG_CS3_BOOT" >> $(obj)include/config.h ; \
++ $(XECHO) "... configured for CS3 boot"; \
++ fi;
++ @$(MKCONFIG) -a $(call xtract_omap730p2,$@) arm arm926ejs omap730p2 ti omap
++
++rd6281a_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
++
++sbc2410x_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
++
++scb9328_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
++
++sheevaplug_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
++
++smdk2400_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t smdk2400 samsung s3c24x0
++
++smdk2410_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0
++
++SX1_stdout_serial_config \
++SX1_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _stdout_serial_, $@)" ] ; then \
++ echo "#undef CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
++ $(XECHO) "... configured for stdout serial"; \
++ else \
++ echo "#define CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
++ $(XECHO) "... configured for stdout usbtty"; \
++ fi;
++ @$(MKCONFIG) SX1 arm arm925t sx1
++
++# TRAB default configuration: 8 MB Flash, 32 MB RAM
++xtract_trab = $(subst _bigram,,$(subst _bigflash,,$(subst _old,,$(subst _config,,$1))))
++
++trab_config \
++trab_bigram_config \
++trab_bigflash_config \
++trab_old_config: unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/trab
++ @[ -z "$(findstring _bigram,$@)" ] || \
++ { echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_RAM_32MB" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 8 MB Flash, 32 MB RAM" ; \
++ }
++ @[ -z "$(findstring _bigflash,$@)" ] || \
++ { echo "#define CONFIG_FLASH_16MB" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 16 MB Flash, 16 MB RAM" ; \
++ echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
++ }
++ @[ -z "$(findstring _old,$@)" ] || \
++ { echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
++ echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 8 MB Flash, 16 MB RAM" ; \
++ echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_trab,$@) arm arm920t trab NULL s3c24x0
++
++VCMA9_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
++
++#########################################################################
++# ARM supplied Versatile development boards
++#########################################################################
++
++cm4008_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
++
++cm41xx_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
++
++versatile_config \
++versatileab_config \
++versatilepb_config : unconfig
++ @board/armltd/versatile/split_by_variant.sh $@
++
++voiceblue_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
++
++#########################################################################
++## S3C44B0 Systems
++#########################################################################
++
++B2_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm s3c44b0 B2 dave
++
++#########################################################################
++## ARM720T Systems
++#########################################################################
++
++armadillo_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm720t armadillo
++
++ep7312_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm720t ep7312
++
++impa7_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm720t impa7
++
++modnet50_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm720t modnet50
++
++evb4510_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm720t evb4510 NULL s3c4510b
++
++lpc2292sodimm_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm720t lpc2292sodimm NULL lpc2292
++
++SMN42_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm720t SMN42 siemens lpc2292
++
++#########################################################################
++## ARM CORTEX Systems
++#########################################################################
++
++devkit8000_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 devkit8000 timll omap3
++
++omap3_beagle_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 beagle ti omap3
++
++omap3_overo_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 overo NULL omap3
++
++omap3_evm_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 evm ti omap3
++
++omap3_pandora_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 pandora NULL omap3
++
++omap3_sdp3430_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 sdp3430 ti omap3
++
++omap3_zoom1_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 logicpd omap3
++
++omap3_zoom2_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 logicpd omap3
++
++smdkc100_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 smdkc100 samsung s5pc1xx
++
++#########################################################################
++## XScale Systems
++#########################################################################
++
++actux1_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm ixp actux1
++
++actux2_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm ixp actux2
++
++actux3_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm ixp actux3
++
++actux4_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm ixp actux4
++
++cerf250_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa cerf250
++
++cradle_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa cradle
++
++csb226_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa csb226
++
++delta_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa delta
++
++innokom_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa innokom
++
++ixdp425_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm ixp ixdp425
++
++ixdpg425_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm ixp ixdp425
++
++lubbock_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa lubbock
++
++pleb2_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa pleb2
++
++logodl_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa logodl
++
++pdnb3_config \
++scpu_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring scpu_,$@)" ] ; then \
++ echo "#define CONFIG_SCPU" >>$(obj)include/config.h ; \
++ $(XECHO) "... on SCPU board variant" ; \
++ fi
++ @$(MKCONFIG) -a pdnb3 arm ixp pdnb3 prodrive
++
++pxa255_idp_config: unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa pxa255_idp
++
++polaris_config \
++trizepsiv_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring polaris,$@)" ] ; then \
++ echo "#define CONFIG_POLARIS 1" >>$(obj)include/config.h ; \
++ fi;
++ @$(MKCONFIG) -a trizepsiv arm pxa trizepsiv
++
++wepep250_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa wepep250
++
++xaeniax_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa xaeniax
++
++xm250_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa xm250
++
++xsengine_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm pxa xsengine
++
++zylonite_config :
++ @$(MKCONFIG) $(@:_config=) arm pxa zylonite
++
++#########################################################################
++## ARM1136 Systems
++#########################################################################
++
++apollon_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
++ @$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
++ @echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
++
++imx31_litekit_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm1136 imx31_litekit logicpd mx31
++
++imx31_phycore_eet_config \
++imx31_phycore_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ -n "$(findstring _eet_,$@)" ]; then \
++ echo "#define CONFIG_IMX31_PHYCORE_EET" >> $(obj)include/config.h; \
++ fi
++ @$(MKCONFIG) -a imx31_phycore arm arm1136 imx31_phycore NULL mx31
++
++mx31ads_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
++
++mx31pdk_config \
++mx31pdk_nand_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ -n "$(findstring _nand_,$@)" ]; then \
++ echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h; \
++ else \
++ echo "#define CONFIG_SKIP_LOWLEVEL_INIT" >> $(obj)include/config.h; \
++ echo "#define CONFIG_SKIP_RELOCATE_UBOOT" >> $(obj)include/config.h; \
++ fi
++ @$(MKCONFIG) -a mx31pdk arm arm1136 mx31pdk freescale mx31
++
++omap2420h4_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 ti omap24xx
++
++qong_config : unconfig
++ @$(MKCONFIG) $(@:_config=) arm arm1136 qong davedenx mx31
++
++#########################################################################
++## ARM1176 Systems
++#########################################################################
++smdk6400_noUSB_config \
++smdk6400_config : unconfig
++ @mkdir -p $(obj)include $(obj)board/samsung/smdk6400
++ @mkdir -p $(obj)nand_spl/board/samsung/smdk6400
++ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
++ @if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then \
++ echo "RAM_TEXT = 0x57e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
++ $(MKCONFIG) $(@:_config=) arm arm1176 smdk6400 samsung s3c64xx; \
++ else \
++ echo "RAM_TEXT = 0xc7e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
++ $(MKCONFIG) $(@:_noUSB_config=) arm arm1176 smdk6400 samsung s3c64xx; \
++ fi
++ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
++
++#========================================================================
++# i386
++#========================================================================
++#########################################################################
++## AMD SC520 CDP
++#########################################################################
++eNET_config : unconfig
++ @$(MKCONFIG) $(@:_config=) i386 i386 eNET NULL sc520
++
++sc520_cdp_config : unconfig
++ @$(MKCONFIG) $(@:_config=) i386 i386 sc520_cdp NULL sc520
++
++sc520_spunk_config : unconfig
++ @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk NULL sc520
++
++sc520_spunk_rel_config : unconfig
++ @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk NULL sc520
++
++#========================================================================
++# MIPS
++#========================================================================
++#########################################################################
++## MIPS32 4Kc
++#########################################################################
++
++xtract_incaip = $(subst _100MHz,,$(subst _133MHz,,$(subst _150MHz,,$(subst _config,,$1))))
++
++incaip_100MHz_config \
++incaip_133MHz_config \
++incaip_150MHz_config \
++incaip_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _100MHz,$@)" ] || \
++ { echo "#define CPU_CLOCK_RATE 100000000" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 100MHz system clock" ; \
++ }
++ @[ -z "$(findstring _133MHz,$@)" ] || \
++ { echo "#define CPU_CLOCK_RATE 133000000" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 133MHz system clock" ; \
++ }
++ @[ -z "$(findstring _150MHz,$@)" ] || \
++ { echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h ; \
++ $(XECHO) "... with 150MHz system clock" ; \
++ }
++ @$(MKCONFIG) -a $(call xtract_incaip,$@) mips mips incaip
++
++tb0229_config: unconfig
++ @$(MKCONFIG) $(@:_config=) mips mips tb0229
++
++vct_premium_config \
++vct_premium_small_config \
++vct_premium_onenand_config \
++vct_premium_onenand_small_config \
++vct_platinum_config \
++vct_platinum_small_config \
++vct_platinum_onenand_config \
++vct_platinum_onenand_small_config \
++vct_platinumavc_config \
++vct_platinumavc_small_config \
++vct_platinumavc_onenand_config \
++vct_platinumavc_onenand_small_config: unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _premium,$@)" ] ; then \
++ echo "#define CONFIG_VCT_PREMIUM" > $(obj)include/config.h ; \
++ $(XECHO) "... on Premium board variant" ; \
++ fi
++ @if [ "$(findstring _platinum_,$@)" ] ; then \
++ echo "#define CONFIG_VCT_PLATINUM" > $(obj)include/config.h ; \
++ $(XECHO) "... on Platinum board variant" ; \
++ fi
++ @if [ "$(findstring _platinumavc,$@)" ] ; then \
++ echo "#define CONFIG_VCT_PLATINUMAVC" > $(obj)include/config.h ; \
++ $(XECHO) "... on PlatinumAVC board variant" ; \
++ fi
++ @if [ "$(findstring _onenand,$@)" ] ; then \
++ echo "#define CONFIG_VCT_ONENAND" >> $(obj)include/config.h ; \
++ $(XECHO) "... on OneNAND board variant" ; \
++ fi
++ @if [ "$(findstring _small,$@)" ] ; then \
++ echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h ; \
++ $(XECHO) "... stripped down image variant" ; \
++ fi
++ @$(MKCONFIG) -a vct mips mips vct micronas
++
++#########################################################################
++## MIPS32 AU1X00
++#########################################################################
++
++dbau1000_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
++
++dbau1100_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_DBAU1100 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
++
++dbau1500_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_DBAU1500 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
++
++dbau1550_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
++
++dbau1550_el_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
++
++gth2_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a gth2 mips mips gth2
++
++pb1000_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a pb1x00 mips mips pb1x00
++
++qemu_mips_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
++ @$(MKCONFIG) -a qemu-mips mips mips qemu-mips
++
++#########################################################################
++## MIPS64 5Kc
++#########################################################################
++
++purple_config : unconfig
++ @$(MKCONFIG) $(@:_config=) mips mips purple
++
++#========================================================================
++# Nios
++#========================================================================
++#########################################################################
++## Nios32
++#########################################################################
++
++ADNPESC1_DNPEVA2_base_32_config \
++ADNPESC1_base_32_config \
++ADNPESC1_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _DNPEVA2,$@)" ] || \
++ { echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... DNP/EVA2 configuration" ; \
++ }
++ @[ -z "$(findstring _base_32,$@)" ] || \
++ { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'base_32' configuration" ; \
++ }
++ @[ -z "$(findstring ADNPESC1_config,$@)" ] || \
++ { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
++ }
++ @$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
++
++DK1C20_safe_32_config \
++DK1C20_standard_32_config \
++DK1C20_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _safe_32,$@)" ] || \
++ { echo "#define CONFIG_NIOS_SAFE_32 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'safe_32' configuration" ; \
++ }
++ @[ -z "$(findstring _standard_32,$@)" ] || \
++ { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'standard_32' configuration" ; \
++ }
++ @[ -z "$(findstring DK1C20_config,$@)" ] || \
++ { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'standard_32' configuration (DEFAULT)" ; \
++ }
++ @$(MKCONFIG) -a DK1C20 nios nios dk1c20 altera
++
++DK1S10_safe_32_config \
++DK1S10_standard_32_config \
++DK1S10_mtx_ldk_20_config \
++DK1S10_config: unconfig
++ @mkdir -p $(obj)include
++ @[ -z "$(findstring _safe_32,$@)" ] || \
++ { echo "#define CONFIG_NIOS_SAFE_32 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'safe_32' configuration" ; \
++ }
++ @[ -z "$(findstring _standard_32,$@)" ] || \
++ { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'standard_32' configuration" ; \
++ }
++ @[ -z "$(findstring _mtx_ldk_20,$@)" ] || \
++ { echo "#define CONFIG_NIOS_MTX_LDK_20 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'mtx_ldk_20' configuration" ; \
++ }
++ @[ -z "$(findstring DK1S10_config,$@)" ] || \
++ { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... NIOS 'standard_32' configuration (DEFAULT)" ; \
++ }
++ @$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
++
++#########################################################################
++## Nios-II
++#########################################################################
++
++EP1C20_config : unconfig
++ @$(MKCONFIG) EP1C20 nios2 nios2 ep1c20 altera
++
++EP1S10_config : unconfig
++ @$(MKCONFIG) EP1S10 nios2 nios2 ep1s10 altera
++
++EP1S40_config : unconfig
++ @$(MKCONFIG) EP1S40 nios2 nios2 ep1s40 altera
++
++PK1C20_config : unconfig
++ @$(MKCONFIG) PK1C20 nios2 nios2 pk1c20 psyent
++
++PCI5441_config : unconfig
++ @$(MKCONFIG) PCI5441 nios2 nios2 pci5441 psyent
++
++#========================================================================
++## Microblaze
++#========================================================================
++
++microblaze-generic_config: unconfig
++ @mkdir -p $(obj)include
++ @$(MKCONFIG) -a $(@:_config=) microblaze microblaze microblaze-generic xilinx
++
++#========================================================================
++# Blackfin
++#========================================================================
++
++# Analog Devices boards
++BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \
++ bf537-pnav bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
++
++# Bluetechnix tinyboards
++BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf537u cm-bf548 cm-bf561 tcm-bf537
++
++# Misc third party boards
++BFIN_BOARDS += bf537-minotaur bf537-srv1 blackstamp
++
++# I-SYST Micromodule
++BFIN_BOARDS += ibf-dsp561
++
++$(BFIN_BOARDS:%=%_config) : unconfig
++ @$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
++
++#========================================================================
++# AVR32
++#========================================================================
++
++atngw100_config : unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
++
++atstk1002_config : unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
++
++atstk1003_config : unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
++
++atstk1004_config : unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
++
++atstk1006_config : unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
++
++favr-32-ezkit_config : unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap favr-32-ezkit earthlcd at32ap700x
++
++hammerhead_config : unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap hammerhead miromico at32ap700x
++
++mimc200_config : unconfig
++ @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 mimc at32ap700x
++
++#========================================================================
++# SH3 (SuperH)
++#========================================================================
++
++#########################################################################
++## sh2 (Renesas SuperH)
++#########################################################################
++rsk7203_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_RSK7203 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh2 rsk7203 renesas
++
++#########################################################################
++## sh3 (Renesas SuperH)
++#########################################################################
++
++mpr2_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh3 mpr2
++
++ms7720se_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_MS7720SE 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh3 ms7720se
++
++#########################################################################
++## sh4 (Renesas SuperH)
++#########################################################################
++
++MigoR_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh4 MigoR renesas
++
++ms7750se_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh4 ms7750se
++
++ms7722se_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
++
++r2dplus_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh4 r2dplus renesas
++
++r7780mp_config: unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh4 r7780mp renesas
++
++sh7763rdp_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh4 sh7763rdp renesas
++
++xtract_sh7785lcr = $(subst _32bit,,$(subst _config,,$1))
++sh7785lcr_32bit_config \
++sh7785lcr_config : unconfig
++ @mkdir -p $(obj)include
++ @mkdir -p $(obj)board/renesas/sh7785lcr
++ @echo "#define CONFIG_SH7785LCR 1" > $(obj)include/config.h
++ @if [ "$(findstring 32bit, $@)" ] ; then \
++ echo "#define CONFIG_SH_32BIT 1" >> $(obj)include/config.h ; \
++ echo "TEXT_BASE = 0x8ff80000" > \
++ $(obj)board/renesas/sh7785lcr/config.tmp ; \
++ $(XECHO) " ... enable 32-Bit Address Extended Mode" ; \
++ fi
++ @$(MKCONFIG) -a $(call xtract_sh7785lcr,$@) sh sh4 sh7785lcr renesas
++
++ap325rxa_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_AP325RXA 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh4 ap325rxa renesas
++
++espt_config : unconfig
++ @mkdir -p $(obj)include
++ @echo "#define CONFIG_ESPT 1" > $(obj)include/config.h
++ @$(MKCONFIG) -a $(@:_config=) sh sh4 espt
++
++#========================================================================
++# SPARC
++#========================================================================
++
++#########################################################################
++## LEON3
++#########################################################################
++
++# Gaisler GR-XC3S-1500 board
++gr_xc3s_1500_config : unconfig
++ @$(MKCONFIG) $(@:_config=) sparc leon3 gr_xc3s_1500 gaisler
++
++# Gaisler GR-CPCI-AX2000 board, a General purpose FPGA-AX system
++gr_cpci_ax2000_config : unconfig
++ @$(MKCONFIG) $(@:_config=) sparc leon3 gr_cpci_ax2000 gaisler
++
++# Gaisler GRLIB template design (GPL SPARC/LEON3) for Altera NIOS
++# Development board Stratix II edition, FPGA Device EP2S60.
++gr_ep2s60_config: unconfig
++ @$(MKCONFIG) $(@:_config=) sparc leon3 gr_ep2s60 gaisler
++
++# Gaisler LEON3 GRSIM simulator
++grsim_config : unconfig
++ @$(MKCONFIG) $(@:_config=) sparc leon3 grsim gaisler
++
++#########################################################################
++## LEON2
++#########################################################################
++
++# Gaisler LEON2 GRSIM simulator
++grsim_leon2_config : unconfig
++ @$(MKCONFIG) $(@:_config=) sparc leon2 grsim_leon2 gaisler
++
++#########################################################################
++#########################################################################
++#########################################################################
++
++clean:
++ @rm -f $(obj)examples/standalone/82559_eeprom \
++ $(obj)examples/standalone/atmel_df_pow2 \
++ $(obj)examples/standalone/eepro100_eeprom \
++ $(obj)examples/standalone/hello_world \
++ $(obj)examples/standalone/interrupt \
++ $(obj)examples/standalone/mem_to_mem_idma2intr \
++ $(obj)examples/standalone/sched \
++ $(obj)examples/standalone/smc91111_eeprom \
++ $(obj)examples/standalone/test_burst \
++ $(obj)examples/standalone/timer
++ @rm -f $(obj)examples/api/demo{,.bin}
++ @rm -f $(obj)tools/bmp_logo $(obj)tools/easylogo/easylogo \
++ $(obj)tools/env/{fw_printenv,fw_setenv} \
++ $(obj)tools/envcrc \
++ $(obj)tools/gdb/{astest,gdbcont,gdbsend} \
++ $(obj)tools/gen_eth_addr $(obj)tools/img2srec \
++ $(obj)tools/mkimage $(obj)tools/mpc86x_clk \
++ $(obj)tools/ncb $(obj)tools/ubsha1
++ @rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \
++ $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
++ $(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
++ $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
++ $(obj)lib_blackfin/u-boot.lds \
++ $(obj)u-boot.lds \
++ $(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
++ @rm -f $(obj)include/bmp_logo.h
++ @rm -f $(obj)nand_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,System.map}
++ @rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
++ @rm -f $(ONENAND_BIN)
++ @rm -f $(obj)onenand_ipl/u-boot.lds
++ @rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
++ @find $(OBJTREE) -type f \
++ \( -name 'core' -o -name '*.bak' -o -name '*~' \
++ -o -name '*.o' -o -name '*.a' -o -name '*.exe' \) -print \
++ | xargs rm -f
++
++clobber: clean
++ @find $(OBJTREE) -type f \( -name .depend \
++ -o -name '*.srec' -o -name '*.bin' -o -name u-boot.img \) \
++ -print0 \
++ | xargs -0 rm -f
++ @rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS \
++ $(obj)cscope.* $(obj)*.*~
++ @rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
++ @rm -f $(obj)u-boot.kwb
++ @rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes}
++ @rm -f $(obj)cpu/mpc824x/bedbug_603e.c
++ @rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
++ @[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
++ @[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f
++
++ifeq ($(OBJTREE),$(SRCTREE))
++mrproper \
++distclean: clobber unconfig
++else
++mrproper \
++distclean: clobber unconfig
++ rm -rf $(obj)*
++endif
++
++backup:
++ F=`basename $(TOPDIR)` ; cd .. ; \
++ gtar --force-local -zcvf `date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
++
++#########################################################################
+diff -Naur u-boot-2009.11/mkconfig u-boot-2009.11.new/mkconfig
+--- u-boot-2009.11/mkconfig 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11.new/mkconfig 2010-10-08 12:09:30.000000000 +0200
+@@ -74,6 +74,7 @@
+ echo "ARCH = $2" > config.mk
+ echo "CPU = $3" >> config.mk
+ echo "BOARD = $4" >> config.mk
++echo "BNAME = $1" >> config.mk
+
+ [ "$5" ] && [ "$5" != "NULL" ] && echo "VENDOR = $5" >> config.mk
+
+diff -Naur u-boot-2009.11.orig/board/in-circuit/icnova/icnova_arm.c u-boot-2009.11/board/in-circuit/icnova/icnova_arm.c
+--- u-boot-2009.11.orig/board/in-circuit/icnova/icnova_arm.c 2010-10-12 17:00:03.000000000 +0200
++++ u-boot-2009.11/board/in-circuit/icnova/icnova_arm.c 2011-01-04 12:01:10.000000000 +0100
+@@ -68,14 +68,19 @@
+ * ERXER (PA16) => no repeater
+ * ETXCLK (PA17) => no isolate
+ */
+- unsigned long phy_mask = pin_to_mask(AT91_PIN_PA15) |
++ unsigned long phy_mask = 0;
++ /* Reset and pdwn-pins */
++ unsigned long rst = pin_to_mask(AT91_PIN_PA27);
++ unsigned long pdwn = 0;
++#ifndef CONFIG_ICNOVA_SODIMM
++ phy_mask = pin_to_mask(AT91_PIN_PA15) |
+ pin_to_mask(AT91_PIN_PA8) | pin_to_mask(AT91_PIN_PA9) |
+ pin_to_mask(AT91_PIN_PA12) | pin_to_mask(AT91_PIN_PA13) |
+ pin_to_mask(AT91_PIN_PA29) | pin_to_mask(AT91_PIN_PA30) |
+ pin_to_mask(AT91_PIN_PA16) | pin_to_mask(AT91_PIN_PA17);
+- /* Reset and pdwn-pins */
+- unsigned long rst = pin_to_mask(AT91_PIN_PA26);
+- unsigned long pdwn = pin_to_mask(AT91_PIN_PA25);
++ rst = pin_to_mask(AT91_PIN_PA26);
++ pdwn = pin_to_mask(AT91_PIN_PA25);
++#endif
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_EMAC);
+
+@@ -218,14 +223,25 @@
+
+ #ifdef CONFIG_MMC
+ static void icnova_arm9_mmc_init(void) {
++#ifdef CONFIG_USE_MMC1
++ at91_set_A_periph(AT91_PIN_PA31, 0);
++ at91_set_A_periph(AT91_PIN_PA22, 1);
++ at91_set_A_periph(AT91_PIN_PA23, 1);
++ at91_set_A_periph(AT91_PIN_PA24, 1);
++ at91_set_A_periph(AT91_PIN_PA25, 1);
++ at91_set_A_periph(AT91_PIN_PA26, 1);
++#define MMC_ID AT91SAM9G45_ID_MCI1
++#else
+ at91_set_A_periph(AT91_PIN_PA0, 0);
+ at91_set_A_periph(AT91_PIN_PA1, 1);
+ at91_set_A_periph(AT91_PIN_PA2, 1);
+ at91_set_A_periph(AT91_PIN_PA3, 1);
+ at91_set_A_periph(AT91_PIN_PA4, 1);
+ at91_set_A_periph(AT91_PIN_PA5, 1);
++#define MMC_ID AT91SAM9G45_ID_MCI0
++#endif
+
+- at91_sys_write(AT91_PMC_PCER, 1<<AT91SAM9G45_ID_MCI0);
++ at91_sys_write(AT91_PMC_PCER, 1<<MMC_ID);
+ }
+
+ int board_mmc_init(bd_t *bd) {
+diff -Naur u-boot-2009.11.orig/cpu/arm926ejs/at91/at91sam9m10g45_devices.c u-boot-2009.11/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
+--- u-boot-2009.11.orig/cpu/arm926ejs/at91/at91sam9m10g45_devices.c 2010-10-12 17:00:03.000000000 +0200
++++ u-boot-2009.11/cpu/arm926ejs/at91/at91sam9m10g45_devices.c 2011-01-04 11:57:33.000000000 +0100
+@@ -180,7 +180,9 @@
+ at91_set_B_periph(AT91_PIN_PA28, 0); /* ERXCK */
+ at91_set_B_periph(AT91_PIN_PA6, 0); /* ETX2 */
+ at91_set_B_periph(AT91_PIN_PA7, 0); /* ETX3 */
++#ifndef CONFIG_ICNOVA_SODIMM
+ at91_set_B_periph(AT91_PIN_PA27, 0); /* ETXER */
+ #endif
++#endif
+ }
+ #endif
+diff -Naur u-boot-2009.11.orig/drivers/net/macb.c u-boot-2009.11/drivers/net/macb.c
+--- u-boot-2009.11.orig/drivers/net/macb.c 2009-12-15 23:20:54.000000000 +0100
++++ u-boot-2009.11/drivers/net/macb.c 2010-10-18 13:56:31.000000000 +0200
+@@ -334,7 +334,7 @@
+ }
+
+ /* PHY isn't up to snuff */
+- printf("%s: PHY not found", macb->netdev.name);
++ printf("%s: PHY not found\n", macb->netdev.name);
+
+ return 0;
+ }
+diff -Naur u-boot-2009.11.orig/include/configs/icnova/mmc.h u-boot-2009.11/include/configs/icnova/mmc.h
+--- u-boot-2009.11.orig/include/configs/icnova/mmc.h 2010-10-12 17:00:04.000000000 +0200
++++ u-boot-2009.11/include/configs/icnova/mmc.h 2010-12-17 13:34:17.000000000 +0100
+@@ -19,7 +19,11 @@
+ #define CONFIG_GENERIC_MMC 1
+ #define CONFIG_GENERIC_ATMEL_MCI 1
+ /*change this for your cpu */
++#ifdef CONFIG_USE_MMC1
++#define MMCI_BASE 0xFFFD0000
++#else
+ #define MMCI_BASE 0xFFF80000
++#endif
+ #else
+ #define CONFIG_ATMEL_MCI 1
+ #endif
+diff -Naur u-boot-2009.11.orig/include/configs/icnova/mmcupdate.h u-boot-2009.11/include/configs/icnova/mmcupdate.h
+--- u-boot-2009.11.orig/include/configs/icnova/mmcupdate.h 2010-10-12 17:00:04.000000000 +0200
++++ u-boot-2009.11/include/configs/icnova/mmcupdate.h 2011-01-04 11:55:50.000000000 +0100
+@@ -10,7 +10,11 @@
+
+ //#define MMCUPDATE_BOOTARGS CONFIG_BOOTARGS
+ //#define MMCUPDATE_BOOTCOMMAND CONFIG_BOOTCOMMAND
+-#define MMCUPDATE_BOOTARGS "rootfstype=ubifs root=ubi0:root ubi.mtd=2"
++#ifndef CONFIG_ICNOVA_UBI_MTD
++#define CONFIG_ICNOVA_UBI_MTD "2"
++#endif
++
++#define MMCUPDATE_BOOTARGS "rootfstype=ubifs root=ubi0:root ubi.mtd=" CONFIG_ICNOVA_UBI_MTD
+ #define MMCUPDATE_BOOTCOMMAND "mtdparts default; nand read "MMCUPDATE_UADDRESS" nand0,0; bootm"
+
+ #undef CONFIG_BOOTARGS
+diff -Naur u-boot-2009.11.orig/include/configs/icnova/nand_arm9.h u-boot-2009.11/include/configs/icnova/nand_arm9.h
+--- u-boot-2009.11.orig/include/configs/icnova/nand_arm9.h 2010-10-12 17:00:04.000000000 +0200
++++ u-boot-2009.11/include/configs/icnova/nand_arm9.h 2011-01-04 11:53:18.000000000 +0100
+@@ -10,7 +10,12 @@
+ #define CFG_NAND_ALE 21
+ #define CFG_NAND_CLE 22
+
++#ifdef CONFIG_ICNOVA_SODIMM
++#define CFG_NAND_CE AT91_PIN_PC14
++#define CFG_NAND_RDY AT91_PIN_PC8
++#else
+ #define CFG_NAND_CE AT91_PIN_PC8
+ #define CFG_NAND_RDY AT91_PIN_PC11
++#endif
+
+ #endif
+diff -Naur u-boot-2009.11.orig/include/configs/icnova_arm9sodimm.h u-boot-2009.11/include/configs/icnova_arm9sodimm.h
+--- u-boot-2009.11.orig/include/configs/icnova_arm9sodimm.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11/include/configs/icnova_arm9sodimm.h 2011-01-04 11:53:10.000000000 +0100
+@@ -0,0 +1,24 @@
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#define CONFIG_ICNOVA_ARM9
++#define CONFIG_ICNOVA_SODIMM
++#define CONFIG_USE_MMC1
++#define CONFIG_ICNOVA_UBI_MTD "1"
++
++#include <configs/icnova/base.h>
++#include <configs/icnova/arm400MHz.h>
++#include <configs/icnova/mmc.h>
++#include <configs/icnova/flash2x8.h>
++#include <configs/icnova/nand_arm9.h>
++#include <configs/icnova/net.h>
++#define CONFIG_MACB_SEARCH_PHY
++#include <configs/icnova/usart3.h> // DBGU
++#include <configs/icnova/mmcupdate.h>
++//#include <configs/icnova/lcd320_240.h>
++//#include <configs/icnova/usb.h>
++
++#undef MTDPARTS_DEFAULT
++#define MTDPARTS_DEFAULT "mtdparts=nand.0:4M(kernel),-(root)"
++
++#endif
+diff -Naur u-boot-2009.11.orig/Makefile u-boot-2009.11/Makefile
+--- u-boot-2009.11.orig/Makefile 2010-10-12 17:00:04.000000000 +0200
++++ u-boot-2009.11/Makefile 2011-01-04 11:49:12.000000000 +0100
+@@ -3590,7 +3590,7 @@
+ $(ICNOVA_BOARDS:%=icnova_%_config): unconfig
+ @$(MKCONFIG) $(@:_config=) avr32 at32ap icnova in-circuit at32ap700x
+
+-ICNOVA_ARM_BOARDS = arm9oem arm9oem_u4
++ICNOVA_ARM_BOARDS = arm9oem arm9oem_u4 arm9sodimm
+ $(ICNOVA_ARM_BOARDS:%=icnova_%_config): unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs icnova in-circuit at91
+
+diff -Naur u-boot-2009.11.orig/board/in-circuit/icnova/Makefile.icnova_arm9sodimm u-boot-2009.11/board/in-circuit/icnova/Makefile.icnova_arm9sodimm
+--- u-boot-2009.11.orig/board/in-circuit/icnova/Makefile.icnova_arm9sodimm 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-2009.11/board/in-circuit/icnova/Makefile.icnova_arm9sodimm 2011-01-04 12:47:26.000000000 +0100
+@@ -0,0 +1,6 @@
++
++COBJS := $(BOARD)_$(ARCH).o flash2x8.o
++ifdef CONFIG_CMD_NAND
++COBJS += at91_nand.o
++endif
++
DEFAULT_PREFERENCE_at91sam9m10ekes = "2"
DEFAULT_PREFERENCE_at91sam9m10g45ek = "2"
DEFAULT_PREFERENCE_at91sam9g45ek = "2"
-DEFAULT_PREFERENCE_at91sam9g45ekes = "2"
+DEFAULT_PREFERENCE_adb4000 = "2"
SRC_URI = "ftp://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2 "
SRC_URI_append_at91 = "\
- file://at91/0002-Support-running-ATSAM9G45-M10-from-dataflash.patch;patch=1 \
- file://at91/0003-Update-SAM9M10-G45-config-for-dataflash-support.patch;patch=1 \
- file://at91/0004-Support-selecting-SPI-mode-in-dataflash-driver.patch;patch=1 \
- file://at91/0005-mux-replace-verbose-dataflash_mmc_mux-command.patch;patch=1 \
- file://at91/0006-libarm-board.c-Gets-overwritten-workaround.patch;patch=1 \
- file://at91/0007-fat.c-Add-DEBUG-currently-disabled.patch;patch=1 \
- file://at91/0008-env_dataflash.c-More-robust-handling.patch;patch=1 \
- file://at91/0009-cmd_debug.c-Add-a-generic-function-for-debug-vars.patch;patch=1 \
- file://at91/0010-debug.h-Add-header-for-debug-variables.patch;patch=1 \
- file://at91/0011-common-Makefile-Add-cmd_debug.c-to-build.patch;patch=1 \
- file://at91/0012-cmd_mci.c-Support-writing-out-AT91-mci-config.patch;patch=1 \
- file://at91/0013-atmel_dataflash.c-Status-printout-depend-on-DEBUG.patch;patch=1 \
- file://at91/0014-AT91-MCI-Add-support-for-SD-Card.patch;patch=1 \
- file://at91/0015-sam9m10g45ek-Add-configuration-file.patch;patch=1 \
+ file://at91/0002-Support-running-ATSAM9G45-M10-from-dataflash.patch \
+ file://at91/0003-Update-SAM9M10-G45-config-for-dataflash-support.patch \
+ file://at91/0004-Support-selecting-SPI-mode-in-dataflash-driver.patch \
+ file://at91/0005-mux-replace-verbose-dataflash_mmc_mux-command.patch \
+ file://at91/0006-libarm-board.c-Gets-overwritten-workaround.patch \
+ file://at91/0007-fat.c-Add-DEBUG-currently-disabled.patch \
+ file://at91/0008-env_dataflash.c-More-robust-handling.patch \
+ file://at91/0009-cmd_debug.c-Add-a-generic-function-for-debug-vars.patch \
+ file://at91/0010-debug.h-Add-header-for-debug-variables.patch \
+ file://at91/0011-common-Makefile-Add-cmd_debug.c-to-build.patch \
+ file://at91/0012-cmd_mci.c-Support-writing-out-AT91-mci-config.patch \
+ file://at91/0013-atmel_dataflash.c-Status-printout-depend-on-DEBUG.patch \
+ file://at91/0014-AT91-MCI-Add-support-for-SD-Card.patch \
+ file://at91/0015-sam9m10g45ek-Add-configuration-file.patch \
+ "
+
+SRC_URI_append_adb4000 = "\
+ file://at91/100-icnova.patch \
"
TARGET_LDFLAGS = ""
git.openpandora.org / openembedded.git / commitdiff