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ARM: sh7372: fix cache clean / invalidate order
author
Guennadi Liakhovetski
<g.liakhovetski@gmx.de>
Fri, 28 Dec 2012 11:32:54 +0000
(12:32 +0100)
committer
Simon Horman
<horms+renesas@verge.net.au>
Fri, 25 Jan 2013 03:43:45 +0000
(12:43 +0900)
According to the Cortex A8 TRM the L2 cache should be first cleaned and
then disabled. Fix the swapped order on sh7372.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
No differences found