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clk: sunxi: Add support for PLL6 on the A31
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 5 Feb 2014 13:05:03 +0000 (14:05 +0100)
committerEmilio López <emilio@elopez.com.ar>
Tue, 18 Feb 2014 12:45:13 +0000 (09:45 -0300)
The A31 has a slightly different PLL6 clock. Add support for this new clock in
our driver.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Emilio López <emilio@elopez.com.ar>

No differences found
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