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drm/radeon: enable gfx cgcg on CIK dGPUs
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 19 Dec 2013 14:13:30 +0000 (09:13 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 24 Dec 2013 22:57:20 +0000 (17:57 -0500)
Enable coarse grained clockgating on CIK dGPUs.  This
works properly now that smc is initialized earlier than
the rlc and cp.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

No differences found
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