arm64: Provide read/write fault information in compat signal handlers
authorCatalin Marinas <catalin.marinas@arm.com>
Sun, 6 Apr 2014 22:04:12 +0000 (23:04 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 9 May 2014 14:47:47 +0000 (15:47 +0100)
For AArch32, bit 11 (WnR) of the FSR/ESR register is set when the fault
was caused by a write access and applications like Qemu rely on such
information being provided in sigcontext. This patch introduces the
ESR_EL1 tracking for the arm64 kernel faults and sets bit 11 accordingly
in compat sigcontext.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

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