sunxi: clock: H6: drop usage of struct sunxi_prcm_reg

U-Boot drivers often revert to using C structures for modelling hardware
register frames. This creates some problems:
- A "struct" is a C language construct to group several variables
  together. The details of the layout of this struct are partly subject
  to the compiler's discretion (padding and alignment).
- The "packed" attribute would force a certain layout, but we are not
  using it.
- The actual source of information from the data sheet is the register
  offset. Here we create an artificial struct, carefully tuning the
  layout (with a lot of reserved members) to match that offset. To help
  with correctness, we put the desired information as a *comment*,
  though this is purely for the human reader, and has no effect on the
  generated layout. This sounds all very backwards.
- Using a struct suggests we can assign a pointer and then access the
  register content via the members. But this is not the case, instead
  every MMIO register access must go through specific accessor functions,
  to meet the ordering and access size guarantees the hardware requires.
- We share those structs in code shared across multiple SoC families,
  though most SoCs define their own version of the struct. Members must
  match in their name, across every SoC, otherwise compilation will fail.
  We work around this with even more #ifdefs in the shared code.
- Some SoCs have an *almost* identical layout, but differ in a few
  registers. This requires hard to maintain #ifdef's in the struct
  definition.
- Some of the register frames are huge: the H6 CCU device defines 127
  registers. We use 15 of them. Still the whole frame would need to be
  described, which is very tedious, but for no reason.
- Adding a new SoC often forces people to decide whether to share an
  existing struct, or to create a new copy. For some cases (say like 80%
  similarity) this works out badly either way.

The Linux kernel heavily frowns upon those register structs, and instead
uses a much simpler solution: #define REG_NAME  <offset>
This easily maps to the actual information from the data sheet, and can
much simpler be shared across multiple SoCs, as it allows to have all
SoC versions visible, so we can use C "if" statements instead of #ifdef's.
Also it requires to just define the registers we need, and we can use
alternative locations for some registers much more easily.

Drop the usage of "struct sunxi_prcm_reg" in the H6 SPL clock code, by
defining the respective register names and their offsets, then adding
them to the base pointer.
We cannot drop the struct definition quite yet, as it's also used in
other drivers, still.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/arch/arm/include/asm/arch-sunxi/prcm_sun50i.h b/arch/arm/include/asm/arch-sunxi/prcm_sun50i.h
index fd63d3a..8ed78dc 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/prcm_sun50i.h
+++ b/arch/arm/include/asm/arch-sunxi/prcm_sun50i.h
@@ -11,6 +11,11 @@
 #ifndef __ASSEMBLY__
 #include <linux/compiler.h>
 
+#define CCU_PRCM_I2C_GATE_RESET                0x19c
+#define CCU_PRCM_PLL_LDO_CFG           0x244
+#define CCU_PRCM_SYS_PWROFF_GATING     0x250
+#define CCU_PRCM_RES_CAL_CTRL          0x310
+
 struct sunxi_prcm_reg {
        u32 cpus_cfg;           /* 0x000 */
        u8 res0[0x8];           /* 0x004 */

diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c
index 5ad6aba..4c522f6 100644 (file)
--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c
@@ -7,26 +7,25 @@
 void clock_init_safe(void)
 {
        void *const ccm = (void *)SUNXI_CCM_BASE;
-       struct sunxi_prcm_reg *const prcm =
-               (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
+       void *const prcm = (void *)SUNXI_PRCM_BASE;
 
        if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) {
                /* this seems to enable PLLs on H616 */
-               setbits_le32(&prcm->sys_pwroff_gating, 0x10);
-               setbits_le32(&prcm->res_cal_ctrl, 2);
+               setbits_le32(prcm + CCU_PRCM_SYS_PWROFF_GATING, 0x10);
+               setbits_le32(prcm + CCU_PRCM_RES_CAL_CTRL, 2);
        }
 
        if (IS_ENABLED(CONFIG_MACH_SUN50I_H616) ||
            IS_ENABLED(CONFIG_MACH_SUN50I_H6)) {
-               clrbits_le32(&prcm->res_cal_ctrl, 1);
-               setbits_le32(&prcm->res_cal_ctrl, 1);
+               clrbits_le32(prcm + CCU_PRCM_RES_CAL_CTRL, 1);
+               setbits_le32(prcm + CCU_PRCM_RES_CAL_CTRL, 1);
        }
 
        if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) {
                /* set key field for ldo enable */
-               setbits_le32(&prcm->pll_ldo_cfg, 0xA7000000);
+               setbits_le32(prcm + CCU_PRCM_PLL_LDO_CFG, 0xA7000000);
                /* set PLL VDD LDO output to 1.14 V */
-               setbits_le32(&prcm->pll_ldo_cfg, 0x60000);
+               setbits_le32(prcm + CCU_PRCM_PLL_LDO_CFG, 0x60000);
        }
 
        clock_set_pll1(408000000);
@@ -105,8 +104,7 @@ void clock_set_pll1(unsigned int clk)
 int clock_twi_onoff(int port, int state)
 {
        void *const ccm = (void *)SUNXI_CCM_BASE;
-       struct sunxi_prcm_reg *const prcm =
-               (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
+       void *const prcm = (void *)SUNXI_PRCM_BASE;
        u32 value, *ptr;
        int shift;
 
@@ -114,7 +112,7 @@ int clock_twi_onoff(int port, int state)
 
        if (port == 5) {
                shift = 0;
-               ptr = &prcm->twi_gate_reset;
+               ptr = prcm + CCU_PRCM_I2C_GATE_RESET;
        } else {
                shift = port;
                ptr = ccm + CCU_H6_I2C_GATE_RESET;