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drm/i915/skl: Update in Gen9 multi-engine forcewake range
authorAkash Goel <akash.goel@intel.com>
Tue, 25 Nov 2014 06:59:00 +0000 (12:29 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 3 Dec 2014 08:29:41 +0000 (09:29 +0100)
Updates in forcewake range for Render/Media/Common
power wells for Gen9.

Signed-off-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Zhe Wang <zhe1.wang@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

No differences found
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