clk: imx: Pass struct udevice into imx_clk_pllv3*()

Pass struct udevice * into imx_clk_pllv3*() functions, so the
clock core would have access to parent struct udevice *.

Signed-off-by: Marek Vasut <marex@denx.de>

diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index d9eb43d..8327aea 100644 (file)
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -46,10 +46,10 @@ static int imx6q_clk_probe(struct udevice *dev)
        base = (void *)ANATOP_BASE_ADDR;
 
        clk_dm(IMX6QDL_CLK_PLL2,
-              imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2_bus", "osc",
+              imx_clk_pllv3(dev, IMX_PLLV3_GENERIC, "pll2_bus", "osc",
                             base + 0x30, 0x1));
        clk_dm(IMX6QDL_CLK_PLL3_USB_OTG,
-              imx_clk_pllv3(IMX_PLLV3_USB, "pll3_usb_otg", "osc",
+              imx_clk_pllv3(dev, IMX_PLLV3_USB, "pll3_usb_otg", "osc",
                             base + 0x10, 0x3));
        clk_dm(IMX6QDL_CLK_PLL3_60M,
               imx_clk_fixed_factor("pll3_60m",  "pll3_usb_otg",   1, 8));
@@ -58,7 +58,7 @@ static int imx6q_clk_probe(struct udevice *dev)
        clk_dm(IMX6QDL_CLK_PLL2_PFD2_396M,
               imx_clk_pfd("pll2_pfd2_396m", "pll2_bus", base + 0x100, 2));
        clk_dm(IMX6QDL_CLK_PLL6,
-              imx_clk_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3));
+              imx_clk_pllv3(dev, IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3));
        clk_dm(IMX6QDL_CLK_PLL6_ENET,
               imx_clk_gate(dev, "pll6_enet", "pll6", base + 0xe0, 13));
 

diff --git a/drivers/clk/imx/clk-imxrt1020.c b/drivers/clk/imx/clk-imxrt1020.c
index 40cba21..62c00ba 100644 (file)
--- a/drivers/clk/imx/clk-imxrt1020.c
+++ b/drivers/clk/imx/clk-imxrt1020.c
@@ -38,10 +38,10 @@ static int imxrt1020_clk_probe(struct udevice *dev)
        base = (void *)ofnode_get_addr(ofnode_by_compatible(ofnode_null(), "fsl,imxrt-anatop"));
 
        clk_dm(IMXRT1020_CLK_PLL2_SYS,
-              imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2_sys", "osc",
+              imx_clk_pllv3(dev, IMX_PLLV3_GENERIC, "pll2_sys", "osc",
                             base + 0x30, 0x1));
        clk_dm(IMXRT1020_CLK_PLL3_USB_OTG,
-              imx_clk_pllv3(IMX_PLLV3_USB, "pll3_usb_otg", "osc",
+              imx_clk_pllv3(dev, IMX_PLLV3_USB, "pll3_usb_otg", "osc",
                             base + 0x10, 0x1));
 
        /* PLL bypass out */

diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index 71d5fa8..02f7b05 100644 (file)
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -49,17 +49,17 @@ static int imxrt1050_clk_probe(struct udevice *dev)
                           pll_ref_sels, ARRAY_SIZE(pll_ref_sels)));
 
        clk_dm(IMXRT1050_CLK_PLL1_ARM,
-              imx_clk_pllv3(IMX_PLLV3_SYS, "pll1_arm", "pll1_arm_ref_sel",
+              imx_clk_pllv3(dev, IMX_PLLV3_SYS, "pll1_arm", "pll1_arm_ref_sel",
                             base + 0x0, 0x7f));
        clk_dm(IMXRT1050_CLK_PLL2_SYS,
-              imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2_sys", "pll2_sys_ref_sel",
+              imx_clk_pllv3(dev, IMX_PLLV3_GENERIC, "pll2_sys", "pll2_sys_ref_sel",
                             base + 0x30, 0x1));
        clk_dm(IMXRT1050_CLK_PLL3_USB_OTG,
-              imx_clk_pllv3(IMX_PLLV3_USB, "pll3_usb_otg",
+              imx_clk_pllv3(dev, IMX_PLLV3_USB, "pll3_usb_otg",
                             "pll3_usb_otg_ref_sel",
                             base + 0x10, 0x1));
        clk_dm(IMXRT1050_CLK_PLL5_VIDEO,
-              imx_clk_pllv3(IMX_PLLV3_AV, "pll5_video", "pll5_video_ref_sel",
+              imx_clk_pllv3(dev, IMX_PLLV3_AV, "pll5_video", "pll5_video_ref_sel",
                             base + 0xa0, 0x7f));
 
        /* PLL bypass out */

diff --git a/drivers/clk/imx/clk-imxrt1170.c b/drivers/clk/imx/clk-imxrt1170.c
index 7e06504..caf34a5 100644 (file)
--- a/drivers/clk/imx/clk-imxrt1170.c
+++ b/drivers/clk/imx/clk-imxrt1170.c
@@ -121,13 +121,13 @@ static int imxrt1170_clk_probe(struct udevice *dev)
               imx_clk_fixed_factor("rcosc48M_div2",  "rcosc48M", 1, 2));
 
        clk_dm(IMXRT1170_CLK_PLL_ARM,
-              imx_clk_pllv3(IMX_PLLV3_SYS, "pll_arm", "osc",
+              imx_clk_pllv3(dev, IMX_PLLV3_SYS, "pll_arm", "osc",
                             base + 0x200, 0xff));
        clk_dm(IMXRT1170_CLK_PLL3,
-              imx_clk_pllv3(IMX_PLLV3_GENERICV2, "pll3_sys", "osc",
+              imx_clk_pllv3(dev, IMX_PLLV3_GENERICV2, "pll3_sys", "osc",
                             base + 0x210, 1));
        clk_dm(IMXRT1170_CLK_PLL2,
-              imx_clk_pllv3(IMX_PLLV3_GENERICV2, "pll2_sys", "osc",
+              imx_clk_pllv3(dev, IMX_PLLV3_GENERICV2, "pll2_sys", "osc",
                             base + 0x240, 1));
 
        clk_dm(IMXRT1170_CLK_PLL3_PFD0,

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index c6692f2..bc99163 100644 (file)
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -281,9 +281,9 @@ static const struct clk_ops clk_pllv3_enet_ops = {
        .get_rate       = clk_pllv3_enet_get_rate,
 };
 
-struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
-                         const char *parent_name, void __iomem *base,
-                         u32 div_mask)
+struct clk *imx_clk_pllv3(struct udevice *dev, enum imx_pllv3_type type,
+                         const char *name, const char *parent_name,
+                         void __iomem *base, u32 div_mask)
 {
        struct clk_pllv3 *pll;
        struct clk *clk;

diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 1a814d9..4caf3b0 100644 (file)
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -83,9 +83,9 @@ struct clk *clk_register_gate2(struct udevice *dev, const char *name,
                void __iomem *reg, u8 bit_idx, u8 cgr_val,
                u8 clk_gate_flags, unsigned int *share_count);
 
-struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
-                         const char *parent_name, void __iomem *base,
-                         u32 div_mask);
+struct clk *imx_clk_pllv3(struct udevice *dev, enum imx_pllv3_type type,
+                         const char *name, const char *parent_name,
+                         void __iomem *base, u32 div_mask);
 
 static inline struct clk *imx_clk_gate2(struct udevice *dev, const char *name,
                                        const char *parent, void __iomem *reg,