board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
authorGarrett Giordano <ggiordano@phytec.com>
Tue, 12 Nov 2024 20:40:23 +0000 (12:40 -0800)
committerTom Rini <trini@konsulko.com>
Wed, 4 Dec 2024 20:04:08 +0000 (14:04 -0600)
Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.

Also enable the feature by default for PHYCORE_AM62X_R5.

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
arch/arm/mach-k3/am62x/Kconfig
board/phytec/common/k3/Kconfig [new file with mode: 0644]
board/phytec/common/k3/Makefile
board/phytec/phycore_am62x/Kconfig

index 8b0cdd7..81199ad 100644 (file)
@@ -42,6 +42,7 @@ config TARGET_PHYCORE_AM62X_R5
        select SPL_RAM
        select K3_DDRSS
        select BINMAN
+       select PHYTEC_K3_DDR_PATCH
        imply SYS_K3_SPL_ATF
 
 config TARGET_VERDIN_AM62_A53
diff --git a/board/phytec/common/k3/Kconfig b/board/phytec/common/k3/Kconfig
new file mode 100644 (file)
index 0000000..282f4b7
--- /dev/null
@@ -0,0 +1,5 @@
+config PHYTEC_K3_DDR_PATCH
+       bool "Patch DDR timings on PHYTEC K3 SoMs"
+       help
+          Allow to override default DDR timings prior to
+          DDRSS driver probing.
index 40e91a4..6861c70 100644 (file)
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0+
 obj-y += board.o
-obj-$(CONFIG_K3_DDRSS) += k3_ddrss_patch.o
+obj-$(CONFIG_PHYTEC_K3_DDR_PATCH) += k3_ddrss_patch.o
index 7c179ef..ecee587 100644 (file)
@@ -33,6 +33,7 @@ config SPL_LDSCRIPT
        default "arch/arm/mach-omap2/u-boot-spl.lds"
 
 source "board/phytec/common/Kconfig"
+source "board/phytec/common/k3/Kconfig"
 
 endif