cxgb3: fix Gen2 pci default settings
authorDivy Le Ray <divy@chelsio.com>
Thu, 30 Jul 2009 21:23:39 +0000 (21:23 +0000)
committerDavid S. Miller <davem@davemloft.net>
Sun, 2 Aug 2009 19:23:40 +0000 (12:23 -0700)
Modify control register settings to accommodate the bridge's max read
requset size.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

No differences found