ASoC: fsl-spdif: big-endian support
authorXiubo Li <Li.Xiubo@freescale.com>
Tue, 11 Feb 2014 07:42:48 +0000 (15:42 +0800)
committerMark Brown <broonie@linaro.org>
Wed, 12 Feb 2014 15:31:45 +0000 (15:31 +0000)
For most platforms, the CPU and SPDIF device is in the same endianess
mode. While for the LS1 platform, the CPU is in LE mode and the SPDIF
is in BE mode.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

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