ARM: 6381/1: Use lazy cache flushing on ARMv7 SMP systems
authorCatalin Marinas <catalin.marinas@arm.com>
Mon, 13 Sep 2010 14:58:37 +0000 (15:58 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 19 Sep 2010 11:17:45 +0000 (12:17 +0100)
ARMv7 processors like Cortex-A9 broadcast the cache maintenance
operations in hardware. This patch allows the
flush_dcache_page/update_mmu_cache pair to work in lazy flushing mode
similar to the UP case.

Note that cache flushing on SMP systems now takes place via the
set_pte_at() call (__sync_icache_dcache) and there is no race with other
CPUs executing code from the new PTE before the cache flushing took
place.

Tested-by: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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