ixgbe: Fix disabling of relaxed ordering with Tx DCA
authorPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Wed, 30 Sep 2009 12:07:16 +0000 (12:07 +0000)
committerDavid S. Miller <davem@davemloft.net>
Thu, 1 Oct 2009 03:02:52 +0000 (20:02 -0700)
82599 has a different register offset for the Tx DCA control registers.
We disable relaxed ordering of the descriptor writebacks for Tx head
writeback, but didn't disable it properly for 82599.  However, this
shouldn't be a visible issue, since ixgbe doesn't use Tx head writeback.
This patch just makes sure we're not doing blind writes to offsets we
don't expect.

Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

No differences found