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soc/tegra: fuse: Add spare bit offset for Tegra124
authorThierry Reding <treding@nvidia.com>
Mon, 4 May 2015 14:44:29 +0000 (16:44 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 16 Jul 2015 08:38:31 +0000 (10:38 +0200)
The offset of the first spare bit register on Tegra124 is 0x300, but
account for the fixed offset of 0x100 in the fuse accessor.

Signed-off-by: Thierry Reding <treding@nvidia.com>

No differences found
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