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x86/iommu: correct ICS register offset
author
Li, Zhen-Hua
<zhen-hual@hp.com>
Fri, 13 Sep 2013 06:27:32 +0000
(14:27 +0800)
committer
Joerg Roedel
<joro@8bytes.org>
Tue, 24 Sep 2013 11:04:07 +0000
(13:04 +0200)
According to Intel Vt-D specs, the offset of Invalidation complete
status register should be 0x9C, not 0x98.
See Intel's VT-d spec, Revision 1.3, Chapter 10.4, Page 98;
Signed-off-by: Li, Zhen-Hua <zhen-hual@hp.com>
Signed-off-by: Joerg Roedel <joro@8bytes.org>
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git.openpandora.org / pandora-kernel.git / commitdiff