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usb: phy: omap-usb3: updated dpll M,N values to support DRA7xx devices
authorRuchika Kharwar <ruchika@ti.com>
Thu, 30 May 2013 19:54:09 +0000 (14:54 -0500)
committerFelipe Balbi <balbi@ti.com>
Fri, 31 May 2013 21:22:49 +0000 (00:22 +0300)
Addition of the M and N recommended values for the USB3 PHY DPLL.
Sysclk for DRA7xx is 20MHz.

This yields:
Clk = 20MHz * M/(N+1) = 20MHz * 1000 /(7+1) = 2.5 Ghz

Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

No differences found
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