ARM: OMAP: Change to use CM offsets for clocks for multi-omap

Change to use CM offsets for clocks for multi-omap

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 84a0d10..ae36437 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -94,6 +94,7 @@ static void omap2_disable_osc_ck(struct clk *clk)
 static int omap2_clk_fixed_enable(struct clk *clk)
 {
        u32 cval, apll_mask;
+       void __iomem *idlest;
 
        apll_mask = EN_APLL_LOCKED << clk->enable_bit;
 
@@ -111,8 +112,14 @@ static int omap2_clk_fixed_enable(struct clk *clk)
        else if (clk == &apll54_ck)
                cval = OMAP24XX_ST_54M_APLL;
 
-       omap2_wait_clock_ready(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval,
-                           clk->name);
+       if (cpu_is_omap242x())
+               idlest = (__force void __iomem *)OMAP2420_CM_REGADDR(PLL_MOD,
+                                                               CM_IDLEST);
+       else
+               idlest = (__force void __iomem *)OMAP2430_CM_REGADDR(PLL_MOD,
+                                                               CM_IDLEST);
+
+       omap2_wait_clock_ready(idlest, cval, clk->name);
 
        /*
         * REVISIT: Should we return an error code if omap2_wait_clock_ready()

diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index c4a56d9..39b654f 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -600,6 +600,11 @@ static struct prcm_config rate_table[] = {
        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 };
 
+/*
+ * Since 2420 and 2430 have different cm_base, we use offsets only here.
+ * Clock code will rewrite the register address as needed.
+ */
+#define _CM_REG_OFFSET(module, reg)    ((void __iomem *)(module) + (reg))
 #define _GR_MOD_OFFSET(reg)    ((void __iomem*)(OMAP24XX_GR_MOD + (reg)))
 
 /*-------------------------------------------------------------------------
@@ -672,7 +677,7 @@ static struct clk alt_ck = {                /* Typical 54M or 48M, may not exist */
  */
 
 static struct dpll_data dpll_dd = {
-       .mult_div1_reg          = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
+       .mult_div1_reg          = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
        .mult_mask              = OMAP24XX_DPLL_MULT_MASK,
        .div1_mask              = OMAP24XX_DPLL_DIV_MASK,
        .max_multiplier         = 1024,
@@ -702,7 +707,7 @@ static struct clk apll96_ck = {
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
        .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
+       .enable_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKEN),
        .enable_bit     = OMAP24XX_EN_96M_PLL_SHIFT,
        .enable         = &omap2_clk_fixed_enable,
        .disable        = &omap2_clk_fixed_disable,
@@ -716,7 +721,7 @@ static struct clk apll54_ck = {
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
        .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
+       .enable_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKEN),
        .enable_bit     = OMAP24XX_EN_54M_PLL_SHIFT,
        .enable         = &omap2_clk_fixed_enable,
        .disable        = &omap2_clk_fixed_disable,
@@ -752,7 +757,7 @@ static struct clk func_54m_ck = {
                                RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
        .clkdm_name     = "wkup_clkdm",
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_54M_SOURCE,
        .clksel         = func_54m_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -792,7 +797,7 @@ static struct clk func_96m_ck = {
                                RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
        .clkdm_name     = "wkup_clkdm",
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP2430_96M_SOURCE,
        .clksel         = func_96m_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -825,7 +830,7 @@ static struct clk func_48m_ck = {
                                RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
        .clkdm_name     = "wkup_clkdm",
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_48M_SOURCE,
        .clksel         = func_48m_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1012,7 +1017,7 @@ static struct clk mpu_ck = {      /* Control cpu */
                                CONFIG_PARTICIPANT | RATE_PROPAGATES,
        .clkdm_name     = "mpu_clkdm",
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL),
+       .clksel_reg     = _CM_REG_OFFSET(MPU_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP24XX_CLKSEL_MPU_MASK,
        .clksel         = mpu_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1053,9 +1058,9 @@ static struct clk dsp_fck = {
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP |
                                CONFIG_PARTICIPANT | RATE_PROPAGATES,
        .clkdm_name     = "dsp_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
-       .clksel_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
+       .clksel_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP24XX_CLKSEL_DSP_MASK,
        .clksel         = dsp_fck_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1082,7 +1087,7 @@ static struct clk dsp_irate_ick = {
        .parent         = &dsp_fck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP |
                                CONFIG_PARTICIPANT | PARENT_CONTROLS_CLOCK,
-       .clksel_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
+       .clksel_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP24XX_CLKSEL_DSP_IF_MASK,
        .clksel         = dsp_irate_ick_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1095,7 +1100,7 @@ static struct clk dsp_ick = {
        .name           = "dsp_ick",     /* apparently ipi and isp */
        .parent         = &dsp_irate_ick,
        .flags          = CLOCK_IN_OMAP242X | DELAYED_APP | CONFIG_PARTICIPANT,
-       .enable_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP2420_EN_DSP_IPI_SHIFT,          /* for ipi */
 };
 
@@ -1104,7 +1109,7 @@ static struct clk iva2_1_ick = {
        .name           = "iva2_1_ick",
        .parent         = &dsp_irate_ick,
        .flags          = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT,
-       .enable_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
 };
 
@@ -1119,9 +1124,9 @@ static struct clk iva1_ifck = {
        .flags          = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT |
                                RATE_PROPAGATES | DELAYED_APP,
        .clkdm_name     = "iva1_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP2420_EN_IVA_COP_SHIFT,
-       .clksel_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
+       .clksel_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP2420_CLKSEL_IVA_MASK,
        .clksel         = dsp_fck_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1135,7 +1140,7 @@ static struct clk iva1_mpu_int_ifck = {
        .parent         = &iva1_ifck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "iva1_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP2420_EN_IVA_MPU_SHIFT,
        .fixed_div      = 2,
        .recalc         = &omap2_fixed_divisor_recalc,
@@ -1183,7 +1188,7 @@ static struct clk core_l3_ck = {  /* Used for ick and fck, interconnect */
                                ALWAYS_ENABLED | DELAYED_APP |
                                CONFIG_PARTICIPANT | RATE_PROPAGATES,
        .clkdm_name     = "core_l3_clkdm",
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_CLKSEL_L3_MASK,
        .clksel         = core_l3_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1211,9 +1216,9 @@ static struct clk usb_l4_ick = {  /* FS-USB interface clock */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                DELAYED_APP | CONFIG_PARTICIPANT,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP24XX_EN_USB_SHIFT,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_CLKSEL_USB_MASK,
        .clksel         = usb_l4_ick_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1245,7 +1250,7 @@ static struct clk l4_ck = {               /* used both as an ick and fck */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES,
        .clkdm_name     = "core_l4_clkdm",
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_CLKSEL_L4_MASK,
        .clksel         = l4_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1283,9 +1288,9 @@ static struct clk ssi_ssr_sst_fck = {
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                DELAYED_APP,
        .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP24XX_EN_SSI_SHIFT,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_CLKSEL_SSI_MASK,
        .clksel         = ssi_ssr_sst_fck_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1302,7 +1307,7 @@ static struct clk ssi_l4_ick = {
        .parent         = &l4_ck,
        .clkdm_name     = "core_l4_clkdm",
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP24XX_EN_SSI_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1332,9 +1337,9 @@ static struct clk gfx_3d_fck = {
        .parent         = &core_l3_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "gfx_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(GFX_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_EN_3D_SHIFT,
-       .clksel_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
+       .clksel_reg     = _CM_REG_OFFSET(GFX_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP_CLKSEL_GFX_MASK,
        .clksel         = gfx_fck_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1347,9 +1352,9 @@ static struct clk gfx_2d_fck = {
        .parent         = &core_l3_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "gfx_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(GFX_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_EN_2D_SHIFT,
-       .clksel_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
+       .clksel_reg     = _CM_REG_OFFSET(GFX_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP_CLKSEL_GFX_MASK,
        .clksel         = gfx_fck_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1362,7 +1367,7 @@ static struct clk gfx_ick = {
        .parent         = &core_l3_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "gfx_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(GFX_MOD, CM_ICLKEN),
        .enable_bit     = OMAP_EN_GFX_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1392,9 +1397,9 @@ static struct clk mdm_ick = {             /* used both as a ick and fck */
        .parent         = &core_ck,
        .flags          = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT,
        .clkdm_name     = "mdm_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(OMAP2430_MDM_MOD, CM_ICLKEN),
        .enable_bit     = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT,
-       .clksel_reg     = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_CLKSEL),
+       .clksel_reg     = _CM_REG_OFFSET(OMAP2430_MDM_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP2430_CLKSEL_MDM_MASK,
        .clksel         = mdm_ick_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1407,7 +1412,7 @@ static struct clk mdm_osc_ck = {
        .parent         = &osc_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "mdm_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(OMAP2430_MDM_MOD, CM_FCLKEN),
        .enable_bit     = OMAP2430_EN_OSC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1452,7 +1457,7 @@ static struct clk dss_ick = {             /* Enables both L3,L4 ICLK's */
        .parent         = &l4_ck,       /* really both l3 and l4 */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "dss_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_DSS1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1463,10 +1468,10 @@ static struct clk dss1_fck = {
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                DELAYED_APP,
        .clkdm_name     = "dss_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_DSS1_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_CLKSEL_DSS1_MASK,
        .clksel         = dss1_fck_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1496,10 +1501,10 @@ static struct clk dss2_fck = {          /* Alt clk used in power management */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                DELAYED_APP,
        .clkdm_name     = "dss_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_DSS2_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_CLKSEL_DSS2_MASK,
        .clksel         = dss2_fck_clksel,
        .recalc         = &followparent_recalc,
@@ -1510,7 +1515,7 @@ static struct clk dss_54m_fck = { /* Alt clk used in power management */
        .parent         = &func_54m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "dss_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_TV_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1538,7 +1543,7 @@ static struct clk gpt1_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_GPT1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1548,10 +1553,10 @@ static struct clk gpt1_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_EN_GPT1_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT1_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1564,7 +1569,7 @@ static struct clk gpt2_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1574,10 +1579,10 @@ static struct clk gpt2_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT2_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT2_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1588,7 +1593,7 @@ static struct clk gpt3_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1598,10 +1603,10 @@ static struct clk gpt3_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT3_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT3_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1612,7 +1617,7 @@ static struct clk gpt4_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT4_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1622,10 +1627,10 @@ static struct clk gpt4_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT4_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT4_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1636,7 +1641,7 @@ static struct clk gpt5_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT5_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1646,10 +1651,10 @@ static struct clk gpt5_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT5_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT5_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1660,7 +1665,7 @@ static struct clk gpt6_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT6_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1670,10 +1675,10 @@ static struct clk gpt6_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT6_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT6_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1683,7 +1688,7 @@ static struct clk gpt7_ick = {
        .name           = "gpt7_ick",
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT7_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1693,10 +1698,10 @@ static struct clk gpt7_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT7_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT7_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1707,7 +1712,7 @@ static struct clk gpt8_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT8_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1717,10 +1722,10 @@ static struct clk gpt8_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT8_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT8_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1731,7 +1736,7 @@ static struct clk gpt9_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT9_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1741,10 +1746,10 @@ static struct clk gpt9_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT9_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT9_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1755,7 +1760,7 @@ static struct clk gpt10_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT10_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1765,10 +1770,10 @@ static struct clk gpt10_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT10_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT10_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1779,7 +1784,7 @@ static struct clk gpt11_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT11_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1789,10 +1794,10 @@ static struct clk gpt11_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT11_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT11_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1803,7 +1808,7 @@ static struct clk gpt12_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT12_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1813,10 +1818,10 @@ static struct clk gpt12_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_GPT12_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL2),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL2),
        .clksel_mask    = OMAP24XX_CLKSEL_GPT12_MASK,
        .clksel         = omap24xx_gpt_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -1827,7 +1832,7 @@ static struct clk mcbsp1_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_MCBSP1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1837,7 +1842,7 @@ static struct clk mcbsp1_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_MCBSP1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1847,7 +1852,7 @@ static struct clk mcbsp2_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_MCBSP2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1857,7 +1862,7 @@ static struct clk mcbsp2_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_MCBSP2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1867,7 +1872,7 @@ static struct clk mcbsp3_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_MCBSP3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1877,7 +1882,7 @@ static struct clk mcbsp3_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MCBSP3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1887,7 +1892,7 @@ static struct clk mcbsp4_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_MCBSP4_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1897,7 +1902,7 @@ static struct clk mcbsp4_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MCBSP4_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1907,7 +1912,7 @@ static struct clk mcbsp5_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_MCBSP5_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1917,7 +1922,7 @@ static struct clk mcbsp5_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MCBSP5_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1928,7 +1933,7 @@ static struct clk mcspi1_ick = {
        .parent         = &l4_ck,
        .clkdm_name     = "core_l4_clkdm",
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_MCSPI1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1939,7 +1944,7 @@ static struct clk mcspi1_fck = {
        .parent         = &func_48m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_MCSPI1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1950,7 +1955,7 @@ static struct clk mcspi2_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_MCSPI2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1961,7 +1966,7 @@ static struct clk mcspi2_fck = {
        .parent         = &func_48m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_MCSPI2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1972,7 +1977,7 @@ static struct clk mcspi3_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_MCSPI3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1983,7 +1988,7 @@ static struct clk mcspi3_fck = {
        .parent         = &func_48m_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MCSPI3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -1993,7 +1998,7 @@ static struct clk uart1_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_UART1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2003,7 +2008,7 @@ static struct clk uart1_fck = {
        .parent         = &func_48m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_UART1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2013,7 +2018,7 @@ static struct clk uart2_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_UART2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2023,7 +2028,7 @@ static struct clk uart2_fck = {
        .parent         = &func_48m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_UART2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2033,7 +2038,7 @@ static struct clk uart3_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP24XX_EN_UART3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2043,7 +2048,7 @@ static struct clk uart3_fck = {
        .parent         = &func_48m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP24XX_EN_UART3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2053,7 +2058,7 @@ static struct clk gpios_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_GPIOS_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2063,7 +2068,7 @@ static struct clk gpios_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_EN_GPIOS_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2073,7 +2078,7 @@ static struct clk mpu_wdt_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_MPU_WDT_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2083,7 +2088,7 @@ static struct clk mpu_wdt_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "wkup_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_FCLKEN),
        .enable_bit     = OMAP24XX_EN_MPU_WDT_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2094,7 +2099,7 @@ static struct clk sync_32k_ick = {
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                ENABLE_ON_INIT,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_32KSYNC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2104,7 +2109,7 @@ static struct clk wdt1_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_WDT1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2115,7 +2120,7 @@ static struct clk omapctrl_ick = {
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                ENABLE_ON_INIT,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_OMAPCTRL_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2125,7 +2130,7 @@ static struct clk icr_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
+       .enable_reg     = _CM_REG_OFFSET(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP2430_EN_ICR_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2135,7 +2140,7 @@ static struct clk cam_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_CAM_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2150,7 +2155,7 @@ static struct clk cam_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_CAM_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2160,7 +2165,7 @@ static struct clk mailboxes_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_MAILBOXES_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2170,7 +2175,7 @@ static struct clk wdt4_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_WDT4_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2180,7 +2185,7 @@ static struct clk wdt4_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_WDT4_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2190,7 +2195,7 @@ static struct clk wdt3_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP2420_EN_WDT3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2200,7 +2205,7 @@ static struct clk wdt3_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP2420_EN_WDT3_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2210,7 +2215,7 @@ static struct clk mspro_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_MSPRO_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2220,7 +2225,7 @@ static struct clk mspro_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_MSPRO_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2230,7 +2235,7 @@ static struct clk mmc_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP2420_EN_MMC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2240,7 +2245,7 @@ static struct clk mmc_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP2420_EN_MMC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2250,7 +2255,7 @@ static struct clk fac_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_FAC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2260,7 +2265,7 @@ static struct clk fac_fck = {
        .parent         = &func_12m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_FAC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2270,7 +2275,7 @@ static struct clk eac_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP2420_EN_EAC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2280,7 +2285,7 @@ static struct clk eac_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP2420_EN_EAC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2290,7 +2295,7 @@ static struct clk hdq_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP24XX_EN_HDQ_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2300,7 +2305,7 @@ static struct clk hdq_fck = {
        .parent         = &func_12m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP24XX_EN_HDQ_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2311,7 +2316,7 @@ static struct clk i2c2_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP2420_EN_I2C2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2322,7 +2327,7 @@ static struct clk i2c2_fck = {
        .parent         = &func_12m_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP2420_EN_I2C2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2333,7 +2338,7 @@ static struct clk i2chs2_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_I2CHS2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2344,7 +2349,7 @@ static struct clk i2c1_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP2420_EN_I2C1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2355,7 +2360,7 @@ static struct clk i2c1_fck = {
        .parent         = &func_12m_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP2420_EN_I2C1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2366,7 +2371,7 @@ static struct clk i2chs1_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_I2CHS1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2401,7 +2406,7 @@ static struct clk vlynq_ick = {
        .parent         = &core_l3_ck,
        .flags          = CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
        .enable_bit     = OMAP2420_EN_VLYNQ_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2436,10 +2441,10 @@ static struct clk vlynq_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP242X | DELAYED_APP,
        .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP2420_EN_VLYNQ_SHIFT,
        .init           = &omap2_init_clksel_parent,
-       .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
+       .clksel_reg     = _CM_REG_OFFSET(CORE_MOD, CM_CLKSEL1),
        .clksel_mask    = OMAP2420_CLKSEL_VLYNQ_MASK,
        .clksel         = vlynq_fck_clksel,
        .recalc         = &omap2_clksel_recalc,
@@ -2452,7 +2457,7 @@ static struct clk sdrc_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X | ENABLE_ON_INIT,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN3),
        .enable_bit     = OMAP2430_EN_SDRC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2462,7 +2467,7 @@ static struct clk des_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
        .enable_bit     = OMAP24XX_EN_DES_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2472,7 +2477,7 @@ static struct clk sha_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
        .enable_bit     = OMAP24XX_EN_SHA_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2482,7 +2487,7 @@ static struct clk rng_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
        .enable_bit     = OMAP24XX_EN_RNG_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2492,7 +2497,7 @@ static struct clk aes_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
        .enable_bit     = OMAP24XX_EN_AES_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2502,7 +2507,7 @@ static struct clk pka_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_ICLKEN4),
        .enable_bit     = OMAP24XX_EN_PKA_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2512,7 +2517,7 @@ static struct clk usb_fck = {
        .parent         = &func_48m_ck,
        .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
        .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP24XX_EN_USB_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2522,7 +2527,7 @@ static struct clk usbhs_ick = {
        .parent         = &core_l3_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_USBHS_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2533,7 +2538,7 @@ static struct clk mmchs1_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_MMCHS1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2544,7 +2549,7 @@ static struct clk mmchs1_fck = {
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l3_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MMCHS1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2555,7 +2560,7 @@ static struct clk mmchs2_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_MMCHS2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2565,7 +2570,7 @@ static struct clk mmchs2_fck = {
        .id             = 2,
        .parent         = &func_96m_ck,
        .flags          = CLOCK_IN_OMAP243X,
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MMCHS2_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2575,7 +2580,7 @@ static struct clk gpio5_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_GPIO5_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2585,7 +2590,7 @@ static struct clk gpio5_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_GPIO5_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2595,7 +2600,7 @@ static struct clk mdm_intc_ick = {
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN2),
        .enable_bit     = OMAP2430_EN_MDM_INTC_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2606,7 +2611,7 @@ static struct clk mmchsdb1_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MMCHSDB1_SHIFT,
        .recalc         = &followparent_recalc,
 };
@@ -2617,7 +2622,7 @@ static struct clk mmchsdb2_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .clkdm_name     = "core_l4_clkdm",
-       .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
+       .enable_reg     = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
        .enable_bit     = OMAP2430_EN_MMCHSDB2_SHIFT,
        .recalc         = &followparent_recalc,
 };

diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 68e4971..da5e83a 100644 (file)
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -16,11 +16,6 @@
 
 #include "prcm-common.h"
 
-#ifndef __ASSEMBLER__
-#define OMAP_CM_REGADDR(module, reg)                                   \
-       (__force void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
-#endif
-
 #define OMAP2420_CM_REGADDR(module, reg)                               \
                        IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
 #define OMAP2430_CM_REGADDR(module, reg)                               \
@@ -118,13 +113,7 @@ static __inline__ u32 __attribute__((unused)) cm_rmw_reg_bits(u32 mask,
 
 extern u32 cm_read_mod_reg(s16 module, u16 idx);
 extern void cm_write_mod_reg(u32 val, s16 module, u16 idx);
-
-/* Read-modify-write bits in a CM register (by domain) */
-static __inline__ u32 __attribute__((unused)) cm_rmw_mod_reg_bits(u32 mask,
-                                               u32 bits, s16 module, s16 idx)
-{
-       return cm_rmw_reg_bits(mask, bits, OMAP_CM_REGADDR(module, idx));
-}
+extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
 
 static __inline__ u32 __attribute__((unused)) cm_set_mod_reg_bits(u32 bits,
                                                        s16 module, s16 idx)

diff --cc arch/arm/mach-omap2/prcm.c
Simple merge