ARM: EXYNOS: Invert VCLK polarity for framebuffer on ORIGEN
authorTushar Behera <tushar.behera@linaro.org>
Thu, 29 Dec 2011 07:48:08 +0000 (16:48 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Wed, 11 Jan 2012 17:20:59 +0000 (02:20 +0900)
Framebuffer driver needs to fetch the video data during the rising
edge of the VCLK. Otherwise, there are some glitches in the LCD
display.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-exynos/mach-origen.c

Simple merge