Revert "OMAP3 clock: put DPLL into bypass if bypass rate = clk->rate, not hardware...
authorGrazvydas Ignotas <notasas@gmail.com>
Wed, 22 Oct 2008 20:05:11 +0000 (23:05 +0300)
committerGrazvydas Ignotas <notasas@gmail.com>
Fri, 31 Oct 2008 20:23:46 +0000 (22:23 +0200)
This reverts commit 8b1f0bd44fe490ec631230c8c040753a2bda8caa and fixes compile.

This revert is to fix EHCI, which dies because of this patch.

arch/arm/mach-omap2/clock34xx.c

index cc43f4f..eeec5f1 100644 (file)
@@ -272,6 +272,7 @@ static int omap3_noncore_dpll_enable(struct clk *clk)
 {
        int r;
        struct dpll_data *dd;
+       u32 rate;
 
        if (clk == &dpll3_ck)
                return -EINVAL;
@@ -280,7 +281,9 @@ static int omap3_noncore_dpll_enable(struct clk *clk)
        if (!dd)
                return -EINVAL;
 
-       if (clk->rate == dd->bypass_clk->rate)
+       rate = omap2_get_dpll_rate(clk);
+
+       if (dd->bypass_clk->rate == rate)
                r = _omap3_noncore_dpll_bypass(clk);
        else
                r = _omap3_noncore_dpll_lock(clk);