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ARM: tegra: Fix some whitespace oddities
authorThierry Reding <thierry.reding@gmail.com>
Fri, 6 Dec 2013 15:27:12 +0000 (16:27 +0100)
committerStephen Warren <swarren@nvidia.com>
Mon, 16 Dec 2013 21:02:50 +0000 (14:02 -0700)
Some of the powergate code uses unusual spacing around == and has a tab
instead of a space before an opening parenthesis.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

No differences found
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