drm/i915: HSW: allow PCH clock gating for suspend
authorImre Deak <imre.deak@intel.com>
Wed, 17 Apr 2013 11:04:50 +0000 (14:04 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 10 May 2013 19:56:35 +0000 (21:56 +0200)
For the device to enter D3 we should enable PCH clock gating.

v2:
- use HAS_PCH_LPT instead of IS_HASWELL (Ville, Paolo)
- rename lpt_allow_clock_gating to lpt_suspend_hw (Paolo)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

No differences found