#if !defined(SGX_DYNAMIC_TIMING_INFO)
psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
- psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
+ psTimingInfo->ui32CoreClockSpeed = cpu_is_omap3630() ? 200000000 : 110666666;
psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
psTimingInfo->bEnableActivePM = IMG_TRUE;
#define SYS_OMAP3430_SGX_REGS_SYS_PHYS_BASE 0x50000000
-#define SYS_OMAP3430_SGX_REGS_SIZE 0x4000
+#define SYS_OMAP3430_SGX_REGS_SIZE 0x10000
#define SYS_OMAP3430_SGX_IRQ 21
#endif
+#undef SYS_SGX_CLOCK_SPEED
+#define SYS_SGX_CLOCK_SPEED sgx_clock_speed
+static int sgx_clock_speed;
+
static PVRSRV_ERROR PowerLockWrap(SYS_SPECIFIC_DATA *psSysSpecData, IMG_BOOL bTryLock)
{
if (!in_interrupt())
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
}
#endif
+#if 1
+ {
+ static int logged;
+ IMG_UINT32 rate = clk_get_rate(psSysSpecData->psSGX_FCK);
+ if (!logged) {
+ printk(KERN_INFO "SGX clock rate: %u\n", rate);
+ logged = 1;
+ }
+ }
+#endif
atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
+ SYS_SGX_CLOCK_SPEED = cpu_is_omap3630() ? 200000000 : 110666666;
+
psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
if (IS_ERR(psCLK))
{