config TARGET_STM32H743_EVAL
bool "STM32H743 Evaluation board"
+config TARGET_STM32H747_DISCO
+ bool "STM32H747 Discovery board"
+
config TARGET_STM32H750_ART_PI
bool "STM32H750 ART Pi board"
source "board/st/stm32h743-eval/Kconfig"
source "board/st/stm32h743-disco/Kconfig"
+source "board/st/stm32h747-disco/Kconfig"
source "board/st/stm32h750-art-pi/Kconfig"
endif
--- /dev/null
+if TARGET_STM32H747_DISCO
+
+config SYS_BOARD
+ default "stm32h747-disco"
+
+config SYS_VENDOR
+ default "st"
+
+config SYS_SOC
+ default "stm32h7"
+
+config SYS_CONFIG_NAME
+ default "stm32h747-disco"
+
+endif
--- /dev/null
+STM32H747 DISCOVERY BOARD
+M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
+S: Maintained
+F: board/st/stm32h747-disco
+F: include/configs/stm32h747-disco.h
+F: configs/stm32h747-disco_defconfig
+F: arch/arm/dts/stm32h747*
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
+#
+
+obj-y := stm32h747-disco.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * stm32h747i-disco support
+ *
+ * Copyright (C) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ */
+
+#include <dm.h>
+#include <init.h>
+#include <log.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (ret) {
+ debug("DRAM init failed: %d\n", ret);
+ return ret;
+ }
+
+ if (fdtdec_setup_mem_size_base() != 0)
+ ret = -EINVAL;
+
+ return ret;
+}
+
+int dram_init_banksize(void)
+{
+ fdtdec_setup_memory_banksize();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_STM32=y
+CONFIG_TEXT_BASE=0x08000000
+CONFIG_SYS_MALLOC_LEN=0x100000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32h747i-disco"
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SYS_LOAD_ADDR=0xd0400000
+CONFIG_STM32H7=y
+CONFIG_TARGET_STM32H747_DISCO=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=3
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_DEFAULT_FDT_FILE="stm32h747i-disco"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=282
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="U-Boot > "
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_ISO_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NO_NET=y
+CONFIG_STM32_SDMMC2=y
+# CONFIG_PINCTRL_FULL is not set
#define QSPISRC_PER_CK 3
#define PWR_CR3 0x0c
+#define PWR_CR3_LDOEN BIT(1)
#define PWR_CR3_SCUEN BIT(2)
#define PWR_D3CR 0x18
#define PWR_D3CR_VOS_MASK GENMASK(15, 14)
clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK,
VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT);
/* Lock supply configuration update */
+#if IS_ENABLED(CONFIG_TARGET_STM32H747_DISCO)
+ clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_LDOEN);
+#else
clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN);
+#endif
while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY))
;
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2025 Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <config.h>
+#include <linux/sizes.h>
+
+/* For booting Linux, use the first 16MB of memory */
+#define CFG_SYS_BOOTMAPSZ SZ_16M
+
+#define CFG_SYS_FLASH_BASE 0x08000000
+
+#define CFG_SYS_HZ_CLOCK 1000000
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0)
+
+#include <config_distro_bootcmd.h>
+#define CFG_EXTRA_ENV_SETTINGS \
+ "kernel_addr_r=0xD0008000\0" \
+ "fdtfile=stm32h747i-disco.dtb\0" \
+ "fdt_addr_r=0xD0408000\0" \
+ "scriptaddr=0xD0418000\0" \
+ "pxefile_addr_r=0xD0428000\0" \
+ "ramdisk_addr_r=0xD0438000\0" \
+ BOOTENV
+
+#endif /* __CONFIG_H */