MIPS: Loongson: Mark cascade interrupts IRQF_NO_THREAD
authorWu Zhangjin <wuzhangjin@gmail.com>
Sat, 23 Jul 2011 12:41:24 +0000 (12:41 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 21 Sep 2011 15:52:22 +0000 (17:52 +0200)
There are two cascade interrupts in Loongson machines, one for bonito
northbridge, another for the 8259A controller in the southbridge. Both
want to be non threaded.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/2638/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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