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iommu/tegra: gart: Fix register offset correctly
authorHiroshi DOYU <hdoyu@nvidia.com>
Thu, 10 May 2012 07:45:32 +0000 (10:45 +0300)
committerJoerg Roedel <joerg.roedel@amd.com>
Fri, 11 May 2012 09:42:05 +0000 (11:42 +0200)
DT passes the exact GART register ranges without any overlapping with
MC register ranges. GART register offset needs to be adjusted by one
passed by DT correctly.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

No differences found
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