[Blackfin] arch: fix bug when DMA operation related core B of BF561
authorEnrik Berkhan <Enrik.Berkhan@ge.com>
Mon, 24 Dec 2007 11:51:31 +0000 (19:51 +0800)
committerBryan Wu <bryan.wu@analog.com>
Mon, 24 Dec 2007 11:51:31 +0000 (19:51 +0800)
- Before DMA'ing data to core B L1 memory, caches have to be flushed.
- Before DMA'ing data from core B L1 memory, caches have to be invalidated.
- Fix lock/unlock.

Signed-off-by: Enrik Berkhan <Enrik.Berkhan@ge.com>
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>

No differences found