[TG3]: Revert "Speed up SRAM access"

Undo commit 100c4673307f5806788791b9b886877c806afd96

MMIOs timeout more quickly that PCI config cycles and some
of these SRAM accesses can take a very long time, triggering
the MMIO limits on some sparc64 PCI controllers and thus
resulting in bus timeouts and bus errors.

Signed-off-by: David S. Miller <davem@davemloft.net>