configs: Remove duplicate newlines
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sun, 16 Jun 2024 15:19:11 +0000 (17:19 +0200)
committerTom Rini <trini@konsulko.com>
Fri, 5 Jul 2024 19:57:01 +0000 (13:57 -0600)
Drop all duplicate newlines from config headers.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
63 files changed:
include/configs/M5208EVBE.h
include/configs/M5235EVB.h
include/configs/M5249EVB.h
include/configs/M5253DEMO.h
include/configs/M5272C3.h
include/configs/M5275EVB.h
include/configs/M5282EVB.h
include/configs/M53017EVB.h
include/configs/M5329EVB.h
include/configs/M5373EVB.h
include/configs/MPC837XERDB.h
include/configs/P2041RDB.h
include/configs/T4240RDB.h
include/configs/arbel.h
include/configs/aristainetos2.h
include/configs/astro_mcf5373l.h
include/configs/cobra5272.h
include/configs/display5.h
include/configs/ds414.h
include/configs/eb_cpu5282.h
include/configs/ethernut5.h
include/configs/ge_bx50v3.h
include/configs/imx6_logic.h
include/configs/imx7-cm.h
include/configs/imx8mm-cl-iot-gate.h
include/configs/imx8mm_evk.h
include/configs/imx8mn_evk.h
include/configs/imx8mp_evk.h
include/configs/imx8mp_rsb3720.h
include/configs/imx8mq_cm.h
include/configs/imx8mq_evk.h
include/configs/imx8mq_phanbell.h
include/configs/imx8mq_reform2.h
include/configs/imx8ulp_evk.h
include/configs/j721e_evm.h
include/configs/kontron_pitx_imx8m.h
include/configs/ls1012aqds.h
include/configs/ls1043a_common.h
include/configs/ls1088a_common.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/lx2160a_common.h
include/configs/meson64.h
include/configs/mt8183.h
include/configs/mt8516.h
include/configs/mx53cx9020.h
include/configs/mx6ullevk.h
include/configs/mx7ulp_evk.h
include/configs/phycore_imx8mm.h
include/configs/phycore_imx8mp.h
include/configs/pico-imx6ul.h
include/configs/pico-imx8mq.h
include/configs/sei510.h
include/configs/siemens-am33x-common.h
include/configs/socrates.h
include/configs/stm32mp15_dh_dhsom.h
include/configs/stmark2.h
include/configs/ten64.h
include/configs/topic_miami.h
include/configs/warp7.h
include/configs/x86-common.h
include/configs/xtfpga.h
include/configs/zynq-common.h

index d4c1e06..a4fda55 100644 (file)
 #define CFG_SYS_CS0_MASK               0x007F0001
 #define CFG_SYS_CS0_CTRL               0x00001FA0
 
-
 #endif                         /* _M5208EVBE_H */
index e542818..8939c8e 100644 (file)
 #      define CFG_SYS_CS0_CTRL 0x00001D80
 #endif
 
-
 #endif                         /* _M5329EVB_H */
index 2f4743c..4fd539c 100644 (file)
 #define        CFG_SYS_GPIO1_OUT               0x00c70000      /* Set outputs to default state */
 #define CFG_SYS_GPIO1_LED              0x00400000      /* user led                     */
 
-
 #endif /* M5249 */
index 0ff0bfc..75c70be 100644 (file)
@@ -10,7 +10,6 @@
 
 #define CFG_SYS_UART_PORT              (0)
 
-
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
  */
 #define CFG_SYS_GPIO1_OUT              0x00c70000      /* Set outputs to default state */
 #define CFG_SYS_GPIO1_LED              0x00400000      /* user led */
 
-
 #endif                         /* _M5253DEMO_H */
index 98a1718..0d332cb 100644 (file)
 #define CFG_SYS_PBDAT          0x0000
 #define CFG_SYS_PDCNT          0x00000000
 
-
 #endif                         /* _M5272C3_H */
index 77ddf71..607c5de 100644 (file)
 #define CFG_SYS_CS1_CTRL               0x00001900
 #define CFG_SYS_CS1_MASK               0x00070001
 
-
 #endif /* _M5275EVB_H */
index e289a23..31699a4 100644 (file)
 #define CFG_SYS_DDRUA          0x05
 #define CFG_SYS_PJPAR          0xFF
 
-
 #endif                         /* _CONFIG_M5282EVB_H */
index dcc5701..6359915 100644 (file)
 #define CFG_SYS_CS1_MASK               0x00070001
 #define CFG_SYS_CS1_CTRL               0x00001FA0
 
-
 #endif                         /* _M53017EVB_H */
index dd5d4c9..456135b 100644 (file)
 #define CFG_SYS_CS2_CTRL               0x00001f60
 #endif
 
-
 #endif                         /* _M5329EVB_H */
index 4bb9948..4e8dcb5 100644 (file)
 #define CFG_SYS_CS2_MASK               (16 << 20)
 #define CFG_SYS_CS2_CTRL               0x00001f60
 
-
 #endif                         /* _M5373EVB_H */
index 3967cc2..a5176d1 100644 (file)
  */
 #define CFG_SYS_NAND_BASE      0xE0600000
 
-
 /* Vitesse 7385 */
 
 #define CFG_SYS_VSC7385_BASE   0xF0000000
index 28f53ae..7cf6514 100644 (file)
 
 /* I2C */
 
-
 /*
  * RapidIO
  */
index 78e1362..c95325e 100644 (file)
 #define CFG_SYS_FSL_ESDHC_ADDR       CFG_SYS_MPC85xx_ESDHC_ADDR
 #endif
 
-
 #define __USB_PHY_TYPE utmi
 
 /*
index d8ccc45..61f6a5e 100644 (file)
@@ -15,7 +15,6 @@
 #define CFG_SYS_BAUDRATE_TABLE \
        { 9600, 14400, 19200, 38400, 57600, 115200, 230400, 380400, 460800, 921600 }
 
-
 /* Default environemnt variables */
 #define CFG_EXTRA_ENV_SETTINGS   "uimage_flash_addr=80400000\0"   \
                "stdin=serial\0"   \
index 286435d..9d4a4bb 100644 (file)
@@ -22,7 +22,6 @@
 
 #include "mx6_common.h"
 
-
 /* MMC Configs */
 #define CFG_SYS_FSL_ESDHC_ADDR      USDHC1_BASE_ADDR
 
index f3bfefa..6522432 100644 (file)
 #define CFG_SYS_CACHE_ICACR            (CF_CACR_EC | CF_CACR_CINVA | \
                                         CF_CACR_DCM_P)
 
-
 #endif /* _CONFIG_ASTRO_MCF5373L_H */
index 556705f..cd50ffe 100644 (file)
@@ -184,5 +184,4 @@ configuration */
 #define CFG_SYS_PBDAT          0x0000                  /* PortB value reg. */
 #define CFG_SYS_PDCNT          0x00000000              /* PortD control reg. */
 
-
 #endif /* _CONFIG_COBRA5272_H */
index 3b96fff..2005a25 100644 (file)
        "run tftp_mmc_rootfs;" \
        "run tftp_mmc_rootfs_bkp;" \
 
-
 #define TFTP_UPDATE_RECOVERY_SWU_KERNEL \
        "tftp_sf_fitImg_SWU=" \
            "if tftp ${loadaddr} ${kernel_file}; then " \
index f1921da..6fbcec0 100644 (file)
@@ -53,7 +53,6 @@
                "tftpboot ${loadaddr} u-boot-with-spl.kwb; "    \
                "sf update ${loadaddr} 0x0 0xd0000\0"
 
-
 /* increase autoneg timeout, my NIC sucks */
 
 #endif /* _CONFIG_SYNOLOGY_DS414_H */
index e2c9d9c..26e4ade 100644 (file)
 #define CFG_SYS_DDRUA          0x05
 #define CFG_SYS_PJPAR          0xFF
 
-
 #endif /* _CONFIG_M5282EVB_H */
 /*---------------------------------------------------------------------*/
index 182369d..807c696 100644 (file)
@@ -32,7 +32,6 @@
 /* 512kB on-chip NOR flash */
 # define CFG_SYS_FLASH_BASE            0x00200000 /* AT91SAM9XE_FLASH_BASE */
 
-
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
 
 /* NAND flash */
index 32960fb..07b3670 100644 (file)
@@ -88,7 +88,6 @@
                "run doboot; " \
                "run failbootcmd\0" \
 
-
 /* Physical Memory Map */
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 
index 85c0544..66004a6 100644 (file)
@@ -17,7 +17,6 @@
 #define CFG_SYS_FSL_ESDHC_ADDR      0
 #define CFG_SYS_FSL_USDHC_NUM       2
 
-
 /* Ethernet Configs */
 #define CFG_FEC_MXC_PHYADDR         0
 
index 106fbdb..131f182 100644 (file)
@@ -77,7 +77,6 @@
 #define CFG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
 #define CFG_SYS_FSL_USDHC_NUM          2
 
-
 /* USB Configs */
 #define CFG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 
index 0c54702..6442e3d 100644 (file)
 #define CFG_SYS_INIT_RAM_ADDR  0x40000000
 #define CFG_SYS_INIT_RAM_SIZE  0x80000
 
-
 #define CFG_SYS_SDRAM_BASE             0x40000000
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
index d5642b9..9dd63fc 100644 (file)
@@ -56,7 +56,6 @@
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        0x200000
 
-
 #define CFG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
index b759b83..ca02e26 100644 (file)
@@ -48,7 +48,6 @@
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        0x200000
 
-
 #define CFG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
index 71452aa..741ee39 100644 (file)
@@ -43,7 +43,6 @@
 #define CFG_SYS_INIT_RAM_ADDR  0x40000000
 #define CFG_SYS_INIT_RAM_SIZE  0x80000
 
-
 /* Totally 6GB DDR */
 #define CFG_SYS_SDRAM_BASE             0x40000000
 #define PHYS_SDRAM                     0x40000000
index 10a166d..b82e35f 100644 (file)
 #define CFG_SYS_INIT_RAM_ADDR  0x40000000
 #define CFG_SYS_INIT_RAM_SIZE  0x80000
 
-
 /* Totally 6GB or 4G DDR */
 #define CFG_SYS_SDRAM_BASE             0x40000000
 #define PHYS_SDRAM                     0x40000000
index 7cf482d..2bbd6b1 100644 (file)
@@ -48,7 +48,6 @@
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        0x80000
 
-
 #define CFG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                                        0x40000000 /* 1 GB DDR */
index d2e1649..9eefc31 100644 (file)
@@ -53,7 +53,6 @@
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        0x80000
 
-
 #define CFG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0xC0000000 /* 3GB DDR */
index b66fc18..cd73a72 100644 (file)
@@ -86,7 +86,6 @@
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        0x80000
 
-
 #define CFG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0x40000000 /* 1GB DDR */
index 3148e86..7fa441a 100644 (file)
@@ -54,7 +54,6 @@
 #define CFG_SYS_INIT_RAM_ADDR          0x40000000
 #define CFG_SYS_INIT_RAM_SIZE          0x80000
 
-
 #define CFG_SYS_SDRAM_BASE             0x40000000
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                        0x100000000     /* 4 GiB DDR */
index 750aef1..aa9da19 100644 (file)
@@ -14,7 +14,6 @@
 #ifdef CONFIG_SPL_BUILD
 #define CFG_MALLOC_F_ADDR              0x22040000
 
-
 #endif
 
 /* ENET Config */
@@ -51,7 +50,6 @@
 #define CFG_SYS_INIT_RAM_ADDR  0x80000000
 #define CFG_SYS_INIT_RAM_SIZE  0x80000
 
-
 #define CFG_SYS_SDRAM_BASE             0x80000000
 #define PHYS_SDRAM                     0x80000000
 #define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
index a5140ea..bdf12ee 100644 (file)
@@ -54,5 +54,4 @@
 /* Now for the remaining common defines */
 #include <configs/ti_armv7_common.h>
 
-
 #endif /* __CONFIG_J721E_EVM_H */
index 101c591..3dda7b6 100644 (file)
@@ -18,7 +18,6 @@
 #define CFG_MALLOC_F_ADDR              0x182000
 /* For RAW image gives a error info not panic */
 
-
 #define CFG_POWER_PFUZE100_I2C_ADDR  0x08
 #endif
 
@@ -56,7 +55,6 @@
        ENV_MEM_LAYOUT_SETTINGS \
        BOOTENV
 
-
 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
 #define CFG_SYS_INIT_RAM_SIZE        0x80000
 
index 35e8ff0..3c4f8b7 100644 (file)
@@ -48,7 +48,6 @@
 */
 #define CFG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
 
-
 /* Voltage monitor on channel 2*/
 #define I2C_VOL_MONITOR_ADDR           0x40
 #define I2C_VOL_MONITOR_BUS_V_OFFSET   0x2
index ac2319c..e500a7d 100644 (file)
                " && esbc_validate ${kernelheader_addr_r};"     \
                "bootm $load_addr#$board\0"
 
-
 #ifdef CONFIG_TFABOOT
 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "  \
                           "env exists secureboot && esbc_halt;"
index 720a95d..34085ee 100644 (file)
@@ -42,7 +42,6 @@
 
 /* I2C */
 
-
 /* Serial Port */
 #define CFG_SYS_NS16550_CLK          (get_bus_freq(0) / 2)
 
@@ -84,11 +83,9 @@ unsigned long long get_qixis_addr(void);
 #define QIXIS_BASE_PHYS                                0x20000000
 #define QIXIS_BASE_PHYS_EARLY                  0xC000000
 
-
 #define CFG_SYS_NAND_BASE                      0x530000000ULL
 #define CFG_SYS_NAND_BASE_PHYS         0x30000000
 
-
 /* MC firmware */
 /* TODO Actual DPL max length needs to be confirmed with the MC FW team */
 #define CFG_SYS_LS_MC_DPC_MAX_LENGTH       0x20000
index 084ee06..36e8422 100644 (file)
@@ -16,7 +16,6 @@
 
 #define SPD_EEPROM_ADDRESS             0x51
 
-
 /*
  * IFC Definitions
  */
index a174914..8be5feb 100644 (file)
@@ -17,7 +17,6 @@
 
 #define SPD_EEPROM_ADDRESS     0x51
 
-
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #define CFG_SYS_NOR0_CSPR_EXT  (0x0)
 #define CFG_SYS_NOR_AMASK              IFC_AMASK(128 * 1024 * 1024)
index 6f46ca7..4c1b4bf 100644 (file)
@@ -37,7 +37,6 @@
  * will be udpated later when get_bus_freq(0) is available.
  */
 
-
 /* Serial Port */
 #define CFG_PL011_CLOCK                (get_bus_freq(0) / 4)
 #define CFG_SYS_SERIAL0                0x21c0000
index 65fa5f3..ccb8ea2 100644 (file)
        BOOTENV
 #endif
 
-
 #endif /* __MESON64_CONFIG_H */
index 1f97382..7c31e21 100644 (file)
@@ -11,7 +11,6 @@
 
 #include <linux/sizes.h>
 
-
 #define CFG_SYS_NS16550_COM1           0x11005200
 #define CFG_SYS_NS16550_CLK            26000000
 
index 73776e3..27c3718 100644 (file)
@@ -11,7 +11,6 @@
 
 #include <linux/sizes.h>
 
-
 #define CFG_SYS_NS16550_COM1           0x11005000
 #define CFG_SYS_NS16550_CLK            26000000
 
index e995776..dccfdc3 100644 (file)
@@ -21,7 +21,6 @@
 
 /* bootz: zImage/initrd.img support */
 
-
 /* USB Configs */
 #define CFG_MXC_USB_PORT       1
 #define CFG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
index 2c3cd32..910140a 100644 (file)
@@ -7,7 +7,6 @@
 #ifndef __MX6ULLEVK_CONFIG_H
 #define __MX6ULLEVK_CONFIG_H
 
-
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
 #include <linux/stringify.h>
index 5f4cd93..d1c1202 100644 (file)
@@ -11,7 +11,6 @@
 #include <linux/sizes.h>
 #include <asm/arch/imx-regs.h>
 
-
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR                 WDG1_RBASE
 
index ce6dc87..dd7cfdb 100644 (file)
@@ -63,7 +63,6 @@
 #define CFG_SYS_INIT_RAM_ADDR  0x40000000
 #define CFG_SYS_INIT_RAM_SIZE  SZ_512K
 
-
 #define CFG_SYS_SDRAM_BASE             0x40000000
 
 #define PHYS_SDRAM                     0x40000000
index 299fabc..47c56b5 100644 (file)
@@ -18,7 +18,6 @@
 #define CFG_SYS_INIT_RAM_ADDR  0x40000000
 #define CFG_SYS_INIT_RAM_SIZE  SZ_512K
 
-
 #define CFG_SYS_SDRAM_BASE             0x40000000
 
 #define PHYS_SDRAM                     0x40000000
index 4caa823..8a22f01 100644 (file)
@@ -7,7 +7,6 @@
 #ifndef __PICO_IMX6UL_CONFIG_H
 #define __PICO_IMX6UL_CONFIG_H
 
-
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
 #include "mx6_common.h"
index be31f8a..422b89a 100644 (file)
@@ -65,7 +65,6 @@
 #define CFG_SYS_INIT_RAM_ADDR  0x40000000
 #define CFG_SYS_INIT_RAM_SIZE  0x80000
 
-
 #define CFG_SYS_SDRAM_BASE             0x40000000
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000      /* 2 GiB DDR */
index ea91a06..0f8070b 100644 (file)
@@ -25,7 +25,6 @@
        "name=userdata,size=4820M,uuid=${uuid_gpt_userdata};" \
        "name=rootfs,size=-,uuid=" ROOT_UUID
 
-
 #include <configs/meson64_android.h>
 
 #endif /* __CONFIG_H */
index 6b1d5ca..74b7fe8 100644 (file)
@@ -40,7 +40,6 @@
 #define CFG_SYS_NS16550_COM1           0x44e09000
 #define CFG_SYS_NS16550_COM4           0x481a6000
 
-
 /* I2C Configuration */
 
 /* Defines for SPL */
index 64cc17c..006d649 100644 (file)
@@ -48,7 +48,6 @@
 /* I2C addresses of SPD EEPROMs */
 #define SPD_EEPROM_ADDRESS     0x50    /* CTLR 0 DIMM 0 */
 
-
 /* Hardcoded values, to use instead of SPD */
 #define CFG_SYS_DDR_CS0_BNDS           0x0000000f
 #define CFG_SYS_DDR_CS0_CONFIG         0x80010102
index c1fca83..6fe6e7b 100644 (file)
@@ -53,7 +53,6 @@
        "update_sf=run dh_update_sd_to_sf\0"                            \
        "usb_pgood_delay=1000\0"
 
-
 #include <configs/stm32mp15_common.h>
 
 #endif
index af5da09..c8a39e1 100644 (file)
@@ -95,7 +95,6 @@
 #define CACR_STATUS                    (CFG_SYS_INIT_RAM_ADDR + \
                                        CFG_SYS_INIT_RAM_SIZE - 12)
 
-
 #define CFG_SYS_I2C_0
 
 #endif /* __STMARK2_CONFIG_H */
index d2bef9b..d5bb2e9 100644 (file)
@@ -9,7 +9,6 @@
 
 #include "ls1088a_common.h"
 
-
 #define CFG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
 
 #define QSPI_NOR_BOOTCOMMAND   "run distro_bootcmd"
index 3795e61..0627617 100644 (file)
@@ -9,7 +9,6 @@
 #ifndef __CONFIG_TOPIC_MIAMI_H
 #define __CONFIG_TOPIC_MIAMI_H
 
-
 /* Speed up boot time by ignoring the environment which we never used */
 
 #include "zynq-common.h"
index 5d2956a..0da9250 100644 (file)
@@ -92,7 +92,6 @@
 
 #define CFG_SYS_FSL_USDHC_NUM  1
 
-
 #define CFG_MXC_USB_PORTSC             (PORT_PTS_UTMI | PORT_PTS_PTW)
 
 /* USB Device Firmware Update support */
index 8bd0716..d93a45d 100644 (file)
@@ -36,5 +36,4 @@
        "ramdisk_addr_r=0x4000000\0"                    \
        "ramdiskfile=initramfs.gz\0"
 
-
 #endif /* __CONFIG_H */
index 9655b66..468c5b8 100644 (file)
@@ -71,7 +71,6 @@
 /* U-Boot autoboot configuration */
 /*==============================*/
 
-
 /*=========================================*/
 /* FPGA Registers (board info and control) */
 /*=========================================*/
index 553bb1b..03af859 100644 (file)
 #define CFG_SYS_INIT_RAM_ADDR  0xFFFF0000
 #define CFG_SYS_INIT_RAM_SIZE  0x2000
 
-
 /* Extend size of kernel image for uncompression */
 
 /* Address in RAM where the parameters must be copied by SPL. */