--- /dev/null
+From 30c40f5e6b1794430f678bf23d3319354321cab7 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@nokia.com>
+Date: Tue, 14 Apr 2009 14:50:11 +0200
+Subject: [PATCH] DSS2: do bootmem reserve for exclusive access
+
+BOOTMEM_DEFAULT would allow multiple reservations for the same location,
+we need to reserve the region for our exclusive use. Also check if the
+reserve succeeded.
+
+Signed-off-by: Imre Deak <imre.deak@nokia.com>
+---
+ arch/arm/plat-omap/vram.c | 5 ++++-
+ 1 files changed, 4 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/plat-omap/vram.c b/arch/arm/plat-omap/vram.c
+index f24a110..520f260 100644
+--- a/arch/arm/plat-omap/vram.c
++++ b/arch/arm/plat-omap/vram.c
+@@ -524,7 +524,10 @@ void __init omapfb_reserve_sdram(void)
+ return;
+ }
+
+- reserve_bootmem(paddr, size, BOOTMEM_DEFAULT);
++ if (reserve_bootmem(paddr, size, BOOTMEM_EXCLUSIVE) < 0) {
++ pr_err("FB: failed to reserve VRAM\n");
++ return;
++ }
+ } else {
+ if (size > sdram_size) {
+ printk(KERN_ERR "Illegal SDRAM size for VRAM\n");
+--
+1.5.6.5
+
--- /dev/null
+From ed7a9223f6785be03951c55f3b0695b0d5635c80 Mon Sep 17 00:00:00 2001
+From: =?utf-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@nokia.com>
+Date: Thu, 9 Apr 2009 15:04:44 +0200
+Subject: [PATCH] DSS2: Fix DISPC_VID_FIR value for omap34xx
+MIME-Version: 1.0
+Content-Type: text/plain; charset=utf-8
+Content-Transfer-Encoding: 8bit
+
+The msbs of the DISPC_VID_FIR fields were incorrectly masked out on
+omap34xx and thus 4:1 downscale did not work correctly.
+
+Signed-off-by: Ville Syrjälä <ville.syrjala@nokia.com>
+---
+ drivers/video/omap2/dss/dispc.c | 5 ++++-
+ 1 files changed, 4 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
+index 076d3d4..b8a3329 100644
+--- a/drivers/video/omap2/dss/dispc.c
++++ b/drivers/video/omap2/dss/dispc.c
+@@ -994,7 +994,10 @@ static void _dispc_set_fir(enum omap_plane plane, int hinc, int vinc)
+
+ BUG_ON(plane == OMAP_DSS_GFX);
+
+- val = FLD_VAL(vinc, 27, 16) | FLD_VAL(hinc, 11, 0);
++ if (cpu_is_omap24xx())
++ val = FLD_VAL(vinc, 27, 16) | FLD_VAL(hinc, 11, 0);
++ else
++ val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0);
+ dispc_write_reg(fir_reg[plane-1], val);
+ }
+
+--
+1.5.6.5
+
--- /dev/null
+From 5390230ed12585a79683733209db34e9130b8e3b Mon Sep 17 00:00:00 2001
+From: =?utf-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@nokia.com>
+Date: Thu, 9 Apr 2009 15:04:43 +0200
+Subject: [PATCH] DSS2: Prefer 3-tap filter
+MIME-Version: 1.0
+Content-Type: text/plain; charset=utf-8
+Content-Transfer-Encoding: 8bit
+
+The 5-tap filter seems rather unstable. With some scaling settings it
+works and with some it doesn't even though the functional clock remains
+within the TRM limits. So prefer the 3-tap filter unless the functional
+clock required for it is too high.
+
+Signed-off-by: Ville Syrjälä <ville.syrjala@nokia.com>
+---
+ drivers/video/omap2/dss/dispc.c | 27 ++++++++++++---------------
+ 1 files changed, 12 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
+index b8a3329..b631dd8 100644
+--- a/drivers/video/omap2/dss/dispc.c
++++ b/drivers/video/omap2/dss/dispc.c
+@@ -1405,15 +1405,10 @@ static unsigned long calc_fclk_five_taps(u16 width, u16 height,
+ }
+
+ static unsigned long calc_fclk(u16 width, u16 height,
+- u16 out_width, u16 out_height,
+- enum omap_color_mode color_mode, bool five_taps)
++ u16 out_width, u16 out_height)
+ {
+ unsigned int hf, vf;
+
+- if (five_taps)
+- return calc_fclk_five_taps(width, height,
+- out_width, out_height, color_mode);
+-
+ /*
+ * FIXME how to determine the 'A' factor
+ * for the no downscaling case ?
+@@ -1494,7 +1489,7 @@ static int _dispc_setup_plane(enum omap_plane plane,
+ } else {
+ /* video plane */
+
+- unsigned long fclk;
++ unsigned long fclk = 0;
+
+ if (out_width < width / maxdownscale ||
+ out_width > width * 8)
+@@ -1530,20 +1525,22 @@ static int _dispc_setup_plane(enum omap_plane plane,
+ /* Must use 5-tap filter? */
+ five_taps = height > out_height * 2;
+
+- /* Try to use 5-tap filter whenever possible. */
+- if (cpu_is_omap34xx() && !five_taps &&
+- height > out_height && width <= 1024) {
+- fclk = calc_fclk_five_taps(width, height,
+- out_width, out_height, color_mode);
+- if (fclk <= dispc_fclk_rate())
++ if (!five_taps) {
++ fclk = calc_fclk(width, height,
++ out_width, out_height);
++
++ /* Try 5-tap filter if 3-tap fclk is too high */
++ if (cpu_is_omap34xx() && height > out_height &&
++ fclk > dispc_fclk_rate())
+ five_taps = true;
+ }
+
+ if (width > (2048 >> five_taps))
+ return -EINVAL;
+
+- fclk = calc_fclk(width, height, out_width, out_height,
+- color_mode, five_taps);
++ if (five_taps)
++ fclk = calc_fclk_five_taps(width, height,
++ out_width, out_height, color_mode);
+
+ DSSDBG("required fclk rate = %lu Hz\n", fclk);
+ DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate());
+--
+1.5.6.5
+
git.openpandora.org / openembedded.git / commitdiff