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ARM i.MX6q: Fix periph_clk2_sel and periph2_clk2_sel clocks
authorPhilipp Zabel <p.zabel@pengutronix.de>
Wed, 17 Apr 2013 10:05:58 +0000 (12:05 +0200)
committerShawn Guo <shawn.guo@linaro.org>
Sun, 12 May 2013 13:35:22 +0000 (21:35 +0800)
The periph_clk2_sel mux can be set to pll3, osc/pll1_ref_clk, or osc/
pll2_burn_in_clk. The periph2_clk2_sel mux can be set to pll3 or pll2.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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