pwm: mediatek: add pwm3 support for mt7981

This patch adds pwm channel 2 (pwm3) support for mt7981

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>

diff --git a/arch/arm/dts/mt7981-emmc-rfb.dts b/arch/arm/dts/mt7981-emmc-rfb.dts
index 9aa7cd8..d6590f0 100644 (file)
--- a/arch/arm/dts/mt7981-emmc-rfb.dts
+++ b/arch/arm/dts/mt7981-emmc-rfb.dts
@@ -95,6 +95,14 @@
                };
        };
 
+       /* pin13 as pwm0, pin15 as pwm1, pin7 as pwm2 */
+       three_pwm_pins_1: three-pwm-pins {
+               mux {
+                       function = "pwm";
+                       groups = "pwm0_0", "pwm1_1", "pwm2";
+               };
+       };
+
        mmc0_pins_default: mmc0default {
                mux {
                        function = "flash";

diff --git a/arch/arm/dts/mt7981-rfb.dts b/arch/arm/dts/mt7981-rfb.dts
index 9b61373..d6ebd65 100644 (file)
--- a/arch/arm/dts/mt7981-rfb.dts
+++ b/arch/arm/dts/mt7981-rfb.dts
@@ -123,6 +123,14 @@
                        groups = "pwm0_1", "pwm1_0", "pwm2";
                };
        };
+
+       /* pin13 as pwm0, pin15 as pwm1, pin7 as pwm2 */
+       three_pwm_pins_1: three-pwm-pins {
+               mux {
+                       function = "pwm";
+                       groups = "pwm0_0", "pwm1_1", "pwm2";
+               };
+       };
 };
 
 &spi0 {

diff --git a/arch/arm/dts/mt7981-sd-rfb.dts b/arch/arm/dts/mt7981-sd-rfb.dts
index 7d70808..50ded1e 100644 (file)
--- a/arch/arm/dts/mt7981-sd-rfb.dts
+++ b/arch/arm/dts/mt7981-sd-rfb.dts
@@ -95,6 +95,14 @@
                };
        };
 
+       /* pin13 as pwm0, pin15 as pwm1, pin7 as pwm2 */
+       three_pwm_pins_1: three-pwm-pins {
+               mux {
+                       function = "pwm";
+                       groups = "pwm0_0", "pwm1_1", "pwm2";
+               };
+       };
+
        mmc0_pins_default: mmc0default {
                mux {
                        function = "flash";

diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index a9991a1..43e5058 100644 (file)
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -137,8 +137,14 @@
                         <&infracfg CLK_INFRA_PWM1_CK>,
                         <&infracfg CLK_INFRA_PWM2_CK>,
                         <&infracfg CLK_INFRA_PWM3_CK>;
-               assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>;
-               assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>;
+               assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>,
+                                 <&infracfg CLK_INFRA_PWM1_SEL>,
+                                 <&infracfg CLK_INFRA_PWM2_SEL>,
+                                 <&infracfg CLK_INFRA_PWM3_SEL>;
+               assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>,
+                                        <&topckgen CLK_TOP_PWM_SEL>,
+                                        <&topckgen CLK_TOP_PWM_SEL>,
+                                        <&topckgen CLK_TOP_PWM_SEL>;
                clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
                status = "disabled";
        };

diff --git a/drivers/pwm/pwm-mtk.c b/drivers/pwm/pwm-mtk.c
index 9776a41..5cf2eba 100644 (file)
--- a/drivers/pwm/pwm-mtk.c
+++ b/drivers/pwm/pwm-mtk.c
@@ -192,7 +192,7 @@ static const struct mtk_pwm_soc mt7629_data = {
 };
 
 static const struct mtk_pwm_soc mt7981_data = {
-       .num_pwms = 2,
+       .num_pwms = 3,
        .pwm45_fixup = false,
        .reg_ver = PWM_REG_V2,
 };