clk: tegra: add ac97 controller clock
authorLucas Stach <dev@lynxeye.de>
Mon, 6 May 2013 21:11:11 +0000 (15:11 -0600)
committerOlof Johansson <olof@lixom.net>
Tue, 21 May 2013 06:24:34 +0000 (23:24 -0700)
AC97 controller clock is hardwired to pll_a_out0.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

No differences found