--- /dev/null
+Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c
+===================================================================
+--- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c
++++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c
+@@ -28,6 +28,7 @@
+ #endif
+ #include <pci.h>
+ #include <mpc83xx.h>
++#include <spi.h>
+
+ DECLARE_GLOBAL_DATA_PTR;
+
+@@ -107,3 +108,33 @@ void ft_board_setup(void *blob, bd_t *bd
+ #endif
+ }
+ #endif
++
++
++/*
++ * The following are used to control the SPI chip selects for the SPI command.
++ */
++#ifdef CONFIG_HARD_SPI
++
++#define SPI_CS_MASK 0x80000000
++
++void spi_eeprom_chipsel(int cs)
++{
++ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
++
++ if (cs)
++ iopd->dat &= ~SPI_CS_MASK;
++ else
++ iopd->dat |= SPI_CS_MASK;
++}
++
++/*
++ * The SPI command uses this table of functions for controlling the SPI
++ * chip selects.
++ */
++spi_chipsel_type spi_chipsel[] = {
++ spi_eeprom_chipsel,
++};
++int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
++
++#endif /* CONFIG_HARD_SPI */
++
+Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h
+===================================================================
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h
+@@ -369,6 +369,7 @@
+ #define CONFIG_CMD_PCI
+ #define CONFIG_CMD_NAND
+ #define CONFIG_CMD_JFFS2
++#define CONFIG_CMD_SPI
+
+ #if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+@@ -386,6 +387,11 @@
+ #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:384k(uboot),64k(env)"
+
+
++/* SPI */
++#define CONFIG_MPC8XXX_SPI
++#define CONFIG_HARD_SPI /* SPI with hardware support */
++#undef CONFIG_SOFT_SPI /* SPI bit-banged */
++
+ /*
+ * Miscellaneous configurable options
+ */
+Index: u-boot-1.3.2/drivers/spi/mpc8xxx_spi.c
+===================================================================
+--- u-boot-1.3.2.orig/drivers/spi/mpc8xxx_spi.c
++++ u-boot-1.3.2/drivers/spi/mpc8xxx_spi.c
+@@ -34,6 +34,8 @@
+ #define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
+ #define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
+ #define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
++#define SPI_MODE_DIV16 (0x80000000 >> 4) /*Divide by 16. */
++#define SPI_MODE_LEN_8 (0x00700000) /*0111 8-bit characters*/
+
+ #define SPI_TIMEOUT 1000
+
+@@ -45,9 +47,7 @@ void spi_init(void)
+ * SPI pins on the MPC83xx are not muxed, so all we do is initialize
+ * some registers
+ */
+- spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
+- spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8
+- (16.67MHz typ.) */
++ spi->mode = SPI_MODE_DIV16 |SPI_MODE_LEN_8| SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
+ spi->event = 0xffffffff; /* Clear all SPI events */
+ spi->mask = 0x00000000; /* Mask all SPI interrupts */
+ spi->com = 0; /* LST bit doesn't do anything, so disregard */
===================================================================
--- /dev/null
+++ u-boot-1.3.2/common/cmd_lcd.c
-@@ -0,0 +1,243 @@
+@@ -0,0 +1,237 @@
+/*
+ * (C) Copyright 2008
+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com
+#define DELAY 1
+#define AEL 0x0F
+
-+static void NT7506_init_lcd(char ael);
-+static void NT7506_print_splash(char * Picture,char width,char height);
-+static void NT7506_set_xaddr(unsigned char x);
-+static void NT7506_set_yaddr(unsigned char y);
-+static void NT7506_writeb_data(unsigned char value);
-+static void NT7506_writeb_ctl(unsigned char value);
-+static void iowrite16(unsigned short value);
+
+static void iowrite16(unsigned short value)
+{
+ NT7506_writeb_ctl(NT_COL_LSB | (x & 0x0F) ); //Send low nibble
+}
+
-+static void ImageRota(char * src,char * dest, int w ,int h)
++static void ImageRota(unsigned char *src, unsigned char *dest, int w ,int h)
+{
+ int i,j,bit,IndexRead;
+ char mask=0;
+}
+
+
-+static void NT7506_print_splash(char * picture,char width,char height)
++static void NT7506_print_splash(unsigned char *picture, char width, char height)
+{
+ int i;
-+ char value;
-+ char imagerota[2048];
++ unsigned char imagerota[2048];
+ int indeximage=0;
+
-+ int x,y,xfb,yfb,Index;
++ int x,y,xfb,yfb;
+ char src[2048];
+ if(width>128)
+ width=128;
+
+
+/**************************************************/
-+void do_lcd(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
++int do_lcd(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ char lcd_ael=AEL;
+ if(argc>1)
+
+ NT7506_init_lcd(lcd_ael);
+ NT7506_print_splash(Bollore_bits,Bollore_width,Bollore_height);
++
++ return 0;
+}
+
+U_BOOT_CMD(
+ "lcd\n"
+);
+
-+void do_backlight(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
++int do_backlight(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ if (!strncmp(argv[1], "on", 7))
+ {
--- /dev/null
+Index: u-boot-1.3.2/drivers/mtd/nand/nand_bbt.c
+===================================================================
+--- u-boot-1.3.2.orig/drivers/mtd/nand/nand_bbt.c 2008-03-09 16:20:02.000000000 +0100
++++ u-boot-1.3.2/drivers/mtd/nand/nand_bbt.c 2009-02-06 14:50:35.000000000 +0100
+@@ -914,10 +914,11 @@
+ .pattern = scan_ff_pattern
+ };
+
++//Samsung makes sure that either the 1st or 2nd page of every initial invalid block has non-FFh data at the column address of 2048.
+ static struct nand_bbt_descr largepage_memorybased = {
+ .options = 0,
+ .offs = 0,
+- .len = 2,
++ .len = 1,
+ .pattern = scan_ff_pattern
+ };
+
+Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h
+===================================================================
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2009-02-06 15:42:07.000000000 +0100
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2009-02-06 15:42:45.000000000 +0100
+@@ -205,6 +205,7 @@
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V ) /* valid */
+ #define CFG_OR1_PRELIM ( 0xFFFF8000 /* length 32K */ \
++ | OR_FCM_PGS \
+ | OR_FCM_CSCT \
+ | OR_FCM_CST \
+ | OR_FCM_CHT \
===================================================================
--- u-boot-1.3.2.orig/common/main.c
+++ u-boot-1.3.2/common/main.c
-@@ -377,6 +377,15 @@ void main_loop (void)
+@@ -39,6 +39,7 @@
+ #endif
+
+ #include <post.h>
++#include <gpio.h>
+
+ #ifdef CONFIG_SILENT_CONSOLE
+ DECLARE_GLOBAL_DATA_PTR;
+@@ -377,6 +378,15 @@ void main_loop (void)
}
else
#endif /* CONFIG_BOOTCOUNT_LIMIT */
===================================================================
--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h
+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h
-@@ -405,6 +405,7 @@
+@@ -406,6 +406,7 @@
#define PRE_INIT_GPIO 0x28
#define INIT_GPIO 0x08
#define MAX_GPIO_OUT 7
/* Digital Thermometer and Thermostat */
#define CONFIG_DTT_LM73 1
-@@ -558,6 +559,7 @@
+@@ -559,6 +560,7 @@
* Environment Configuration
*/
#define CONFIG_ENV_OVERWRITE
--- /dev/null
+Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c
+===================================================================
+--- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c
++++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c
+@@ -135,8 +135,9 @@ void pci_init_board(void)
+ struct pci_region *reg[] = { pci_regions };
+ int warmboot;
+
+- /* Enable all 3 PCI_CLK_OUTPUTs. */
+- clk->occr |= 0xe0000000;
++ /* Enable PCI_CLK_OUTPUT 1 only.
++ Disable others for better EMC footprint. */
++ clk->occr = (clk->occr & 0x1fffffff) | OCCR_PCICOE1;
+
+ /*
+ * Configure PCI Local Access Windows
+Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h
+===================================================================
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h
+@@ -133,8 +133,8 @@
+ #define CFG_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
+ /*0x02000000*/
+ #define CFG_DDRCDR_VALUE ( DDRCDR_EN \
+- | DDRCDR_PZ_NOMZ \
+- | DDRCDR_NZ_NOMZ \
++ | DDRCDR_PZ_MAXZ \
++ | DDRCDR_NZ_MAXZ \
+ | DDRCDR_M_ODR )
+
+ /*
--- /dev/null
+Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h
+===================================================================
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h
+@@ -60,7 +60,7 @@
+ * to access the PMC registers, unless a JTAG debugger is
+ * connected, or some resistor modifications are made.
+ */
+-#define CFG_8313ERDB_BROKEN_PMC 1
++#undef CFG_8313ERDB_BROKEN_PMC
+
+ #define CFG_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
+ #define CFG_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
+Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c
+===================================================================
+--- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c
++++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c
+@@ -30,6 +30,7 @@
+ #include <mpc83xx.h>
+ #include <spi.h>
+ #include <gpio.h>
++#include <asm/processor.h>
+
+ DECLARE_GLOBAL_DATA_PTR;
+
+@@ -39,7 +40,29 @@ int board_early_init_f(void)
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+
+ if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
+- gd->flags |= GD_FLG_SILENT;
++ {
++ volatile immap_t *immap = (immap_t *) CFG_IMMR;
++ ulong msr;
++ /* Interrupts and MMU off */
++ __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
++
++ msr &= ~( MSR_EE | MSR_IR | MSR_DR);
++ __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
++
++ /* enable Reset Control Reg */
++ immap->reset.rpr = 0x52535445;
++ __asm__ __volatile__ ("sync");
++ __asm__ __volatile__ ("isync");
++
++ /* confirm Reset Control Reg is enabled */
++ while(!((immap->reset.rcer) & RCER_CRE));
++
++ udelay(200);
++
++ /* perform reset, only one bit */
++ immap->reset.rcr = RCR_SWHR;
++ }
++
+ #endif
+
+ return 0;
DEFAULT_PREFERENCE = "-1"
-PR = "r9"
+PR = "r10"
SRC_URI = "ftp://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2"
file://mpc8313e-rdb-nand.patch;patch=1 \
file://mpc8313e-rdb-mtdparts.patch;patch=1 \
file://mpc8313e-rdb-eeprom.patch;patch=1 \
- file://001-090115-SPI.patch;patch=1 \
+ file://001-090205-SPI.patch;patch=1 \
file://002-081212-GPIO.patch;patch=1 \
file://003-081205-DTT_LM73.patch;patch=1 \
file://006-081211-EEPROM_M24C32.patch;patch=1 \
file://010-081212-LCD.patch;patch=1 \
file://011-081211-CMD_TEST.patch;patch=1 \
file://012-081209-BUG_SETENV.patch;patch=1 \
- file://013-081211-FIX_OOB_8BITS_LARGEPAGE_NAND.patch;patch=1 \
+ file://013-090206-FIX_OOB_8BITS_LARGEPAGE_NAND.patch;patch=1 \
file://014-081211-BOOT_RESCUE.patch;patch=1 \
+ file://015-090205-EMC.patch;patch=1 \
+ file://016-090209-PM.patch;patch=1 \
"
PACKAGE_ARCH = "${MACHINE_ARCH}"
git.openpandora.org / openembedded.git / commitdiff