Add missing uboot patch for dht-walnut
authorStelios Koroneos <skoroneos@digital-opsis.com>
Sat, 3 Feb 2007 10:58:14 +0000 (10:58 +0000)
committerStelios Koroneos <skoroneos@digital-opsis.com>
Sat, 3 Feb 2007 10:58:14 +0000 (10:58 +0000)
packages/uboot/u-boot-1.1.4/u-boot-dht-walnut-df2.patch [new file with mode: 0644]

diff --git a/packages/uboot/u-boot-1.1.4/u-boot-dht-walnut-df2.patch b/packages/uboot/u-boot-1.1.4/u-boot-dht-walnut-df2.patch
new file mode 100644 (file)
index 0000000..5b267d8
--- /dev/null
@@ -0,0 +1,186 @@
+diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c
+index f1a96a6..86bcc65 100644
+--- a/board/amcc/walnut/walnut.c
++++ b/board/amcc/walnut/walnut.c
+@@ -73,7 +73,11 @@ int checkboard(void)
+       if (pvr == PVR_405GPR_RB) {
+               puts("Board: Sycamore - AMCC PPC405GPr Evaluation Board");
+       } else {
++#ifdef CONFIG_DHT_WALNUT
++              puts("Board: DHT Walnut");
++#else
+               puts("Board: Walnut - AMCC PPC405GP Evaluation Board");
++#endif
+       }
+       if (s != NULL) {
+diff --git a/cpu/ppc4xx/spd_sdram.c b/cpu/ppc4xx/spd_sdram.c
+index ebd5f39..1c4c4b1 100644
+--- a/cpu/ppc4xx/spd_sdram.c
++++ b/cpu/ppc4xx/spd_sdram.c
+@@ -398,19 +398,24 @@ long int spd_sdram(int(read_spd)(uint ad
+       tmp = SDRAM0_BXCR_SZ(bank_code) | SDRAM0_BXCR_AM(mode) | 1;
+       sdram0_b0cr = (bank_size * 0) | tmp;
+-#ifndef CONFIG_405EP /* not on PPC405EP */
++#if defined(CONFIG_405EP)
++      /* PPC405EP chip only supports two SDRAM banks */
++      if (bank_cnt > 1)
++              sdram0_b1cr = (bank_size * 1) | tmp;
++      if (bank_cnt > 2)
++              total_size = 2 * bank_size;
++#elif defined(CONFIG_DHT_WALNUT)
++      if (bank_cnt > 1) {
++              sdram0_b2cr = (bank_size * 1) | tmp;
++              total_size = 2 * bank_size;
++      }
++#else
+       if (bank_cnt > 1)
+               sdram0_b2cr = (bank_size * 1) | tmp;
+       if (bank_cnt > 2)
+               sdram0_b1cr = (bank_size * 2) | tmp;
+       if (bank_cnt > 3)
+               sdram0_b3cr = (bank_size * 3) | tmp;
+-#else
+-      /* PPC405EP chip only supports two SDRAM banks */
+-      if (bank_cnt > 1)
+-              sdram0_b1cr = (bank_size * 1) | tmp;
+-      if (bank_cnt > 2)
+-              total_size = 2 * bank_size;
+ #endif
+       /*
+diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c
+index 3302457..7f6d33a 100644
+--- a/drivers/pci_auto.c
++++ b/drivers/pci_auto.c
+@@ -296,10 +296,12 @@ int pciauto_config_device(struct pci_con
+       case PCI_CLASS_STORAGE_IDE:
+               pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prg_iface);
++#ifndef CONFIG_DHT_WALNUT
+               if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
+                       DEBUGF("PCI Autoconfig: Skipping legacy mode IDE controller\n");
+                       return sub_bus;
+               }
++#endif
+               pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io);
+               break;
+diff --git a/include/configs/walnut.h b/include/configs/walnut.h
+index 1171ee5..df9e8ac 100644
+--- a/include/configs/walnut.h
++++ b/include/configs/walnut.h
+@@ -37,6 +37,7 @@
+ #define CONFIG_4xx            1       /* ...member of PPC4xx family   */
+ #define CONFIG_WALNUT         1       /* ...on a WALNUT board         */
+                                       /* ...and on a SYCAMORE board   */
++#define CONFIG_DHT_WALNUT     1       /* Just like a walnut, but .... */
+ #define CONFIG_BOARD_EARLY_INIT_F 1   /* Call board_early_init_f      */
+@@ -88,10 +89,36 @@
+ #define CFG_LOADS_BAUD_CHANGE 1       /* allow baudrate change        */
+ #define CONFIG_MII            1       /* MII PHY management           */
++#ifdef CONFIG_DHT_WALNUT
++#define CONFIG_ETHADDR                de:ad:be:ef:00:00
++#define CONFIG_ENV_OVERWRITE  1
++#define CONFIG_PHY_ADDR               9       /* PHY address                  */
++#else
+ #define CONFIG_PHY_ADDR               1       /* PHY address                  */
++#endif
+ #define CONFIG_RTC_DS174x     1       /* use DS1743 RTC in Walnut     */
++#ifdef CONFIG_DHT_WALNUT
++#define CONFIG_COMMANDS              (CONFIG_CMD_DFL  | \
++                              CFG_CMD_ASKENV  | \
++                              CFG_CMD_DATE    | \
++                              CFG_CMD_DHCP    | \
++                              CFG_CMD_DIAG    | \
++                              CFG_CMD_ELF     | \
++                              CFG_CMD_I2C     | \
++                              CFG_CMD_IRQ     | \
++                              CFG_CMD_MII     | \
++                              CFG_CMD_NET     | \
++                              CFG_CMD_NFS     | \
++                              CFG_CMD_PCI     | \
++                              CFG_CMD_PING    | \
++                              CFG_CMD_REGINFO | \
++                              CFG_CMD_SDRAM   | \
++                              CFG_CMD_IDE     | \
++                              CFG_CMD_BEDBUG  | \
++                              CFG_CMD_SNTP    )
++#else
+ #define CONFIG_COMMANDS              (CONFIG_CMD_DFL  | \
+                               CFG_CMD_ASKENV  | \
+                               CFG_CMD_DATE    | \
+@@ -108,6 +135,7 @@
+                               CFG_CMD_REGINFO | \
+                               CFG_CMD_SDRAM   | \
+                               CFG_CMD_SNTP    )
++#endif
+ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+ #include <cmd_confdefs.h>
+@@ -151,7 +179,7 @@
+ #define CFG_BAUDRATE_TABLE  \
+     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+-#define CFG_LOAD_ADDR         0x100000        /* default load address */
++#define CFG_LOAD_ADDR         0x200000        /* default load address */
+ #define CFG_EXTBDINFO         1       /* To use extended board_into (bd_t) */
+ #define CFG_HZ                1000            /* decrementer freq: 1 ms ticks */
+@@ -198,6 +226,50 @@
+ #define CFG_PCI_PTM2MS        0x00000000      /* disabled                     */
+ #define CFG_PCI_PTM2PCI 0x04000000    /* Host: use this pci address   */
++#ifdef CONFIG_DHT_WALNUT
++/***********************************************************************
++ * External peripheral base address
++ ***********************************************************************/
++#define CFG_ISA_IO_BASE_ADDRESS 0xE8000000
++
++/************************************************************
++ * IDE/ATA stuff
++ ************************************************************/
++#define CFG_IDE_MAXBUS                1                  /* max. 2 IDE busses  */
++#define CFG_IDE_MAXDEVICE     (CFG_IDE_MAXBUS*2) /* max. 2 per IDE bus */
++
++#define CFG_ATA_BASE_ADDR     CFG_ISA_IO_BASE_ADDRESS /* base address */
++#define CFG_ATA_IDE0_OFFSET   0x01F0          /* ide0 offset          */
++#define CFG_ATA_DATA_OFFSET   0               /* data reg offset      */
++#define CFG_ATA_REG_OFFSET    0               /* reg offset           */
++#define CFG_ATA_ALT_OFFSET    0x200           /* alternate register offset */
++
++#undef CONFIG_IDE_8xx_DIRECT          /* no pcmcia interface required */
++#undef CONFIG_IDE_LED                 /* no led for ide supported     */
++#undef CONFIG_IDE_RESET                       /* no reset for ide supported   */
++
++#define CONFIG_LBA48          1
++#define CONFIG_MAC_PARTITION  1
++#define CONFIG_DOS_PARTITION  1
++#define CONFIG_ISO_PARTITION  1
++
++#define CONFIG_SUPPORT_VFAT
++
++/************************************************************
++ * ATAPI support (experimental)
++ ************************************************************/
++#define CONFIG_ATAPI                  /* enable ATAPI Support */
++
++/************************************************************
++ * SCSI support (experimental) only SYM53C8xx supported
++ ************************************************************/
++#define CONFIG_SCSI_SYM53C8XX
++#define CFG_SCSI_MAX_LUN      8       /* number of supported LUNs */
++#define CFG_SCSI_MAX_SCSI_ID  7       /* maximum SCSI ID (0..6) */
++#define CFG_SCSI_MAX_DEVICE   CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN /* maximum Target devices */
++#define CFG_SCSI_SPIN_UP_TIME 2
++#endif
++
+ /*-----------------------------------------------------------------------
+  * Start addresses for the final memory configuration
+  * (Set up by the startup code)