#
CONFIG_MACH_OMAP3_BEAGLE=y
# CONFIG_MACH_OMAP_LDP is not set
-CONFIG_MACH_OVERO=y
+CONFIG_MACH_OVERO=n
CONFIG_MACH_OMAP3EVM=y
# CONFIG_MACH_OMAP3_PANDORA is not set
# CONFIG_MACH_OMAP_3430SDP is not set
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
-@@ -412,7 +412,8 @@ static void __init omap3_beagle_init(void)
- gpio_direction_output(170, true);
-
- usb_musb_init();
-- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
-+ usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true,
-+ -EINVAL, 147);
- omap3beagle_flash_init();
-
- /* Ensure SDRC pins are mux'd for self-refresh */
---
-1.6.0.4
-
--- /dev/null
+From f5d23fe1ff54df953c7b65699d6065b4a6336932 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Mon, 3 Aug 2009 11:16:18 +0530
+Subject: [PATCH 01/16] musb: fix put_device() call sequence
+
+Invoke put_device(musb->xceiv->dev) before musb_platform_exit()as
+xceiv is getting unregistered in musb_platform_exit().
+
+Fixes put_device() panic when module insert/removal is performed
+multiple times.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/musb/musb_core.c | 8 ++++----
+ 1 files changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
+index c7c1ca0..129f9dc 100644
+--- a/drivers/usb/musb/musb_core.c
++++ b/drivers/usb/musb/musb_core.c
+@@ -1850,6 +1850,10 @@ static void musb_free(struct musb *musb)
+ dma_controller_destroy(c);
+ }
+
++#ifdef CONFIG_USB_MUSB_OTG
++ put_device(musb->xceiv->dev);
++#endif
++
+ musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
+ musb_platform_exit(musb);
+ musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
+@@ -1859,10 +1863,6 @@ static void musb_free(struct musb *musb)
+ clk_put(musb->clock);
+ }
+
+-#ifdef CONFIG_USB_MUSB_OTG
+- put_device(musb->xceiv->dev);
+-#endif
+-
+ #ifdef CONFIG_USB_MUSB_HDRC_HCD
+ usb_put_hcd(musb_to_hcd(musb));
+ #else
+--
+1.6.2.4
+
--- /dev/null
+From 9c6a05af8f862025f5187a2f37be87db39ae709f Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Fri, 3 Jul 2009 15:55:24 +0530
+Subject: [PATCH 02/16] ehci: fix ehci pin mux init
+
+EHCI pin mux init fucntion is still using old #ifdef which are not defined
+anymore.This causes pin mux init to always set TLL settings and thus EHCI
+PHY mode doesn't work.
+
+Fixing this issue by using phy_mode parameter to initialize mux settings.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
+---
+ arch/arm/mach-omap2/usb-ehci.c | 167 ++++++++++++++++++++--------------------
+ 1 files changed, 83 insertions(+), 84 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
+index 56fc7f4..6a96569 100644
+--- a/arch/arm/mach-omap2/usb-ehci.c
++++ b/arch/arm/mach-omap2/usb-ehci.c
+@@ -68,90 +68,89 @@ static struct platform_device ehci_device = {
+ /*
+ * setup_ehci_io_mux - initialize IO pad mux for USBHOST
+ */
+-static void setup_ehci_io_mux(void)
++static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
+ {
+-#ifdef CONFIG_OMAP_EHCI_PHY_MODE
+- /* PHY mode of operation for board: 750-2083-001
+- * ISP1504 connected to Port1 and Port2
+- * Do Func Mux setting for 12-pin ULPI PHY mode
+- */
+-
+- /* Port1 */
+- omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
+- omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
+- omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
+- omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT);
+- omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0);
+- omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1);
+- omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2);
+- omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3);
+- omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4);
+- omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
+- omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
+- omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
+-
+- /* Port2 */
+- omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
+- omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
+- omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
+- omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
+- omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
+- omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
+- omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
+- omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
+- omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
+- omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
+- omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
+- omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
+-
+-#else
+- /* Set Func mux for :
+- * TLL mode of operation
+- * 12-pin ULPI SDR TLL mode for Port1/2/3
+- */
+-
+- /* Port1 */
+- omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
+- omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
+- omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
+- omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT);
+- omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0);
+- omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1);
+- omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2);
+- omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3);
+- omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4);
+- omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
+- omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
+- omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
+-
+- /* Port2 */
+- omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
+- omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
+- omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
+- omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT);
+- omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0);
+- omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1);
+- omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2);
+- omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3);
+- omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4);
+- omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
+- omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
+- omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
+-
+- /* Port3 */
+- omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
+- omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
+- omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
+- omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT);
+- omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0);
+- omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1);
+- omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2);
+- omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3);
+- omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4);
+- omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
+- omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
+- omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
+-#endif /* CONFIG_OMAP_EHCI_PHY_MODE */
++ if (phy_mode == EHCI_HCD_OMAP_MODE_PHY) {
++ /* PHY mode of operation for board: 750-2083-001
++ * ISP1504 connected to Port1 and Port2
++ * Do Func Mux setting for 12-pin ULPI PHY mode
++ */
++ /* Port1 */
++ omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
++ omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
++ omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
++ omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT);
++ omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0);
++ omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1);
++ omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2);
++ omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3);
++ omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4);
++ omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
++ omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
++ omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
++
++ /* Port2 */
++ omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
++ omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
++ omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
++ omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
++ omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
++ omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
++ omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
++ omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
++ omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
++ omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
++ omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
++ omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
++
++ } else {
++ /* Set Func mux for :
++ * TLL mode of operation
++ * 12-pin ULPI SDR TLL mode for Port1/2/3
++ */
++
++ /* Port1 */
++ omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
++ omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
++ omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
++ omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT);
++ omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0);
++ omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1);
++ omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2);
++ omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3);
++ omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4);
++ omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
++ omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
++ omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
++
++ /* Port2 */
++ omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
++ omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
++ omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
++ omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT);
++ omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0);
++ omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1);
++ omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2);
++ omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3);
++ omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4);
++ omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
++ omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
++ omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
++
++ /* Port3 */
++ omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
++ omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
++ omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
++ omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT);
++ omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0);
++ omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1);
++ omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2);
++ omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3);
++ omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4);
++ omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
++ omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
++ omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
++ }
+
+ return;
+ }
+@@ -172,7 +171,7 @@ void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
+
+ /* Setup Pin IO MUX for EHCI */
+ if (cpu_is_omap34xx())
+- setup_ehci_io_mux();
++ setup_ehci_io_mux(phy_mode);
+
+ if (platform_device_register(&ehci_device) < 0) {
+ printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
+--
+1.6.2.4
+
--- /dev/null
+From 2f0fe550c81056cb22c0cb8bf54c464e313e1047 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Mon, 6 Jul 2009 12:46:08 +0530
+Subject: [PATCH 03/16] ehci: adding mux pin for EHCI phy reset line
+
+GPIO135 is used as EHCI (port2) phy reset pin on Multi Media Daughter card
+connected to OMAP3EVM.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ arch/arm/mach-omap2/mux.c | 2 ++
+ arch/arm/plat-omap/include/mach/mux.h | 1 +
+ 2 files changed, 3 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
+index 2daa595..339ba80 100644
+--- a/arch/arm/mach-omap2/mux.c
++++ b/arch/arm/mach-omap2/mux.c
+@@ -472,6 +472,8 @@ MUX_CFG_34XX("G25_34XX_GPIO86_OUT", 0x0fc,
+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+ MUX_CFG_34XX("AG4_34XX_GPIO134_OUT", 0x160,
+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
++MUX_CFG_34XX("AF4_34XX_GPIO135_OUT", 0x162,
++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+ MUX_CFG_34XX("AE4_34XX_GPIO136_OUT", 0x164,
+ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+ MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
+diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
+index 98dfab6..4bcf8a5 100644
+--- a/arch/arm/plat-omap/include/mach/mux.h
++++ b/arch/arm/plat-omap/include/mach/mux.h
+@@ -846,6 +846,7 @@ enum omap34xx_index {
+ L8_34XX_GPIO63,
+ G25_34XX_GPIO86_OUT,
+ AG4_34XX_GPIO134_OUT,
++ AF4_34XX_GPIO135_OUT,
+ AE4_34XX_GPIO136_OUT,
+ AF6_34XX_GPIO140_UP,
+ AE6_34XX_GPIO141,
+--
+1.6.2.4
+
--- /dev/null
+From 4cc29612d5a706049b14e67bcc3b22490bdddcf7 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Fri, 10 Jul 2009 10:01:39 +0530
+Subject: [PATCH 04/16] ehci: correct EHCI init parameters on OMAP3EVM
+
+Multimedia Daughter card on OMAP3EVM uses port2 as EHCI port.
+Other ports (port1 and port3)are not used.
+
+GPIO135 has been used as EHCI phy reset pin so the mux config
+is also setup.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ arch/arm/mach-omap2/board-omap3evm.c | 4 +++-
+ 1 files changed, 3 insertions(+), 1 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
+index 35f6075..18b747b 100644
+--- a/arch/arm/mach-omap2/board-omap3evm.c
++++ b/arch/arm/mach-omap2/board-omap3evm.c
+@@ -308,7 +308,9 @@ static void __init omap3_evm_init(void)
+ usb_nop_xceiv_register();
+ #endif
+ usb_musb_init();
+- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
++ /* Setup EHCI phy reset padconfig */
++ omap_cfg_reg(AF4_34XX_GPIO135_OUT);
++ usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, -EINVAL, 135);
+ ads7846_dev_init();
+ }
+
+--
+1.6.2.4
+
+From 42c413f8f9005a5ca109f82baff81f8e400b8854 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Mon, 13 Jul 2009 14:10:46 +0530
+Subject: [PATCH 05/16] ehci: fix phy_reset init in ehci probe
+
phy_reset is not getting updated from platform_data.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
--
1.6.2.4
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at http://vger.kernel.org/majordomo-info.html
--- /dev/null
+From 4e499dd02940a567ca805010e9c3f78d8ab7bc79 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Mon, 6 Jul 2009 17:59:02 +0530
+Subject: [PATCH 06/16] ehci: increase timeout to fix ehci failure
+
+Sometime during TLL reset and waiting loop for TLL reset timeouts and thus
+ehci init fails. Fixing this by increasing timeout value.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
+---
+ drivers/usb/host/ehci-omap.c | 2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
+index 55e5259..c7631f5 100644
+--- a/drivers/usb/host/ehci-omap.c
++++ b/drivers/usb/host/ehci-omap.c
+@@ -244,7 +244,7 @@ static void omap_usb_utmi_init(struct ehci_hcd_omap *omap, u8 tll_channel_mask)
+ */
+ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+ {
+- unsigned long timeout = jiffies + msecs_to_jiffies(100);
++ unsigned long timeout = jiffies + msecs_to_jiffies(1000);
+ unsigned reg = 0;
+ int ret = 0;
+
+--
+1.6.2.4
+
--- /dev/null
+From 4d0b781b146ee79cee1208589498e8ac959d5796 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Thu, 13 Aug 2009 09:10:44 +0530
+Subject: [PATCH 07/16] ehci: portwise configurations
+
+OMAP3 EHCI has three ports and we can configure port modes
+(PHY/TLL) on per port basis in silicon version ES3.0 onwards.
+
+This patch modifies the existing EHCI driver to accomodate
+portwise mode configuration.
+
+Changes being done:
+
+ - Pass platform_data pointer as parameter to usb_ehci_init()
+ to avoid multiple parameters.
+ - Use platform_data pointer in usb-ehci.c as platform_data
+ directly without copying it to another *pdata*.
+ - Initializing platform_data in all platform files with
+ platform specific ehci parameters.
+ - Added port_mode[OMAP_HS_USB_PORTS]in platform_data
+ structures.This allows to setup mux pins on per port basis.
+ - Added phy_reset_gpio[OMAP_HS_USB_PORTS].
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ arch/arm/mach-omap2/board-3430sdp.c | 15 +++++-
+ arch/arm/mach-omap2/board-omap3beagle.c | 15 +++++-
+ arch/arm/mach-omap2/board-omap3evm.c | 15 +++++-
+ arch/arm/mach-omap2/board-omap3pandora.c | 15 +++++-
+ arch/arm/mach-omap2/usb-ehci.c | 95 +++++++++++++++---------------
+ arch/arm/plat-omap/include/mach/usb.h | 12 ++--
+ drivers/usb/host/ehci-omap.c | 63 +++++++++++---------
+ 7 files changed, 145 insertions(+), 85 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
+index 439ebcc..f9fabb0 100644
+--- a/arch/arm/mach-omap2/board-3430sdp.c
++++ b/arch/arm/mach-omap2/board-3430sdp.c
+@@ -480,6 +480,19 @@ static void enable_board_wakeup_source(void)
+ omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
+ }
+
++static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
++
++ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
++ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
++ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
++
++ .chargepump = true,
++ .phy_reset = true,
++ .reset_gpio_port[0] = 57,
++ .reset_gpio_port[1] = 61,
++ .reset_gpio_port[2] = -EINVAL
++};
++
+ static void __init omap_3430sdp_init(void)
+ {
+ omap3430_i2c_init();
+@@ -495,8 +508,8 @@ static void __init omap_3430sdp_init(void)
+ omap_serial_init();
+ usb_musb_init();
+ board_smc91x_init();
+- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
+ enable_board_wakeup_source();
++ usb_ehci_init(&ehci_pdata);
+ }
+
+ static void __init omap_3430sdp_map_io(void)
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index a661fe3..4109969 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
++++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -395,6 +395,19 @@ static void __init omap3beagle_flash_init(void)
+ }
+ }
+
++static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
++
++ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
++ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
++ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
++
++ .chargepump = false,
++ .phy_reset = true,
++ .reset_gpio_port[0] = -EINVAL,
++ .reset_gpio_port[1] = 147,
++ .reset_gpio_port[2] = -EINVAL
++};
++
+ static void __init omap3_beagle_init(void)
+ {
+ omap3_beagle_i2c_init();
+@@ -408,7 +421,7 @@ static void __init omap3_beagle_init(void)
+ gpio_direction_output(170, true);
+
+ usb_musb_init();
+- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61);
++ usb_ehci_init(&ehci_pdata);
+ omap3beagle_flash_init();
+
+ /* Ensure SDRC pins are mux'd for self-refresh */
+diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
+index 18b747b..62a6f32 100644
+--- a/arch/arm/mach-omap2/board-omap3evm.c
++++ b/arch/arm/mach-omap2/board-omap3evm.c
+@@ -293,6 +293,19 @@ static struct platform_device *omap3_evm_devices[] __initdata = {
+ &omap3evm_smc911x_device,
+ };
+
++static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
++
++ .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
++ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
++ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
++
++ .chargepump = false,
++ .phy_reset = true,
++ .reset_gpio_port[0] = -EINVAL,
++ .reset_gpio_port[1] = 135,
++ .reset_gpio_port[2] = -EINVAL
++};
++
+ static void __init omap3_evm_init(void)
+ {
+ omap3_evm_i2c_init();
+@@ -310,7 +323,7 @@ static void __init omap3_evm_init(void)
+ usb_musb_init();
+ /* Setup EHCI phy reset padconfig */
+ omap_cfg_reg(AF4_34XX_GPIO135_OUT);
+- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, -EINVAL, 135);
++ usb_ehci_init(&ehci_pdata);
+ ads7846_dev_init();
+ }
+
+diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
+index c9d6488..9f115dc 100644
+--- a/arch/arm/mach-omap2/board-omap3pandora.c
++++ b/arch/arm/mach-omap2/board-omap3pandora.c
+@@ -383,6 +383,19 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
+ &pandora_keys_gpio,
+ };
+
++static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
++
++ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
++ .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
++ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
++
++ .chargepump = false,
++ .phy_reset = true,
++ .reset_gpio_port[0] = 16,
++ .reset_gpio_port[1] = -EINVAL,
++ .reset_gpio_port[2] = -EINVAL
++};
++
+ static void __init omap3pandora_init(void)
+ {
+ omap3pandora_i2c_init();
+@@ -392,7 +405,7 @@ static void __init omap3pandora_init(void)
+ spi_register_board_info(omap3pandora_spi_board_info,
+ ARRAY_SIZE(omap3pandora_spi_board_info));
+ omap3pandora_ads7846_init();
+- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, 16, -EINVAL);
++ usb_ehci_init(&ehci_pdata);
+ pandora_keys_gpio_init();
+ usb_musb_init();
+
+diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
+index 6a96569..a29c8ca 100644
+--- a/arch/arm/mach-omap2/usb-ehci.c
++++ b/arch/arm/mach-omap2/usb-ehci.c
+@@ -68,14 +68,10 @@ static struct platform_device ehci_device = {
+ /*
+ * setup_ehci_io_mux - initialize IO pad mux for USBHOST
+ */
+-static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
++static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
+ {
+- if (phy_mode == EHCI_HCD_OMAP_MODE_PHY) {
+- /* PHY mode of operation for board: 750-2083-001
+- * ISP1504 connected to Port1 and Port2
+- * Do Func Mux setting for 12-pin ULPI PHY mode
+- */
+- /* Port1 */
++ switch (port_mode[0]) {
++ case EHCI_HCD_OMAP_MODE_PHY:
+ omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
+ omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
+ omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
+@@ -88,28 +84,8 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
+ omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
+ omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
+ omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
+-
+- /* Port2 */
+- omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
+- omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
+- omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
+- omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
+- omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
+- omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
+- omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
+- omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
+- omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
+- omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
+- omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
+- omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
+-
+- } else {
+- /* Set Func mux for :
+- * TLL mode of operation
+- * 12-pin ULPI SDR TLL mode for Port1/2/3
+- */
+-
+- /* Port1 */
++ break;
++ case EHCI_HCD_OMAP_MODE_TLL:
+ omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
+ omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
+ omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
+@@ -122,8 +98,29 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
+ omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
+ omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
+ omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
++ break;
++ case EHCI_HCD_OMAP_MODE_UNKNOWN:
++ /* FALLTHROUGH */
++ default:
++ break;
++ }
+
+- /* Port2 */
++ switch (port_mode[1]) {
++ case EHCI_HCD_OMAP_MODE_PHY:
++ omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
++ omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
++ omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
++ omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
++ omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
++ omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
++ omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
++ omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
++ omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
++ omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
++ omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
++ omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
++ break;
++ case EHCI_HCD_OMAP_MODE_TLL:
+ omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
+ omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
+ omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
+@@ -136,8 +133,18 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
+ omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
+ omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
+ omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
++ break;
++ case EHCI_HCD_OMAP_MODE_UNKNOWN:
++ /* FALLTHROUGH */
++ default:
++ break;
++ }
+
+- /* Port3 */
++ switch (port_mode[2]) {
++ case EHCI_HCD_OMAP_MODE_PHY:
++ printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
++ break;
++ case EHCI_HCD_OMAP_MODE_TLL:
+ omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
+ omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
+ omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
+@@ -150,28 +157,23 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode)
+ omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
+ omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
+ omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
++ break;
++ case EHCI_HCD_OMAP_MODE_UNKNOWN:
++ /* FALLTHROUGH */
++ default:
++ break;
+ }
+
+ return;
+ }
+
+-static struct ehci_hcd_omap_platform_data pdata __initconst;
+-
+-void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
+- int chargepump, int phy_reset, int reset_gpio_port1,
+- int reset_gpio_port2)
++void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
+ {
+- pdata.phy_mode = phy_mode;
+- pdata.chargepump = chargepump;
+- pdata.phy_reset = phy_reset;
+- pdata.reset_gpio_port1 = reset_gpio_port1;
+- pdata.reset_gpio_port2 = reset_gpio_port2;
+-
+- platform_device_add_data(&ehci_device, &pdata, sizeof(pdata));
++ platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
+
+ /* Setup Pin IO MUX for EHCI */
+ if (cpu_is_omap34xx())
+- setup_ehci_io_mux(phy_mode);
++ setup_ehci_io_mux(pdata->port_mode);
+
+ if (platform_device_register(&ehci_device) < 0) {
+ printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
+@@ -181,9 +183,8 @@ void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
+
+ #else
+
+-void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
+- int chargepump, int phy_reset, int reset_gpio_port1,
+- int reset_gpio_port2)
++void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata)
++
+ {
+ }
+
+diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h
+index 1b1366c..d1b14cc 100644
+--- a/arch/arm/plat-omap/include/mach/usb.h
++++ b/arch/arm/plat-omap/include/mach/usb.h
+@@ -5,6 +5,7 @@
+
+ #include <mach/board.h>
+
++#define OMAP3_HS_USB_PORTS 3
+ enum ehci_hcd_omap_mode {
+ EHCI_HCD_OMAP_MODE_UNKNOWN,
+ EHCI_HCD_OMAP_MODE_PHY,
+@@ -12,13 +13,12 @@ enum ehci_hcd_omap_mode {
+ };
+
+ struct ehci_hcd_omap_platform_data {
+- enum ehci_hcd_omap_mode phy_mode;
++ enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS];
+ unsigned chargepump:1;
+ unsigned phy_reset:1;
+
+- /* have to be valid if phy_reset is true */
+- int reset_gpio_port1;
+- int reset_gpio_port2;
++ /* have to be valid if phy_reset is true and portx is in phy mode */
++ int reset_gpio_port[OMAP3_HS_USB_PORTS];
+ };
+
+ /*-------------------------------------------------------------------------*/
+@@ -45,9 +45,7 @@ struct ehci_hcd_omap_platform_data {
+
+ extern void usb_musb_init(void);
+
+-extern void usb_ehci_init(enum ehci_hcd_omap_mode phy_mode,
+- int chargepump, int phy_reset, int reset_gpio_port1,
+- int reset_gpio_port2);
++extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata);
+
+ #endif
+
+diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
+index c7631f5..3175122 100644
+--- a/drivers/usb/host/ehci-omap.c
++++ b/drivers/usb/host/ehci-omap.c
+@@ -162,8 +162,7 @@ struct ehci_hcd_omap {
+ */
+
+ /* gpio for resetting phy */
+- int reset_gpio_port1;
+- int reset_gpio_port2;
++ int reset_gpio_port[OMAP3_HS_USB_PORTS];
+
+ /* phy reset workaround */
+ int phy_reset;
+@@ -172,7 +171,7 @@ struct ehci_hcd_omap {
+ int chargepump;
+
+ /* desired phy_mode: TLL, PHY */
+- enum ehci_hcd_omap_mode phy_mode;
++ enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS];
+
+ void __iomem *uhh_base;
+ void __iomem *tll_base;
+@@ -297,14 +296,16 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+
+ if (omap->phy_reset) {
+ /* Refer: ISSUE1 */
+- if (gpio_is_valid(omap->reset_gpio_port1)) {
+- gpio_request(omap->reset_gpio_port1, "USB1 PHY reset");
+- gpio_direction_output(omap->reset_gpio_port1, 0);
++ if (gpio_is_valid(omap->reset_gpio_port[0])) {
++ gpio_request(omap->reset_gpio_port[0],
++ "USB1 PHY reset");
++ gpio_direction_output(omap->reset_gpio_port[0], 0);
+ }
+
+- if (gpio_is_valid(omap->reset_gpio_port2)) {
+- gpio_request(omap->reset_gpio_port2, "USB2 PHY reset");
+- gpio_direction_output(omap->reset_gpio_port2, 0);
++ if (gpio_is_valid(omap->reset_gpio_port[1])) {
++ gpio_request(omap->reset_gpio_port[1],
++ "USB2 PHY reset");
++ gpio_direction_output(omap->reset_gpio_port[1], 0);
+ }
+
+ /* Hold the PHY in RESET for enough time till DIR is high */
+@@ -361,7 +362,10 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+
+ ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
+
+- if (omap->phy_mode == EHCI_HCD_OMAP_MODE_PHY) {
++ if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
++ (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
++ (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) {
++
+ reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
+
+ reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
+@@ -374,7 +378,9 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+ ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
+ dev_dbg(omap->dev, "Entered ULPI PHY MODE: success\n");
+
+- } else if (omap->phy_mode == EHCI_HCD_OMAP_MODE_TLL) {
++ } else if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
++ (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
++ (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) {
+
+ /* Enable UTMI mode for all 3 TLL channels */
+ omap_usb_utmi_init(omap,
+@@ -396,11 +402,11 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+ */
+ udelay(10);
+
+- if (gpio_is_valid(omap->reset_gpio_port1))
+- gpio_set_value(omap->reset_gpio_port1, 1);
++ if (gpio_is_valid(omap->reset_gpio_port[0]))
++ gpio_set_value(omap->reset_gpio_port[0], 1);
+
+- if (gpio_is_valid(omap->reset_gpio_port2))
+- gpio_set_value(omap->reset_gpio_port2, 1);
++ if (gpio_is_valid(omap->reset_gpio_port[1]))
++ gpio_set_value(omap->reset_gpio_port[1], 1);
+ }
+
+ if (omap->chargepump) {
+@@ -438,11 +444,11 @@ err_tll_fck:
+ clk_put(omap->usbhost1_48m_fck);
+
+ if (omap->phy_reset) {
+- if (gpio_is_valid(omap->reset_gpio_port1))
+- gpio_free(omap->reset_gpio_port1);
++ if (gpio_is_valid(omap->reset_gpio_port[0]))
++ gpio_free(omap->reset_gpio_port[0]);
+
+- if (gpio_is_valid(omap->reset_gpio_port2))
+- gpio_free(omap->reset_gpio_port2);
++ if (gpio_is_valid(omap->reset_gpio_port[1]))
++ gpio_free(omap->reset_gpio_port[1]);
+ }
+
+ err_host_48m_fck:
+@@ -531,11 +537,11 @@ static void omap_stop_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+ }
+
+ if (omap->phy_reset) {
+- if (gpio_is_valid(omap->reset_gpio_port1))
+- gpio_free(omap->reset_gpio_port1);
++ if (gpio_is_valid(omap->reset_gpio_port[0]))
++ gpio_free(omap->reset_gpio_port[0]);
+
+- if (gpio_is_valid(omap->reset_gpio_port2))
+- gpio_free(omap->reset_gpio_port2);
++ if (gpio_is_valid(omap->reset_gpio_port[1]))
++ gpio_free(omap->reset_gpio_port[1]);
+ }
+
+ dev_dbg(omap->dev, "Clock to USB host has been disabled\n");
+@@ -590,10 +596,13 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
+ platform_set_drvdata(pdev, omap);
+ omap->dev = &pdev->dev;
+ omap->phy_reset = pdata->phy_reset;
+- omap->reset_gpio_port1 = pdata->reset_gpio_port1;
+- omap->reset_gpio_port2 = pdata->reset_gpio_port2;
+- omap->phy_mode = pdata->phy_mode;
+- omap->chargepump = pdata->chargepump;
++ omap->reset_gpio_port[0] = pdata->reset_gpio_port[0];
++ omap->reset_gpio_port[1] = pdata->reset_gpio_port[1];
++ omap->reset_gpio_port[2] = pdata->reset_gpio_port[2];
++ omap->port_mode[0] = pdata->port_mode[0];
++ omap->port_mode[1] = pdata->port_mode[1];
++ omap->port_mode[2] = pdata->port_mode[2];
++ omap->chargepump = pdata->chargepump;
+ omap->ehci = hcd_to_ehci(hcd);
+ omap->ehci->sbrn = 0x20;
+
+--
+1.6.2.4
+
--- /dev/null
+From 073182af5855d4114ab3d40db3fba1298573f0be Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Fri, 10 Jul 2009 12:15:04 +0530
+Subject: [PATCH 08/16] omap3: Add CHIP_GE_OMAP3430ES3 for HSUSB
+
+OMAP3 HSUSB ports can be individually programmed in PHY or TLL
+mode in ES3.0 onwards whereas this is not supported in ES2.1
+and earlier versions.
+
+CHIP_GE_OMAP3430ES3 is added to program this behavior at runtime.
+
+Also updated the existing macros to use the priviously defined
+*_GE_* logic instead of repeating the same logic again.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ arch/arm/plat-omap/include/mach/cpu.h | 7 ++++---
+ 1 files changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
+index 7a5f9e8..60d867c 100644
+--- a/arch/arm/plat-omap/include/mach/cpu.h
++++ b/arch/arm/plat-omap/include/mach/cpu.h
+@@ -414,10 +414,11 @@ IS_OMAP_TYPE(3430, 0x3430)
+ * chips at ES2 and beyond, but not, for example, any OMAP lines after
+ * OMAP3.
+ */
+-#define CHIP_GE_OMAP3430ES2 (CHIP_IS_OMAP3430ES2 | \
+- CHIP_IS_OMAP3430ES3_0 | \
+- CHIP_IS_OMAP3430ES3_1)
+ #define CHIP_GE_OMAP3430ES3_1 (CHIP_IS_OMAP3430ES3_1)
++#define CHIP_GE_OMAP3430ES3 (CHIP_IS_OMAP3430ES3_0 | \
++ CHIP_GE_OMAP3430ES3_1)
++#define CHIP_GE_OMAP3430ES2 (CHIP_IS_OMAP3430ES2 | \
++ CHIP_GE_OMAP3430ES3)
+
+
+ int omap_chip_is(struct omap_chip_id oci);
+--
+1.6.2.4
+
--- /dev/null
+From 2caa398b8d7d37ecbf062fd36c54ed6807e3ab5b Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Mon, 13 Jul 2009 14:13:26 +0530
+Subject: [PATCH 09/16] ehci: Support for ES3.x
+
+OMAP ES3.x supports portwise PHY or TLL mode of operation whereas
+in ES2.x all the three ports can either be in PHY mode or in TLL
+mode.Port3 can not be configured in PHY mode.
+
+Port mode must be defined either PHY, TLL or UNKNOWN in platform
+files.Be careful of the scenario where one port is set as PHY and
+other in TLL but the OMAP silicon version is 2.x or earlier where
+this scenario is *not* supported.
+
+Changes are :
+ - Setup all the bypass configuration in omap_start_ehc()
+ based on ES version.
+ - Remove UHH_HOSTCONFIG programming for bypass settings
+ in omap_usb_utmi_init()
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/host/ehci-omap.c | 90 ++++++++++++++++++++++++------------------
+ 1 files changed, 52 insertions(+), 38 deletions(-)
+
+diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
+index 3175122..81a0b65 100644
+--- a/drivers/usb/host/ehci-omap.c
++++ b/drivers/usb/host/ehci-omap.c
+@@ -32,7 +32,6 @@
+ * - move DPLL5 programming to clock fw
+ * - add suspend/resume
+ * - move workarounds to board-files
+- * - differentiate between ES2.x and ES3.x
+ */
+
+ #include <linux/platform_device.h>
+@@ -102,6 +101,9 @@
+ #define OMAP_UHH_SYSSTATUS (0x14)
+ #define OMAP_UHH_HOSTCONFIG (0x40)
+ #define OMAP_UHH_HOSTCONFIG_ULPI_BYPASS (1 << 0)
++#define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS (1 << 0)
++#define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS (1 << 11)
++#define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS (1 << 12)
+ #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2)
+ #define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3)
+ #define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4)
+@@ -185,16 +187,6 @@ static void omap_usb_utmi_init(struct ehci_hcd_omap *omap, u8 tll_channel_mask)
+ unsigned reg;
+ int i;
+
+- reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
+- reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS
+- | OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
+- | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
+- | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN;
+- reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
+-
+- /* Use UTMI Ports of TLL */
+- ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
+-
+ /* Program the 3 TLL channels upfront */
+ for (i = 0; i < OMAP_TLL_CHANNEL_COUNT; i++) {
+ reg = ehci_omap_readl(omap->tll_base, OMAP_TLL_CHANNEL_CONF(i));
+@@ -243,7 +235,9 @@ static void omap_usb_utmi_init(struct ehci_hcd_omap *omap, u8 tll_channel_mask)
+ */
+ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+ {
++ struct omap_chip_id oci = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3);
+ unsigned long timeout = jiffies + msecs_to_jiffies(1000);
++ u8 tll_ch_mask = 0;
+ unsigned reg = 0;
+ int ret = 0;
+
+@@ -362,37 +356,58 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+
+ ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
+
+- if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
+- (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
+- (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) {
++ reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
+
+- reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
++ /* setup ULPI bypass and burst configurations */
++ reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
++ | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
++ | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
++ reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
+
+- reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
+- | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
+- | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
+- reg &= ~(OMAP_UHH_HOSTCONFIG_ULPI_BYPASS
+- | OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN);
++ /* Bypass the TLL module for PHY mode operation */
++ if (omap_chip_is(oci)) {
++ dev_dbg(omap->dev, "OMAP3 ES version > ES3\n");
++ if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
++ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
++ else if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
++ reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
+
+- /* Bypass the TLL module for PHY mode operation */
+- ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
+- dev_dbg(omap->dev, "Entered ULPI PHY MODE: success\n");
++ if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
++ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
++ else if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
++ reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
++
++ if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)
++ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
++ else if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
++ reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
+
+- } else if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
+- (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
+- (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) {
+-
+- /* Enable UTMI mode for all 3 TLL channels */
+- omap_usb_utmi_init(omap,
+- OMAP_TLL_CHANNEL_1_EN_MASK |
+- OMAP_TLL_CHANNEL_2_EN_MASK |
+- OMAP_TLL_CHANNEL_3_EN_MASK
+- );
+ } else {
+- dev_err(hcd->self.controller,
+- "UNKOWN mode requested\n");
+- ret = -EINVAL;
+- goto err_unknown_mode;
++ dev_dbg(omap->dev, "OMAP3 ES version < ES3\n");
++ if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
++ (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
++ (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY))
++ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
++ else
++ reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
++ }
++ ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
++ dev_dbg(omap->dev, "UHH setup done, uhh_base=%x\n", reg);
++
++
++ if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) ||
++ (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) ||
++ (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) {
++
++ if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
++ tll_ch_mask |= OMAP_TLL_CHANNEL_1_EN_MASK;
++ if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
++ tll_ch_mask |= OMAP_TLL_CHANNEL_2_EN_MASK;
++ if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
++ tll_ch_mask |= OMAP_TLL_CHANNEL_3_EN_MASK;
++
++ /* Enable UTMI mode for required TLL channels */
++ omap_usb_utmi_init(omap, tll_ch_mask);
+ }
+
+ if (omap->phy_reset) {
+@@ -430,7 +445,6 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
+
+ return 0;
+
+-err_unknown_mode:
+ err_sys_status:
+ clk_disable(omap->usbtll_ick);
+ clk_put(omap->usbtll_ick);
+--
+1.6.2.4
+
--- /dev/null
+From 4ad1dd4ce8c9c04c2fbfad72a78247d848090329 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Fri, 10 Jul 2009 19:46:20 +0530
+Subject: [PATCH 10/16] ehci: update driver with generic change
+
+Update the OMAP EHCI driver in accordance with below patch
+introduced in generic EHCI driver.
+
+commit: b18ffd49e86102a9ed0a1cc83fdafe3891e844e5
+USB: EHCI: update toggle state for linked QHs
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/host/ehci-omap.c | 1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
+index 81a0b65..8b944d7 100644
+--- a/drivers/usb/host/ehci-omap.c
++++ b/drivers/usb/host/ehci-omap.c
+@@ -761,6 +761,7 @@ static const struct hc_driver ehci_omap_hc_driver = {
+ .urb_enqueue = ehci_urb_enqueue,
+ .urb_dequeue = ehci_urb_dequeue,
+ .endpoint_disable = ehci_endpoint_disable,
++ .endpoint_reset = ehci_endpoint_reset,
+
+ /*
+ * scheduling support
+--
+1.6.2.4
+
--- /dev/null
+From 1adaab4805926b3674fd083e7e0ac2b29a30a34a Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Fri, 12 Jun 2009 19:01:42 +0530
+Subject: [PATCH 11/16] musb: fix musb->gadget_driver != NULL bug
+
+musb->gadget_driver != NULL is observed when CONFIG_SUSPEND is
+enabled causing failure in gadget driver registration.
+
+Fixing this by making musb->gadget_driver = NULL during musb
+initialization.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/musb/musb_gadget.c | 1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
+index 8b3c4e2..d69d98e 100644
+--- a/drivers/usb/musb/musb_gadget.c
++++ b/drivers/usb/musb/musb_gadget.c
+@@ -1650,6 +1650,7 @@ int __init musb_gadget_setup(struct musb *musb)
+ musb->g.dev.dma_mask = musb->controller->dma_mask;
+ musb->g.dev.release = musb_gadget_release;
+ musb->g.name = musb_driver_name;
++ musb->gadget_driver = NULL;
+
+ if (is_otg_enabled(musb))
+ musb->g.is_otg = 1;
+--
+1.6.2.4
+
--- /dev/null
+From 7f43c6297c781c2d403ee397fe2cfccaaf3eea42 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Sat, 20 Jun 2009 14:06:38 +0530
+Subject: [PATCH 12/16] musb: Add back old musb procfs file
+
+Procfs file is removed from musb and an equivalent debugfs is
+expected to replace it.
+
+Adding the old file back to retain the debug functionalities untill
+we get debugfs equivalent in mainline.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/musb/Makefile | 3 +
+ drivers/usb/musb/musb_core.c | 8 +-
+ drivers/usb/musb/musb_core.h | 19 +
+ drivers/usb/musb/musb_procfs.c | 838 ++++++++++++++++++++++++++++++++++++++++
+ 4 files changed, 863 insertions(+), 5 deletions(-)
+ create mode 100644 drivers/usb/musb/musb_procfs.c
+
+diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
+index 85710cc..06969c5 100644
+--- a/drivers/usb/musb/Makefile
++++ b/drivers/usb/musb/Makefile
+@@ -74,4 +74,7 @@ endif
+
+ ifeq ($(CONFIG_USB_MUSB_DEBUG),y)
+ EXTRA_CFLAGS += -DDEBUG
++ ifeq ($(CONFIG_PROC_FS),y)
++ musb_hdrc-objs += musb_procfs.o
++ endif
+ endif
+diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
+index 129f9dc..f5ca435 100644
+--- a/drivers/usb/musb/musb_core.c
++++ b/drivers/usb/musb/musb_core.c
+@@ -2046,8 +2046,6 @@ bad_config:
+ musb->xceiv->state = OTG_STATE_A_IDLE;
+
+ status = usb_add_hcd(musb_to_hcd(musb), -1, 0);
+- if (status)
+- goto fail;
+
+ DBG(1, "%s mode, status %d, devctl %02x %c\n",
+ "HOST", status,
+@@ -2062,8 +2060,6 @@ bad_config:
+ musb->xceiv->state = OTG_STATE_B_IDLE;
+
+ status = musb_gadget_setup(musb);
+- if (status)
+- goto fail;
+
+ DBG(1, "%s mode, status %d, dev%02x\n",
+ is_otg_enabled(musb) ? "OTG" : "PERIPHERAL",
+@@ -2082,7 +2078,8 @@ bad_config:
+ #endif
+ if (status)
+ goto fail2;
+-
++ if (status == 0)
++ musb_debug_create("driver/musb_hdrc", musb);
+ return 0;
+
+ fail2:
+@@ -2152,6 +2149,7 @@ static int __devexit musb_remove(struct platform_device *pdev)
+ * - OTG mode: both roles are deactivated (or never-activated)
+ */
+ musb_shutdown(pdev);
++ musb_debug_delete("driver/musb_hdrc", musb);
+ #ifdef CONFIG_USB_MUSB_HDRC_HCD
+ if (musb->board_mode == MUSB_HOST)
+ usb_remove_hcd(musb_to_hcd(musb));
+diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
+index 381d648..b0b4fbd 100644
+--- a/drivers/usb/musb/musb_core.h
++++ b/drivers/usb/musb/musb_core.h
+@@ -562,4 +562,23 @@ extern int musb_platform_get_vbus_status(struct musb *musb);
+ extern int __init musb_platform_init(struct musb *musb);
+ extern int musb_platform_exit(struct musb *musb);
+
++/*-------------------------- ProcFS definitions ---------------------*/
++
++struct proc_dir_entry;
++
++#if (CONFIG_USB_MUSB_DEBUG > 0) && defined(MUSB_CONFIG_PROC_FS)
++extern struct proc_dir_entry *musb_debug_create(char *name, struct musb *data);
++extern void musb_debug_delete(char *name, struct musb *data);
++
++#else
++static inline struct proc_dir_entry *
++musb_debug_create(char *name, struct musb *data)
++{
++ return NULL;
++}
++static inline void musb_debug_delete(char *name, struct musb *data)
++{
++}
++#endif
++
+ #endif /* __MUSB_CORE_H__ */
+diff --git a/drivers/usb/musb/musb_procfs.c b/drivers/usb/musb/musb_procfs.c
+new file mode 100644
+index 0000000..d789d4d
+--- /dev/null
++++ b/drivers/usb/musb/musb_procfs.c
+@@ -0,0 +1,838 @@
++/*
++ * MUSB OTG driver debug support
++ *
++ * Copyright 2005 Mentor Graphics Corporation
++ * Copyright (C) 2005-2006 by Texas Instruments
++ * Copyright (C) 2006-2007 Nokia Corporation
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
++ * 02110-1301 USA
++ *
++ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
++ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
++ * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
++ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/proc_fs.h>
++#include <linux/seq_file.h>
++#include <linux/uaccess.h> /* FIXME remove procfs writes */
++#include <mach/hardware.h>
++
++#include "musb_core.h"
++
++#include "davinci.h"
++
++#ifdef CONFIG_USB_MUSB_HDRC_HCD
++
++static int dump_qh(struct musb_qh *qh, char *buf, unsigned max)
++{
++ int count;
++ int tmp;
++ struct usb_host_endpoint *hep = qh->hep;
++ struct urb *urb;
++
++ count = snprintf(buf, max, " qh %p dev%d ep%d%s max%d\n",
++ qh, qh->dev->devnum, qh->epnum,
++ ({ char *s; switch (qh->type) {
++ case USB_ENDPOINT_XFER_BULK:
++ s = "-bulk"; break;
++ case USB_ENDPOINT_XFER_INT:
++ s = "-int"; break;
++ case USB_ENDPOINT_XFER_CONTROL:
++ s = ""; break;
++ default:
++ s = "iso"; break;
++ }; s; }),
++ qh->maxpacket);
++ if (count <= 0)
++ return 0;
++ buf += count;
++ max -= count;
++
++ list_for_each_entry(urb, &hep->urb_list, urb_list) {
++ tmp = snprintf(buf, max, "\t%s urb %p %d/%d\n",
++ usb_pipein(urb->pipe) ? "in" : "out",
++ urb, urb->actual_length,
++ urb->transfer_buffer_length);
++ if (tmp <= 0)
++ break;
++ tmp = min(tmp, (int)max);
++ count += tmp;
++ buf += tmp;
++ max -= tmp;
++ }
++ return count;
++}
++
++static int
++dump_queue(struct list_head *q, char *buf, unsigned max)
++{
++ int count = 0;
++ struct musb_qh *qh;
++
++ list_for_each_entry(qh, q, ring) {
++ int tmp;
++
++ tmp = dump_qh(qh, buf, max);
++ if (tmp <= 0)
++ break;
++ tmp = min(tmp, (int)max);
++ count += tmp;
++ buf += tmp;
++ max -= tmp;
++ }
++ return count;
++}
++
++#endif /* HCD */
++
++#ifdef CONFIG_USB_GADGET_MUSB_HDRC
++static int dump_ep(struct musb_ep *ep, char *buffer, unsigned max)
++{
++ char *buf = buffer;
++ int code = 0;
++ void __iomem *regs = ep->hw_ep->regs;
++ char *mode = "1buf";
++
++ if (ep->is_in) {
++ if (ep->hw_ep->tx_double_buffered)
++ mode = "2buf";
++ } else {
++ if (ep->hw_ep->rx_double_buffered)
++ mode = "2buf";
++ }
++
++ do {
++ struct usb_request *req;
++
++ code = snprintf(buf, max,
++ "\n%s (hw%d): %s%s, csr %04x maxp %04x\n",
++ ep->name, ep->current_epnum,
++ mode, ep->dma ? " dma" : "",
++ musb_readw(regs,
++ (ep->is_in || !ep->current_epnum)
++ ? MUSB_TXCSR
++ : MUSB_RXCSR),
++ musb_readw(regs, ep->is_in
++ ? MUSB_TXMAXP
++ : MUSB_RXMAXP)
++ );
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++
++ if (is_cppi_enabled() && ep->current_epnum) {
++ unsigned cppi = ep->current_epnum - 1;
++ void __iomem *base = ep->musb->ctrl_base;
++ unsigned off1 = cppi << 2;
++ void __iomem *ram = base;
++ char tmp[16];
++
++ if (ep->is_in) {
++ ram += DAVINCI_TXCPPI_STATERAM_OFFSET(cppi);
++ tmp[0] = 0;
++ } else {
++ ram += DAVINCI_RXCPPI_STATERAM_OFFSET(cppi);
++ snprintf(tmp, sizeof tmp, "%d left, ",
++ musb_readl(base,
++ DAVINCI_RXCPPI_BUFCNT0_REG + off1));
++ }
++
++ code = snprintf(buf, max, "%cX DMA%d: %s"
++ "%08x %08x, %08x %08x; "
++ "%08x %08x %08x .. %08x\n",
++ ep->is_in ? 'T' : 'R',
++ ep->current_epnum - 1, tmp,
++ musb_readl(ram, 0 * 4),
++ musb_readl(ram, 1 * 4),
++ musb_readl(ram, 2 * 4),
++ musb_readl(ram, 3 * 4),
++ musb_readl(ram, 4 * 4),
++ musb_readl(ram, 5 * 4),
++ musb_readl(ram, 6 * 4),
++ musb_readl(ram, 7 * 4));
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ }
++
++ if (list_empty(&ep->req_list)) {
++ code = snprintf(buf, max, "\t(queue empty)\n");
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ break;
++ }
++ list_for_each_entry(req, &ep->req_list, list) {
++ code = snprintf(buf, max, "\treq %p, %s%s%d/%d\n",
++ req,
++ req->zero ? "zero, " : "",
++ req->short_not_ok ? "!short, " : "",
++ req->actual, req->length);
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ }
++ } while (0);
++ return buf - buffer;
++}
++#endif
++
++static int
++dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max)
++{
++ int code = 0;
++ char *buf = aBuffer;
++ struct musb_hw_ep *hw_ep = &musb->endpoints[epnum];
++
++ do {
++ musb_ep_select(musb->mregs, epnum);
++#ifdef CONFIG_USB_MUSB_HDRC_HCD
++ if (is_host_active(musb)) {
++ int dump_rx, dump_tx;
++ void __iomem *regs = hw_ep->regs;
++
++ /* TEMPORARY (!) until we have a real periodic
++ * schedule tree ...
++ */
++ if (!epnum) {
++ /* control is shared, uses RX queue
++ * but (mostly) shadowed tx registers
++ */
++ dump_tx = !list_empty(&musb->control);
++ dump_rx = 0;
++ } else if (hw_ep == musb->bulk_ep) {
++ dump_tx = !list_empty(&musb->out_bulk);
++ dump_rx = !list_empty(&musb->in_bulk);
++ } else if (hw_ep->in_qh || hw_ep->out_qh) {
++ if (hw_ep->in_qh)
++ dump_rx = 1;
++ else
++ dump_rx = 0;
++ dump_tx = !dump_rx;
++ } else
++ break;
++ /* END TEMPORARY */
++
++
++ if (dump_rx) {
++ code = snprintf(buf, max,
++ "\nRX%d: %s rxcsr %04x interval %02x "
++ "max %04x type %02x; "
++ "dev %d hub %d port %d"
++ "\n",
++ epnum,
++ hw_ep->rx_double_buffered
++ ? "2buf" : "1buf",
++ musb_readw(regs, MUSB_RXCSR),
++ musb_readb(regs, MUSB_RXINTERVAL),
++ musb_readw(regs, MUSB_RXMAXP),
++ musb_readb(regs, MUSB_RXTYPE),
++ /* FIXME: assumes multipoint */
++ musb_readb(musb->mregs,
++ MUSB_BUSCTL_OFFSET(epnum,
++ MUSB_RXFUNCADDR)),
++ musb_readb(musb->mregs,
++ MUSB_BUSCTL_OFFSET(epnum,
++ MUSB_RXHUBADDR)),
++ musb_readb(musb->mregs,
++ MUSB_BUSCTL_OFFSET(epnum,
++ MUSB_RXHUBPORT))
++ );
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++
++ if (is_cppi_enabled()
++ && epnum
++ && hw_ep->rx_channel) {
++ unsigned cppi = epnum - 1;
++ unsigned off1 = cppi << 2;
++ void __iomem *base;
++ void __iomem *ram;
++ char tmp[16];
++
++ base = musb->ctrl_base;
++ ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
++ cppi) + base;
++ snprintf(tmp, sizeof tmp, "%d left, ",
++ musb_readl(base,
++ DAVINCI_RXCPPI_BUFCNT0_REG
++ + off1));
++
++ code = snprintf(buf, max,
++ " rx dma%d: %s"
++ "%08x %08x, %08x %08x; "
++ "%08x %08x %08x .. %08x\n",
++ cppi, tmp,
++ musb_readl(ram, 0 * 4),
++ musb_readl(ram, 1 * 4),
++ musb_readl(ram, 2 * 4),
++ musb_readl(ram, 3 * 4),
++ musb_readl(ram, 4 * 4),
++ musb_readl(ram, 5 * 4),
++ musb_readl(ram, 6 * 4),
++ musb_readl(ram, 7 * 4));
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ }
++
++ if (hw_ep == musb->bulk_ep
++ && !list_empty(
++ &musb->in_bulk)) {
++ code = dump_queue(&musb->in_bulk,
++ buf, max);
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ } else if (hw_ep->in_qh) {
++ code = dump_qh(hw_ep->in_qh,
++ buf, max);
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ }
++ }
++
++ if (dump_tx) {
++ code = snprintf(buf, max,
++ "\nTX%d: %s txcsr %04x interval %02x "
++ "max %04x type %02x; "
++ "dev %d hub %d port %d"
++ "\n",
++ epnum,
++ hw_ep->tx_double_buffered
++ ? "2buf" : "1buf",
++ musb_readw(regs, MUSB_TXCSR),
++ musb_readb(regs, MUSB_TXINTERVAL),
++ musb_readw(regs, MUSB_TXMAXP),
++ musb_readb(regs, MUSB_TXTYPE),
++ /* FIXME: assumes multipoint */
++ musb_readb(musb->mregs,
++ MUSB_BUSCTL_OFFSET(epnum,
++ MUSB_TXFUNCADDR)),
++ musb_readb(musb->mregs,
++ MUSB_BUSCTL_OFFSET(epnum,
++ MUSB_TXHUBADDR)),
++ musb_readb(musb->mregs,
++ MUSB_BUSCTL_OFFSET(epnum,
++ MUSB_TXHUBPORT))
++ );
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++
++ if (is_cppi_enabled()
++ && epnum
++ && hw_ep->tx_channel) {
++ unsigned cppi = epnum - 1;
++ void __iomem *base;
++ void __iomem *ram;
++
++ base = musb->ctrl_base;
++ ram = DAVINCI_RXCPPI_STATERAM_OFFSET(
++ cppi) + base;
++ code = snprintf(buf, max,
++ " tx dma%d: "
++ "%08x %08x, %08x %08x; "
++ "%08x %08x %08x .. %08x\n",
++ cppi,
++ musb_readl(ram, 0 * 4),
++ musb_readl(ram, 1 * 4),
++ musb_readl(ram, 2 * 4),
++ musb_readl(ram, 3 * 4),
++ musb_readl(ram, 4 * 4),
++ musb_readl(ram, 5 * 4),
++ musb_readl(ram, 6 * 4),
++ musb_readl(ram, 7 * 4));
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ }
++
++ if (hw_ep == musb->control_ep
++ && !list_empty(
++ &musb->control)) {
++ code = dump_queue(&musb->control,
++ buf, max);
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ } else if (hw_ep == musb->bulk_ep
++ && !list_empty(
++ &musb->out_bulk)) {
++ code = dump_queue(&musb->out_bulk,
++ buf, max);
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ } else if (hw_ep->out_qh) {
++ code = dump_qh(hw_ep->out_qh,
++ buf, max);
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ }
++ }
++ }
++#endif
++#ifdef CONFIG_USB_GADGET_MUSB_HDRC
++ if (is_peripheral_active(musb)) {
++ code = 0;
++
++ if (hw_ep->ep_in.desc || !epnum) {
++ code = dump_ep(&hw_ep->ep_in, buf, max);
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ }
++ if (hw_ep->ep_out.desc) {
++ code = dump_ep(&hw_ep->ep_out, buf, max);
++ if (code <= 0)
++ break;
++ code = min(code, (int) max);
++ buf += code;
++ max -= code;
++ }
++ }
++#endif
++ } while (0);
++
++ return buf - aBuffer;
++}
++
++/* Dump the current status and compile options.
++ * @param musb the device driver instance
++ * @param buffer where to dump the status; it must be big enough to hold the
++ * result otherwise "BAD THINGS HAPPENS(TM)".
++ */
++static int dump_header_stats(struct musb *musb, char *buffer)
++{
++ int code, count = 0;
++ const void __iomem *mbase = musb->mregs;
++
++ *buffer = 0;
++ count = sprintf(buffer, "Status: %sHDRC, Mode=%s "
++ "(Power=%02x, DevCtl=%02x)\n",
++ (musb->is_multipoint ? "M" : ""), MUSB_MODE(musb),
++ musb_readb(mbase, MUSB_POWER),
++ musb_readb(mbase, MUSB_DEVCTL));
++ if (count <= 0)
++ return 0;
++ buffer += count;
++
++ code = sprintf(buffer, "OTG state: %s; %sactive\n",
++ otg_state_string(musb),
++ musb->is_active ? "" : "in");
++ if (code <= 0)
++ goto done;
++ buffer += code;
++ count += code;
++
++ code = sprintf(buffer,
++ "Options: "
++#ifdef CONFIG_MUSB_PIO_ONLY
++ "pio"
++#elif defined(CONFIG_USB_TI_CPPI_DMA)
++ "cppi-dma"
++#elif defined(CONFIG_USB_INVENTRA_DMA)
++ "musb-dma"
++#elif defined(CONFIG_USB_TUSB_OMAP_DMA)
++ "tusb-omap-dma"
++#else
++ "?dma?"
++#endif
++ ", "
++#ifdef CONFIG_USB_MUSB_OTG
++ "otg (peripheral+host)"
++#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
++ "peripheral"
++#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
++ "host"
++#endif
++ ", debug=%d [eps=%d]\n",
++ musb_debug,
++ musb->nr_endpoints);
++ if (code <= 0)
++ goto done;
++ count += code;
++ buffer += code;
++
++#ifdef CONFIG_USB_GADGET_MUSB_HDRC
++ code = sprintf(buffer, "Peripheral address: %02x\n",
++ musb_readb(musb->ctrl_base, MUSB_FADDR));
++ if (code <= 0)
++ goto done;
++ buffer += code;
++ count += code;
++#endif
++
++#ifdef CONFIG_USB_MUSB_HDRC_HCD
++ code = sprintf(buffer, "Root port status: %08x\n",
++ musb->port1_status);
++ if (code <= 0)
++ goto done;
++ buffer += code;
++ count += code;
++#endif
++
++#ifdef CONFIG_ARCH_DAVINCI
++ code = sprintf(buffer,
++ "DaVinci: ctrl=%02x stat=%1x phy=%03x\n"
++ "\trndis=%05x auto=%04x intsrc=%08x intmsk=%08x"
++ "\n",
++ musb_readl(musb->ctrl_base, DAVINCI_USB_CTRL_REG),
++ musb_readl(musb->ctrl_base, DAVINCI_USB_STAT_REG),
++ __raw_readl((void __force __iomem *)
++ IO_ADDRESS(USBPHY_CTL_PADDR)),
++ musb_readl(musb->ctrl_base, DAVINCI_RNDIS_REG),
++ musb_readl(musb->ctrl_base, DAVINCI_AUTOREQ_REG),
++ musb_readl(musb->ctrl_base,
++ DAVINCI_USB_INT_SOURCE_REG),
++ musb_readl(musb->ctrl_base,
++ DAVINCI_USB_INT_MASK_REG));
++ if (code <= 0)
++ goto done;
++ count += code;
++ buffer += code;
++#endif /* DAVINCI */
++
++#ifdef CONFIG_USB_TUSB6010
++ code = sprintf(buffer,
++ "TUSB6010: devconf %08x, phy enable %08x drive %08x"
++ "\n\totg %03x timer %08x"
++ "\n\tprcm conf %08x mgmt %08x; int src %08x mask %08x"
++ "\n",
++ musb_readl(musb->ctrl_base, TUSB_DEV_CONF),
++ musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL_ENABLE),
++ musb_readl(musb->ctrl_base, TUSB_PHY_OTG_CTRL),
++ musb_readl(musb->ctrl_base, TUSB_DEV_OTG_STAT),
++ musb_readl(musb->ctrl_base, TUSB_DEV_OTG_TIMER),
++ musb_readl(musb->ctrl_base, TUSB_PRCM_CONF),
++ musb_readl(musb->ctrl_base, TUSB_PRCM_MNGMT),
++ musb_readl(musb->ctrl_base, TUSB_INT_SRC),
++ musb_readl(musb->ctrl_base, TUSB_INT_MASK));
++ if (code <= 0)
++ goto done;
++ count += code;
++ buffer += code;
++#endif /* DAVINCI */
++
++ if (is_cppi_enabled() && musb->dma_controller) {
++ code = sprintf(buffer,
++ "CPPI: txcr=%d txsrc=%01x txena=%01x; "
++ "rxcr=%d rxsrc=%01x rxena=%01x "
++ "\n",
++ musb_readl(musb->ctrl_base,
++ DAVINCI_TXCPPI_CTRL_REG),
++ musb_readl(musb->ctrl_base,
++ DAVINCI_TXCPPI_RAW_REG),
++ musb_readl(musb->ctrl_base,
++ DAVINCI_TXCPPI_INTENAB_REG),
++ musb_readl(musb->ctrl_base,
++ DAVINCI_RXCPPI_CTRL_REG),
++ musb_readl(musb->ctrl_base,
++ DAVINCI_RXCPPI_RAW_REG),
++ musb_readl(musb->ctrl_base,
++ DAVINCI_RXCPPI_INTENAB_REG));
++ if (code <= 0)
++ goto done;
++ count += code;
++ buffer += code;
++ }
++
++#ifdef CONFIG_USB_GADGET_MUSB_HDRC
++ if (is_peripheral_enabled(musb)) {
++ code = sprintf(buffer, "Gadget driver: %s\n",
++ musb->gadget_driver
++ ? musb->gadget_driver->driver.name
++ : "(none)");
++ if (code <= 0)
++ goto done;
++ count += code;
++ buffer += code;
++ }
++#endif
++
++done:
++ return count;
++}
++
++/* Write to ProcFS
++ *
++ * C soft-connect
++ * c soft-disconnect
++ * I enable HS
++ * i disable HS
++ * s stop session
++ * F force session (OTG-unfriendly)
++ * E rElinquish bus (OTG)
++ * H request host mode
++ * h cancel host request
++ * T start sending TEST_PACKET
++ * D<num> set/query the debug level
++ */
++static int musb_proc_write(struct file *file, const char __user *buffer,
++ unsigned long count, void *data)
++{
++ char cmd;
++ u8 reg;
++ struct musb *musb = (struct musb *)data;
++ void __iomem *mbase = musb->mregs;
++
++ /* MOD_INC_USE_COUNT; */
++
++ if (unlikely(copy_from_user(&cmd, buffer, 1)))
++ return -EFAULT;
++
++ switch (cmd) {
++ case 'S':
++ if (mbase) {
++ reg = musb_readb(mbase, MUSB_POWER)
++ | MUSB_POWER_SUSPENDM;
++ musb_writeb(mbase, MUSB_POWER, reg);
++ }
++ break;
++
++ case 'C':
++ if (mbase) {
++ reg = musb_readb(mbase, MUSB_POWER)
++ | MUSB_POWER_SOFTCONN;
++ musb_writeb(mbase, MUSB_POWER, reg);
++ }
++ break;
++
++ case 'c':
++ if (mbase) {
++ reg = musb_readb(mbase, MUSB_POWER)
++ & ~MUSB_POWER_SOFTCONN;
++ musb_writeb(mbase, MUSB_POWER, reg);
++ }
++ break;
++
++ case 'I':
++ if (mbase) {
++ reg = musb_readb(mbase, MUSB_POWER)
++ | MUSB_POWER_HSENAB;
++ musb_writeb(mbase, MUSB_POWER, reg);
++ }
++ break;
++
++ case 'i':
++ if (mbase) {
++ reg = musb_readb(mbase, MUSB_POWER)
++ & ~MUSB_POWER_HSENAB;
++ musb_writeb(mbase, MUSB_POWER, reg);
++ }
++ break;
++
++ case 'F':
++ reg = musb_readb(mbase, MUSB_DEVCTL);
++ reg |= MUSB_DEVCTL_SESSION;
++ musb_writeb(mbase, MUSB_DEVCTL, reg);
++ break;
++
++ case 'H':
++ if (mbase) {
++ reg = musb_readb(mbase, MUSB_DEVCTL);
++ reg |= MUSB_DEVCTL_HR;
++ musb_writeb(mbase, MUSB_DEVCTL, reg);
++ /* MUSB_HST_MODE( ((struct musb*)data) ); */
++ /* WARNING("Host Mode\n"); */
++ }
++ break;
++
++ case 'h':
++ if (mbase) {
++ reg = musb_readb(mbase, MUSB_DEVCTL);
++ reg &= ~MUSB_DEVCTL_HR;
++ musb_writeb(mbase, MUSB_DEVCTL, reg);
++ }
++ break;
++
++ case 'T':
++ if (mbase) {
++ musb_load_testpacket(musb);
++ musb_writeb(mbase, MUSB_TESTMODE,
++ MUSB_TEST_PACKET);
++ }
++ break;
++
++#if (CONFIG_USB_MUSB_DEBUG > 0)
++ /* set/read debug level */
++ case 'D':{
++ if (count > 1) {
++ char digits[8], *p = digits;
++ int i = 0, level = 0, sign = 1;
++ int len = min(count - 1, (unsigned long)8);
++
++ if (copy_from_user(&digits, &buffer[1], len))
++ return -EFAULT;
++
++ /* optional sign */
++ if (*p == '-') {
++ len -= 1;
++ sign = -sign;
++ p++;
++ }
++
++ /* read it */
++ while (i++ < len && *p > '0' && *p < '9') {
++ level = level * 10 + (*p - '0');
++ p++;
++ }
++
++ level *= sign;
++ DBG(1, "debug level %d\n", level);
++ musb_debug = level;
++ }
++ }
++ break;
++
++
++ case '?':
++ INFO("?: you are seeing it\n");
++ INFO("S: suspend the usb bus\n");
++ INFO("C/c: soft connect enable/disable\n");
++ INFO("I/i: hispeed enable/disable\n");
++ INFO("F: force session start\n");
++ INFO("H: host mode\n");
++ INFO("T: start sending TEST_PACKET\n");
++ INFO("D: set/read dbug level\n");
++ break;
++#endif
++
++ default:
++ ERR("Command %c not implemented\n", cmd);
++ break;
++ }
++
++ musb_platform_try_idle(musb, 0);
++
++ return count;
++}
++
++static int musb_proc_read(char *page, char **start,
++ off_t off, int count, int *eof, void *data)
++{
++ char *buffer = page;
++ int code = 0;
++ unsigned long flags;
++ struct musb *musb = data;
++ unsigned epnum;
++
++ count -= off;
++ count -= 1; /* for NUL at end */
++ if (count <= 0)
++ return -EINVAL;
++
++ spin_lock_irqsave(&musb->lock, flags);
++
++ code = dump_header_stats(musb, buffer);
++ if (code > 0) {
++ buffer += code;
++ count -= code;
++ }
++
++ /* generate the report for the end points */
++ /* REVISIT ... not unless something's connected! */
++ for (epnum = 0; count >= 0 && epnum < musb->nr_endpoints;
++ epnum++) {
++ code = dump_end_info(musb, epnum, buffer, count);
++ if (code > 0) {
++ buffer += code;
++ count -= code;
++ }
++ }
++
++ musb_platform_try_idle(musb, 0);
++
++ spin_unlock_irqrestore(&musb->lock, flags);
++ *eof = 1;
++
++ return buffer - page;
++}
++
++void __devexit musb_debug_delete(char *name, struct musb *musb)
++{
++ if (musb->proc_entry)
++ remove_proc_entry(name, NULL);
++}
++
++struct proc_dir_entry *__init
++musb_debug_create(char *name, struct musb *data)
++{
++ struct proc_dir_entry *pde;
++
++ /* FIXME convert everything to seq_file; then later, debugfs */
++
++ if (!name)
++ return NULL;
++
++ pde = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, NULL);
++ data->proc_entry = pde;
++ if (pde) {
++ pde->data = data;
++ /* pde->owner = THIS_MODULE; */
++
++ pde->read_proc = musb_proc_read;
++ pde->write_proc = musb_proc_write;
++
++ pde->size = 0;
++
++ pr_debug("Registered /proc/%s\n", name);
++ } else {
++ pr_debug("Cannot create a valid proc file entry");
++ }
++
++ return pde;
++}
+--
+1.6.2.4
+
--- /dev/null
+From 2fa09793f0da931d7b893291d684162d03eccef2 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Sat, 20 Jun 2009 14:09:15 +0530
+Subject: [PATCH 13/16] musb: Remove USB_SUSPEND auto select with OTG
+
+As USB power management is not yet supported in MUSB but we want to
+use OTG build image so disable auto selection of USB_SUSPEND with
+OTG till power management is supported.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/core/Kconfig | 1 -
+ 1 files changed, 0 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig
+index ad92594..4c7d6e8 100644
+--- a/drivers/usb/core/Kconfig
++++ b/drivers/usb/core/Kconfig
+@@ -109,7 +109,6 @@ config USB_SUSPEND
+ config USB_OTG
+ bool
+ depends on USB && EXPERIMENTAL
+- select USB_SUSPEND
+ default n
+
+
+--
+1.6.2.4
+
--- /dev/null
+From 9d49c81b7ebf7942efc14bc9533a14cb64cd68e6 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Fri, 12 Jun 2009 19:07:13 +0530
+Subject: [PATCH 14/16] musb: disable PING on status phase of control transfer
+
+PING token is not mandatory in status phase of control transfer
+so some high speed USB sticks doesn't support this.If such devices
+are connected to MUSB then they would not respond to PING token
+causing delayed or failed enumeration.
+
+Fixing this issue by disabling PING token in status phase of control
+transfers.
+
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/musb/musb_host.c | 2 ++
+ 1 files changed, 2 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
+index cf94511..4d301d2 100644
+--- a/drivers/usb/musb/musb_host.c
++++ b/drivers/usb/musb/musb_host.c
+@@ -1056,6 +1056,8 @@ irqreturn_t musb_h_ep0_irq(struct musb *musb)
+ else
+ csr = MUSB_CSR0_H_STATUSPKT
+ | MUSB_CSR0_TXPKTRDY;
++ /* disable ping token in status phase */
++ csr |= MUSB_CSR0_H_DIS_PING;
+
+ /* flag status stage */
+ musb->ep0_stage = MUSB_EP0_STATUS;
+--
+1.6.2.4
+
--- /dev/null
+From 2b65475db2df6c0b7ebb8960e77e3aaf27147bda Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Thu, 3 Sep 2009 17:07:40 +0530
+Subject: [PATCH 15/16] musb: Add context save and restore support
+
+Adding support for MUSB register save and restore during system
+suspend and resume.
+
+Changes:
+ - Added musb_save/restore_context() functions
+ - Added platform specific musb_platform_save/restore_context()
+ to handle platform specific jobs.
+ - Maintaining BlackFin compatibility by adding read/write
+ functions for registers which are not available in BlackFin
+
+Tested system suspend and resume on OMAP3EVM board.
+
+Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
+Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+---
+ drivers/usb/musb/musb_core.c | 157 +++++++++++++++++++++++++++++++++++++++++-
+ drivers/usb/musb/musb_core.h | 39 ++++++++++
+ drivers/usb/musb/musb_regs.h | 90 ++++++++++++++++++++++++
+ drivers/usb/musb/omap2430.c | 16 ++++
+ 4 files changed, 300 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
+index f5ca435..0de19da 100644
+--- a/drivers/usb/musb/musb_core.c
++++ b/drivers/usb/musb/musb_core.c
+@@ -2165,20 +2165,169 @@ static int __devexit musb_remove(struct platform_device *pdev)
+
+ #ifdef CONFIG_PM
+
++static struct musb_context_registers musb_context;
++
++void musb_save_context(void __iomem *musb_base)
++{
++ int i;
++
++ musb_platform_save_context(&musb_context);
++
++ musb_context.faddr = musb_readb(musb_base, MUSB_FADDR);
++ musb_context.power = musb_readb(musb_base, MUSB_POWER);
++ musb_context.intrtx = musb_readw(musb_base, MUSB_INTRTX);
++ musb_context.intrrx = musb_readw(musb_base, MUSB_INTRRX);
++ musb_context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE);
++ musb_context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE);
++ musb_context.intrusb = musb_readb(musb_base, MUSB_INTRUSB);
++ musb_context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE);
++ musb_context.frame = musb_readw(musb_base, MUSB_FRAME);
++ musb_context.index = musb_readb(musb_base, MUSB_INDEX);
++ musb_context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
++ musb_context.devctl = musb_readb(musb_base, MUSB_DEVCTL);
++
++ for (i = 0; i < MUSB_C_NUM_EPS; ++i) {
++ musb_writeb(musb_base, MUSB_INDEX, i);
++ musb_context.index_regs[i].txmaxp =
++ musb_readw(musb_base, 0x10 + MUSB_TXMAXP);
++ musb_context.index_regs[i].txcsr =
++ musb_readw(musb_base, 0x10 + MUSB_TXCSR);
++ musb_context.index_regs[i].rxmaxp =
++ musb_readw(musb_base, 0x10 + MUSB_RXMAXP);
++ musb_context.index_regs[i].rxcsr =
++ musb_readw(musb_base, 0x10 + MUSB_RXCSR);
++ musb_context.index_regs[i].rxcount =
++ musb_readw(musb_base, 0x10 + MUSB_RXCOUNT);
++ musb_context.index_regs[i].txtype =
++ musb_readb(musb_base, 0x10 + MUSB_TXTYPE);
++ musb_context.index_regs[i].txinterval =
++ musb_readb(musb_base, 0x10 + MUSB_TXINTERVAL);
++ musb_context.index_regs[i].rxtype =
++ musb_readb(musb_base, 0x10 + MUSB_RXTYPE);
++ musb_context.index_regs[i].rxinterval =
++ musb_readb(musb_base, 0x10 + MUSB_RXINTERVAL);
++
++ musb_context.index_regs[i].txfifoadd =
++ musb_read_txfifoadd(musb_base);
++ musb_context.index_regs[i].rxfifoadd =
++ musb_read_rxfifoadd(musb_base);
++ musb_context.index_regs[i].txfifosz =
++ musb_read_txfifosz(musb_base);
++ musb_context.index_regs[i].rxfifosz =
++ musb_read_rxfifosz(musb_base);
++
++ musb_context.index_regs[i].txfunaddr =
++ musb_read_txfunaddr(musb_base, i);
++ musb_context.index_regs[i].txhubaddr =
++ musb_read_txhubaddr(musb_base, i);
++ musb_context.index_regs[i].txhubport =
++ musb_read_txhubport(musb_base, i);
++
++ musb_context.index_regs[i].rxfunaddr =
++ musb_read_rxfunaddr(musb_base, i);
++ musb_context.index_regs[i].rxhubaddr =
++ musb_read_rxhubaddr(musb_base, i);
++ musb_context.index_regs[i].rxhubport =
++ musb_read_rxhubport(musb_base, i);
++ }
++
++ musb_writeb(musb_base, MUSB_INDEX, musb_context.index);
++}
++
++void musb_restore_context(void __iomem *musb_base)
++{
++ int i;
++ void __iomem *ep_target_regs;
++
++ musb_writeb(musb_base, MUSB_FADDR, musb_context.faddr);
++ musb_writeb(musb_base, MUSB_POWER, musb_context.power);
++ musb_writew(musb_base, MUSB_INTRTX, musb_context.intrtx);
++ musb_writew(musb_base, MUSB_INTRRX, musb_context.intrrx);
++ musb_writew(musb_base, MUSB_INTRTXE, musb_context.intrtxe);
++ musb_writew(musb_base, MUSB_INTRRXE, musb_context.intrrxe);
++ musb_writeb(musb_base, MUSB_INTRUSB, musb_context.intrusb);
++ musb_writeb(musb_base, MUSB_INTRUSBE, musb_context.intrusbe);
++ musb_writew(musb_base, MUSB_FRAME, musb_context.frame);
++ musb_writeb(musb_base, MUSB_TESTMODE, musb_context.testmode);
++ musb_writeb(musb_base, MUSB_DEVCTL, musb_context.devctl);
++
++
++ for (i = 0; i < MUSB_C_NUM_EPS; ++i) {
++ musb_writeb(musb_base, MUSB_INDEX, i);
++ musb_writew(musb_base, 0x10 + MUSB_TXMAXP,
++ musb_context.index_regs[i].txmaxp);
++ musb_writew(musb_base, 0x10 + MUSB_TXCSR,
++ musb_context.index_regs[i].txcsr);
++ musb_writew(musb_base, 0x10 + MUSB_RXMAXP,
++ musb_context.index_regs[i].rxmaxp);
++ musb_writew(musb_base, 0x10 + MUSB_RXCSR,
++ musb_context.index_regs[i].rxcsr);
++ musb_writew(musb_base, 0x10 + MUSB_RXCOUNT,
++ musb_context.index_regs[i].rxcount);
++ musb_writeb(musb_base, 0x10 + MUSB_TXTYPE,
++ musb_context.index_regs[i].txtype);
++ musb_writeb(musb_base, 0x10 + MUSB_TXINTERVAL,
++ musb_context.index_regs[i].txinterval);
++ musb_writeb(musb_base, 0x10 + MUSB_RXTYPE,
++ musb_context.index_regs[i].rxtype);
++ musb_writeb(musb_base, 0x10 + MUSB_RXINTERVAL,
++ musb_context.index_regs[i].rxinterval);
++
++ musb_write_txfifosz(musb_base,
++ musb_context.index_regs[i].txfifosz);
++ musb_write_rxfifosz(musb_base,
++ musb_context.index_regs[i].rxfifosz);
++ musb_write_txfifoadd(musb_base,
++ musb_context.index_regs[i].txfifoadd);
++ musb_write_rxfifoadd(musb_base,
++ musb_context.index_regs[i].rxfifoadd);
++
++ musb_write_txfunaddr(musb_base, i,
++ musb_context.index_regs[i].txfunaddr);
++ musb_write_txhubaddr(musb_base, i,
++ musb_context.index_regs[i].txhubaddr);
++ musb_write_txhubport(musb_base, i,
++ musb_context.index_regs[i].txhubport);
++
++ ep_target_regs = musb_read_target_reg_base(i, musb_base);
++
++ musb_write_rxfunaddr(ep_target_regs,
++ musb_context.index_regs[i].rxfunaddr);
++ musb_write_rxhubaddr(ep_target_regs,
++ musb_context.index_regs[i].rxhubaddr);
++ musb_write_rxhubport(ep_target_regs,
++ musb_context.index_regs[i].rxhubport);
++ }
++
++ musb_writeb(musb_base, MUSB_INDEX, musb_context.index);
++
++ musb_platform_restore_context(&musb_context);
++}
++
+ static int musb_suspend(struct platform_device *pdev, pm_message_t message)
+ {
+ unsigned long flags;
+ struct musb *musb = dev_to_musb(&pdev->dev);
++ u8 reg;
+
+ if (!musb->clock)
+ return 0;
+
+ spin_lock_irqsave(&musb->lock, flags);
+
++ musb_save_context(musb->mregs);
++
+ if (is_peripheral_active(musb)) {
+- /* FIXME force disconnect unless we know USB will wake
+- * the system up quickly enough to respond ...
++ /* System is entering into suspend where gadget would not be
++ * able to respond to host and thus it will be in an unknown
++ * state for host.Re-enumemation of gadget is required after
++ * resume to make the gadget functional thus doing a force
++ * disconnect.
+ */
++ reg = musb_readb(musb->mregs, MUSB_POWER);
++ reg &= ~MUSB_POWER_SOFTCONN;
++ musb_writeb(musb->mregs, MUSB_POWER, reg);
++
+ } else if (is_host_active(musb)) {
+ /* we know all the children are suspended; sometimes
+ * they will even be wakeup-enabled.
+@@ -2205,6 +2354,8 @@ static int musb_resume_early(struct platform_device *pdev)
+ else
+ clk_enable(musb->clock);
+
++ musb_restore_context(musb->mregs);
++
+ /* for static cmos like DaVinci, register values were preserved
+ * unless for some reason the whole soc powered down or the USB
+ * module got reset through the PSC (vs just being disabled).
+@@ -2215,6 +2366,8 @@ static int musb_resume_early(struct platform_device *pdev)
+ #else
+ #define musb_suspend NULL
+ #define musb_resume_early NULL
++#define musb_save_context do {} while (0)
++#define musb_restore_context do {} while (0)
+ #endif
+
+ static struct platform_driver musb_driver = {
+diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
+index b0b4fbd..4568a8e 100644
+--- a/drivers/usb/musb/musb_core.h
++++ b/drivers/usb/musb/musb_core.h
+@@ -446,6 +446,45 @@ struct musb {
+ #endif
+ };
+
++#ifdef CONFIG_PM
++struct musb_csr_regs {
++ /* FIFO registers */
++ u16 txmaxp, txcsr, rxmaxp, rxcsr, rxcount;
++ u16 rxfifoadd, txfifoadd;
++ u8 txtype, txinterval, rxtype, rxinterval;
++ u8 rxfifosz, txfifosz;
++ u8 txfunaddr, txhubaddr, txhubport;
++ u8 rxfunaddr, rxhubaddr, rxhubport;
++};
++
++struct musb_context_registers {
++
++#if defined(CONFIG_ARCH_OMAP34XX)
++ u32 otg_sysconfig, otg_forcestandby;
++#endif
++ u8 faddr, power;
++ u16 intrtx, intrrx, intrtxe, intrrxe;
++ u8 intrusb, intrusbe;
++ u16 frame;
++ u8 index, testmode;
++
++ u8 devctl, misc;
++
++ struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
++};
++
++#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP2430)
++extern void musb_platform_save_context(struct musb_context_registers
++ *musb_context);
++extern void musb_platform_restore_context(struct musb_context_registers
++ *musb_context);
++#else
++#define musb_platform_save_context(x) do {} while (0)
++#define musb_platform_restore_context(x) do {} while (0)
++#endif
++
++#endif
++
+ static inline void musb_set_vbus(struct musb *musb, int is_on)
+ {
+ musb->board_set_vbus(musb, is_on);
+diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
+index fbfd3fd..a8e19da 100644
+--- a/drivers/usb/musb/musb_regs.h
++++ b/drivers/usb/musb/musb_regs.h
+@@ -321,6 +321,26 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
+ musb_writew(mbase, MUSB_RXFIFOADD, c_off);
+ }
+
++static inline u8 musb_read_txfifosz(void __iomem *mbase)
++{
++ return musb_readb(mbase, MUSB_TXFIFOSZ);
++}
++
++static inline u16 musb_read_txfifoadd(void __iomem *mbase)
++{
++ return musb_readw(mbase, MUSB_TXFIFOADD);
++}
++
++static inline u8 musb_read_rxfifosz(void __iomem *mbase)
++{
++ return musb_readb(mbase, MUSB_RXFIFOSZ);
++}
++
++static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
++{
++ return musb_readw(mbase, MUSB_RXFIFOADD);
++}
++
+ static inline u8 musb_read_configdata(void __iomem *mbase)
+ {
+ musb_writeb(mbase, MUSB_INDEX, 0);
+@@ -376,6 +396,36 @@ static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum,
+ qh_h_port_reg);
+ }
+
++static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)
++{
++ return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXFUNCADDR));
++}
++
++static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)
++{
++ return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXHUBADDR));
++}
++
++static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)
++{
++ return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_RXHUBPORT));
++}
++
++static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum)
++{
++ return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXFUNCADDR));
++}
++
++static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum)
++{
++ return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBADDR));
++}
++
++static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum)
++{
++ return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBPORT));
++}
++
+ #else /* CONFIG_BLACKFIN */
+
+ #define USB_BASE USB_FADDR
+@@ -464,6 +514,22 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
+ {
+ }
+
++static inline u8 musb_read_txfifosz(void __iomem *mbase)
++{
++}
++
++static inline u16 musb_read_txfifoadd(void __iomem *mbase)
++{
++}
++
++static inline u8 musb_read_rxfifosz(void __iomem *mbase)
++{
++}
++
++static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
++{
++}
++
+ static inline u8 musb_read_configdata(void __iomem *mbase)
+ {
+ return 0;
+@@ -509,6 +575,30 @@ static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum,
+ {
+ }
+
++static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum)
++{
++}
++
++static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum)
++{
++}
++
++static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum)
++{
++}
++
++static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum)
++{
++}
++
++static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum)
++{
++}
++
++static inline void musb_read_txhubport(void __iomem *mbase, u8 epnum)
++{
++}
++
+ #endif /* CONFIG_BLACKFIN */
+
+ #endif /* __MUSB_REGS_H__ */
+diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
+index 3487520..84af3b3 100644
+--- a/drivers/usb/musb/omap2430.c
++++ b/drivers/usb/musb/omap2430.c
+@@ -255,6 +255,22 @@ int __init musb_platform_init(struct musb *musb)
+ return 0;
+ }
+
++#ifdef CONFIG_PM
++void musb_platform_save_context(struct musb_context_registers
++ *musb_context)
++{
++ musb_context->otg_sysconfig = omap_readl(OTG_SYSCONFIG);
++ musb_context->otg_forcestandby = omap_readl(OTG_FORCESTDBY);
++}
++
++void musb_platform_restore_context(struct musb_context_registers
++ *musb_context)
++{
++ omap_writel(musb_context->otg_sysconfig, OTG_SYSCONFIG);
++ omap_writel(musb_context->otg_forcestandby, OTG_FORCESTDBY);
++}
++#endif
++
+ int musb_platform_suspend(struct musb *musb)
+ {
+ u32 l;
+--
+1.6.2.4
+
--- /dev/null
+From cbcea73d911a840a420b9e0dbf5e0715d00533b0 Mon Sep 17 00:00:00 2001
+From: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Fri, 11 Sep 2009 10:48:54 +0530
+Subject: [PATCH 16/16] usb: update defconfig
+
+ - Enabled USB Audio/Video (UVC)
+ - Enabled RNDIS gadget builtin
+ - ENabled EHCI
+---
+ arch/arm/configs/omap3_evm_defconfig | 229 +++++++++++++++++++++++++---------
+ 1 files changed, 171 insertions(+), 58 deletions(-)
+
+diff --git a/arch/arm/configs/omap3_evm_defconfig b/arch/arm/configs/omap3_evm_defconfig
+index d5ff477..8a8b4b0 100644
+--- a/arch/arm/configs/omap3_evm_defconfig
++++ b/arch/arm/configs/omap3_evm_defconfig
+@@ -9,7 +9,6 @@ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_TIME=y
+ CONFIG_GENERIC_CLOCKEVENTS=y
+ CONFIG_MMU=y
+-# CONFIG_NO_IOPORT is not set
+ CONFIG_GENERIC_HARDIRQS=y
+ CONFIG_STACKTRACE_SUPPORT=y
+ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+@@ -18,13 +17,12 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+ CONFIG_VECTORS_BASE=0xffff0000
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++CONFIG_CONSTRUCTORS=y
+
+ #
+ # General setup
+@@ -77,7 +75,6 @@ CONFIG_UID16=y
+ CONFIG_KALLSYMS=y
+ # CONFIG_KALLSYMS_ALL is not set
+ CONFIG_KALLSYMS_EXTRA_PASS=y
+-# CONFIG_STRIP_ASM_SYMS is not set
+ CONFIG_HOTPLUG=y
+ CONFIG_PRINTK=y
+ CONFIG_BUG=y
+@@ -90,7 +87,12 @@ CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_AIO=y
++
++#
++# Performance Counters
++#
+ CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_STRIP_ASM_SYMS is not set
+ CONFIG_COMPAT_BRK=y
+ CONFIG_SLAB=y
+ # CONFIG_SLUB is not set
+@@ -102,6 +104,10 @@ CONFIG_HAVE_OPROFILE=y
+ CONFIG_HAVE_KPROBES=y
+ CONFIG_HAVE_KRETPROBES=y
+ CONFIG_HAVE_CLK=y
++
++#
++# GCOV-based kernel profiling
++#
+ # CONFIG_SLOW_WORK is not set
+ CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+ CONFIG_SLABINFO=y
+@@ -114,7 +120,7 @@ CONFIG_MODULE_UNLOAD=y
+ CONFIG_MODVERSIONS=y
+ CONFIG_MODULE_SRCVERSION_ALL=y
+ CONFIG_BLOCK=y
+-# CONFIG_LBD is not set
++CONFIG_LBDAF=y
+ # CONFIG_BLK_DEV_BSG is not set
+ # CONFIG_BLK_DEV_INTEGRITY is not set
+
+@@ -141,13 +147,14 @@ CONFIG_FREEZER=y
+ # CONFIG_ARCH_VERSATILE is not set
+ # CONFIG_ARCH_AT91 is not set
+ # CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_GEMINI is not set
+ # CONFIG_ARCH_EBSA110 is not set
+ # CONFIG_ARCH_EP93XX is not set
+-# CONFIG_ARCH_GEMINI is not set
+ # CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_STMP3XXX is not set
+ # CONFIG_ARCH_NETX is not set
+ # CONFIG_ARCH_H720X is not set
+-# CONFIG_ARCH_IMX is not set
+ # CONFIG_ARCH_IOP13XX is not set
+ # CONFIG_ARCH_IOP32X is not set
+ # CONFIG_ARCH_IOP33X is not set
+@@ -156,25 +163,25 @@ CONFIG_FREEZER=y
+ # CONFIG_ARCH_IXP4XX is not set
+ # CONFIG_ARCH_L7200 is not set
+ # CONFIG_ARCH_KIRKWOOD is not set
+-# CONFIG_ARCH_KS8695 is not set
+-# CONFIG_ARCH_NS9XXX is not set
+ # CONFIG_ARCH_LOKI is not set
+ # CONFIG_ARCH_MV78XX0 is not set
+-# CONFIG_ARCH_MXC is not set
+ # CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_MMP is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_W90X900 is not set
+ # CONFIG_ARCH_PNX4008 is not set
+ # CONFIG_ARCH_PXA is not set
+-# CONFIG_ARCH_MMP is not set
++# CONFIG_ARCH_MSM is not set
+ # CONFIG_ARCH_RPC is not set
+ # CONFIG_ARCH_SA1100 is not set
+ # CONFIG_ARCH_S3C2410 is not set
+ # CONFIG_ARCH_S3C64XX is not set
+ # CONFIG_ARCH_SHARK is not set
+ # CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_U300 is not set
+ # CONFIG_ARCH_DAVINCI is not set
+ CONFIG_ARCH_OMAP=y
+-# CONFIG_ARCH_MSM is not set
+-# CONFIG_ARCH_W90X900 is not set
+
+ #
+ # TI OMAP Implementations
+@@ -183,6 +190,7 @@ CONFIG_ARCH_OMAP_OTG=y
+ # CONFIG_ARCH_OMAP1 is not set
+ # CONFIG_ARCH_OMAP2 is not set
+ CONFIG_ARCH_OMAP3=y
++# CONFIG_ARCH_OMAP4 is not set
+
+ #
+ # OMAP Feature Selections
+@@ -202,7 +210,8 @@ CONFIG_OMAP_DM_TIMER=y
+ CONFIG_OMAP_LL_DEBUG_UART1=y
+ # CONFIG_OMAP_LL_DEBUG_UART2 is not set
+ # CONFIG_OMAP_LL_DEBUG_UART3 is not set
+-CONFIG_OMAP_SERIAL_WAKE=y
++# CONFIG_OMAP_PM_NONE is not set
++CONFIG_OMAP_PM_NOOP=y
+ CONFIG_ARCH_OMAP34XX=y
+ CONFIG_ARCH_OMAP3430=y
+
+@@ -216,6 +225,7 @@ CONFIG_MACH_OMAP3EVM=y
+ # CONFIG_MACH_OMAP3_PANDORA is not set
+ # CONFIG_MACH_OMAP_3430SDP is not set
+ # CONFIG_MACH_NOKIA_RX51 is not set
++# CONFIG_MACH_OMAP_ZOOM2 is not set
+
+ #
+ # Processor Type
+@@ -243,7 +253,6 @@ CONFIG_ARM_THUMB=y
+ # CONFIG_CPU_DCACHE_DISABLE is not set
+ # CONFIG_CPU_BPREDICT_DISABLE is not set
+ CONFIG_HAS_TLS_REG=y
+-# CONFIG_OUTER_CACHE is not set
+ # CONFIG_ARM_ERRATA_430973 is not set
+ # CONFIG_ARM_ERRATA_458693 is not set
+ # CONFIG_ARM_ERRATA_460075 is not set
+@@ -271,7 +280,6 @@ CONFIG_PAGE_OFFSET=0xC0000000
+ CONFIG_HZ=128
+ CONFIG_AEABI=y
+ CONFIG_OABI_COMPAT=y
+-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+ # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+ # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+ # CONFIG_HIGHMEM is not set
+@@ -286,11 +294,12 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_PHYS_ADDR_T_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
+ CONFIG_VIRT_TO_BUS=y
+-CONFIG_UNEVICTABLE_LRU=y
+ CONFIG_HAVE_MLOCK=y
+ CONFIG_HAVE_MLOCKED_PAGE_BIT=y
++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+ # CONFIG_LEDS is not set
+ CONFIG_ALIGNMENT_TRAP=y
++# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+ #
+ # Boot options
+@@ -401,6 +410,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+ # CONFIG_PHONET is not set
++# CONFIG_IEEE802154 is not set
+ # CONFIG_NET_SCHED is not set
+ # CONFIG_DCB is not set
+
+@@ -418,7 +428,11 @@ CONFIG_WIRELESS=y
+ # CONFIG_WIRELESS_OLD_REGULATORY is not set
+ # CONFIG_WIRELESS_EXT is not set
+ # CONFIG_LIB80211 is not set
+-# CONFIG_MAC80211 is not set
++
++#
++# CFG80211 needs to be enabled for MAC80211
++#
++CONFIG_MAC80211_DEFAULT_PS_VALUE=0
+ # CONFIG_WIMAX is not set
+ # CONFIG_RFKILL is not set
+ # CONFIG_NET_9P is not set
+@@ -516,6 +530,7 @@ CONFIG_MTD_NAND=y
+ # CONFIG_MTD_NAND_ECC_SMC is not set
+ # CONFIG_MTD_NAND_MUSEUM_IDS is not set
+ # CONFIG_MTD_NAND_GPIO is not set
++# CONFIG_MTD_NAND_OMAP2 is not set
+ CONFIG_MTD_NAND_IDS=y
+ # CONFIG_MTD_NAND_DISKONCHIP is not set
+ # CONFIG_MTD_NAND_NANDSIM is not set
+@@ -551,6 +566,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
+ # CONFIG_BLK_DEV_XIP is not set
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
++# CONFIG_MG_DISK is not set
+ # CONFIG_MISC_DEVICES is not set
+ CONFIG_HAVE_IDE=y
+ # CONFIG_IDE is not set
+@@ -574,10 +590,6 @@ CONFIG_BLK_DEV_SD=y
+ # CONFIG_BLK_DEV_SR is not set
+ # CONFIG_CHR_DEV_SG is not set
+ # CONFIG_CHR_DEV_SCH is not set
+-
+-#
+-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+-#
+ # CONFIG_SCSI_MULTI_LUN is not set
+ # CONFIG_SCSI_CONSTANTS is not set
+ # CONFIG_SCSI_LOGGING is not set
+@@ -602,7 +614,6 @@ CONFIG_SCSI_LOWLEVEL=y
+ # CONFIG_ATA is not set
+ # CONFIG_MD is not set
+ CONFIG_NETDEVICES=y
+-CONFIG_COMPAT_NET_DEV_OPS=y
+ # CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
+ # CONFIG_MACVLAN is not set
+@@ -628,6 +639,8 @@ CONFIG_SMC911X=y
+ # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+ # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+ # CONFIG_B44 is not set
++# CONFIG_KS8842 is not set
++# CONFIG_KS8851 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+
+@@ -677,12 +690,13 @@ CONFIG_INPUT_EVDEV=y
+ #
+ CONFIG_INPUT_KEYBOARD=y
+ # CONFIG_KEYBOARD_ATKBD is not set
+-# CONFIG_KEYBOARD_SUNKBD is not set
+ # CONFIG_KEYBOARD_LKKBD is not set
+-# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_GPIO is not set
++# CONFIG_KEYBOARD_MATRIX is not set
+ # CONFIG_KEYBOARD_NEWTON is not set
+ # CONFIG_KEYBOARD_STOWAWAY is not set
+-# CONFIG_KEYBOARD_GPIO is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
+ # CONFIG_INPUT_MOUSE is not set
+ # CONFIG_INPUT_JOYSTICK is not set
+ # CONFIG_INPUT_TABLET is not set
+@@ -692,6 +706,7 @@ CONFIG_TOUCHSCREEN_ADS7846=y
+ # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+ # CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+ # CONFIG_TOUCHSCREEN_AD7879 is not set
++# CONFIG_TOUCHSCREEN_EETI is not set
+ # CONFIG_TOUCHSCREEN_FUJITSU is not set
+ # CONFIG_TOUCHSCREEN_GUNZE is not set
+ # CONFIG_TOUCHSCREEN_ELO is not set
+@@ -705,6 +720,7 @@ CONFIG_TOUCHSCREEN_ADS7846=y
+ # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+ # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+ # CONFIG_TOUCHSCREEN_TSC2007 is not set
++# CONFIG_TOUCHSCREEN_W90X900 is not set
+ # CONFIG_INPUT_MISC is not set
+
+ #
+@@ -764,6 +780,7 @@ CONFIG_I2C_HELPER_AUTO=y
+ #
+ # I2C system bus drivers (mostly embedded / system-on-chip)
+ #
++# CONFIG_I2C_DESIGNWARE is not set
+ # CONFIG_I2C_GPIO is not set
+ # CONFIG_I2C_OCORES is not set
+ CONFIG_I2C_OMAP=y
+@@ -789,7 +806,6 @@ CONFIG_I2C_OMAP=y
+ # CONFIG_SENSORS_PCF8574 is not set
+ # CONFIG_PCF8575 is not set
+ # CONFIG_SENSORS_PCA9539 is not set
+-# CONFIG_SENSORS_MAX6875 is not set
+ # CONFIG_SENSORS_TSL2550 is not set
+ # CONFIG_I2C_DEBUG_CORE is not set
+ # CONFIG_I2C_DEBUG_ALGO is not set
+@@ -850,6 +866,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y
+ #
+ # CONFIG_SOFT_WATCHDOG is not set
+ CONFIG_OMAP_WATCHDOG=y
++# CONFIG_TWL4030_WATCHDOG is not set
+
+ #
+ # USB-based Watchdog Cards
+@@ -880,23 +897,74 @@ CONFIG_TWL4030_CORE=y
+ # CONFIG_MFD_WM8400 is not set
+ # CONFIG_MFD_WM8350_I2C is not set
+ # CONFIG_MFD_PCF50633 is not set
+-
+-#
+-# Multimedia devices
+-#
++# CONFIG_AB3100_CORE is not set
++# CONFIG_EZX_PCAP is not set
++CONFIG_MEDIA_SUPPORT=y
+
+ #
+ # Multimedia core support
+ #
+-# CONFIG_VIDEO_DEV is not set
++CONFIG_VIDEO_DEV=y
++CONFIG_VIDEO_V4L2_COMMON=y
++CONFIG_VIDEO_ALLOW_V4L1=y
++CONFIG_VIDEO_V4L1_COMPAT=y
+ # CONFIG_DVB_CORE is not set
+-# CONFIG_VIDEO_MEDIA is not set
++CONFIG_VIDEO_MEDIA=y
+
+ #
+ # Multimedia drivers
+ #
+-CONFIG_DAB=y
+-# CONFIG_USB_DABUSB is not set
++# CONFIG_MEDIA_ATTACH is not set
++CONFIG_MEDIA_TUNER=y
++# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
++CONFIG_MEDIA_TUNER_SIMPLE=y
++CONFIG_MEDIA_TUNER_TDA8290=y
++CONFIG_MEDIA_TUNER_TDA9887=y
++CONFIG_MEDIA_TUNER_TEA5761=y
++CONFIG_MEDIA_TUNER_TEA5767=y
++CONFIG_MEDIA_TUNER_MT20XX=y
++CONFIG_MEDIA_TUNER_XC2028=y
++CONFIG_MEDIA_TUNER_XC5000=y
++CONFIG_MEDIA_TUNER_MC44S803=y
++CONFIG_VIDEO_V4L2=y
++CONFIG_VIDEO_V4L1=y
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
++CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
++# CONFIG_VIDEO_VIVI is not set
++# CONFIG_VIDEO_CPIA is not set
++# CONFIG_VIDEO_CPIA2 is not set
++# CONFIG_VIDEO_SAA5246A is not set
++# CONFIG_VIDEO_SAA5249 is not set
++# CONFIG_SOC_CAMERA is not set
++CONFIG_V4L_USB_DRIVERS=y
++CONFIG_USB_VIDEO_CLASS=y
++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
++# CONFIG_USB_GSPCA is not set
++# CONFIG_VIDEO_PVRUSB2 is not set
++# CONFIG_VIDEO_HDPVR is not set
++# CONFIG_VIDEO_EM28XX is not set
++# CONFIG_VIDEO_CX231XX is not set
++# CONFIG_VIDEO_USBVISION is not set
++# CONFIG_USB_VICAM is not set
++# CONFIG_USB_IBMCAM is not set
++# CONFIG_USB_KONICAWC is not set
++# CONFIG_USB_QUICKCAM_MESSENGER is not set
++# CONFIG_USB_ET61X251 is not set
++# CONFIG_VIDEO_OVCAMCHIP is not set
++# CONFIG_USB_OV511 is not set
++# CONFIG_USB_SE401 is not set
++# CONFIG_USB_SN9C102 is not set
++# CONFIG_USB_STV680 is not set
++# CONFIG_USB_ZC0301 is not set
++# CONFIG_USB_PWC is not set
++# CONFIG_USB_PWC_INPUT_EVDEV is not set
++# CONFIG_USB_ZR364XX is not set
++# CONFIG_USB_STKWEBCAM is not set
++# CONFIG_USB_S2255 is not set
++# CONFIG_RADIO_ADAPTERS is not set
++# CONFIG_DAB is not set
+
+ #
+ # Graphics support
+@@ -916,7 +984,35 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
+ #
+ # CONFIG_VGA_CONSOLE is not set
+ CONFIG_DUMMY_CONSOLE=y
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=y
++# CONFIG_SOUND_OSS_CORE is not set
++CONFIG_SND=y
++CONFIG_SND_TIMER=y
++CONFIG_SND_PCM=y
++CONFIG_SND_HWDEP=y
++CONFIG_SND_RAWMIDI=y
++# CONFIG_SND_SEQUENCER is not set
++# CONFIG_SND_MIXER_OSS is not set
++# CONFIG_SND_PCM_OSS is not set
++# CONFIG_SND_HRTIMER is not set
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++# CONFIG_SND_VERBOSE_PROCFS is not set
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++# CONFIG_SND_RAWMIDI_SEQ is not set
++# CONFIG_SND_OPL3_LIB_SEQ is not set
++# CONFIG_SND_OPL4_LIB_SEQ is not set
++# CONFIG_SND_SBAWE_SEQ is not set
++# CONFIG_SND_EMU10K1_SEQ is not set
++# CONFIG_SND_DRIVERS is not set
++# CONFIG_SND_ARM is not set
++# CONFIG_SND_SPI is not set
++CONFIG_SND_USB=y
++CONFIG_SND_USB_AUDIO=y
++# CONFIG_SND_USB_CAIAQ is not set
++# CONFIG_SND_SOC is not set
++# CONFIG_SOUND_PRIME is not set
+ CONFIG_HID_SUPPORT=y
+ CONFIG_HID=y
+ # CONFIG_HID_DEBUG is not set
+@@ -938,7 +1034,7 @@ CONFIG_USB_HID=y
+ # CONFIG_HID_CHERRY is not set
+ # CONFIG_HID_CHICONY is not set
+ # CONFIG_HID_CYPRESS is not set
+-# CONFIG_DRAGONRISE_FF is not set
++# CONFIG_HID_DRAGONRISE is not set
+ # CONFIG_HID_EZKEY is not set
+ # CONFIG_HID_KYE is not set
+ # CONFIG_HID_GYRATION is not set
+@@ -952,14 +1048,15 @@ CONFIG_USB_HID=y
+ # CONFIG_HID_SAMSUNG is not set
+ # CONFIG_HID_SONY is not set
+ # CONFIG_HID_SUNPLUS is not set
+-# CONFIG_GREENASIA_FF is not set
++# CONFIG_HID_GREENASIA is not set
++# CONFIG_HID_SMARTJOYPLUS is not set
+ # CONFIG_HID_TOPSEED is not set
+-# CONFIG_THRUSTMASTER_FF is not set
+-# CONFIG_ZEROPLUS_FF is not set
++# CONFIG_HID_THRUSTMASTER is not set
++# CONFIG_HID_ZEROPLUS is not set
+ CONFIG_USB_SUPPORT=y
+ CONFIG_USB_ARCH_HAS_HCD=y
+ CONFIG_USB_ARCH_HAS_OHCI=y
+-# CONFIG_USB_ARCH_HAS_EHCI is not set
++CONFIG_USB_ARCH_HAS_EHCI=y
+ CONFIG_USB=y
+ # CONFIG_USB_DEBUG is not set
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+@@ -974,7 +1071,7 @@ CONFIG_USB_SUSPEND=y
+ CONFIG_USB_OTG=y
+ # CONFIG_USB_OTG_WHITELIST is not set
+ # CONFIG_USB_OTG_BLACKLIST_HUB is not set
+-CONFIG_USB_MON=y
++# CONFIG_USB_MON is not set
+ # CONFIG_USB_WUSB is not set
+ # CONFIG_USB_WUSB_CBAF is not set
+
+@@ -982,6 +1079,9 @@ CONFIG_USB_MON=y
+ # USB Host Controller Drivers
+ #
+ # CONFIG_USB_C67X00_HCD is not set
++CONFIG_USB_EHCI_HCD=y
++# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
++# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+ # CONFIG_USB_OXU210HP_HCD is not set
+ # CONFIG_USB_ISP116X_HCD is not set
+ # CONFIG_USB_ISP1760_HCD is not set
+@@ -1003,7 +1103,7 @@ CONFIG_USB_MUSB_HDRC_HCD=y
+ # CONFIG_MUSB_PIO_ONLY is not set
+ CONFIG_USB_INVENTRA_DMA=y
+ # CONFIG_USB_TI_CPPI_DMA is not set
+-# CONFIG_USB_MUSB_DEBUG is not set
++CONFIG_USB_MUSB_DEBUG=y
+
+ #
+ # USB Device Class drivers
+@@ -1063,10 +1163,11 @@ CONFIG_USB_STORAGE=y
+ # CONFIG_USB_IDMOUSE is not set
+ # CONFIG_USB_FTDI_ELAN is not set
+ # CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_SISUSBVGA is not set
+ # CONFIG_USB_LD is not set
+ # CONFIG_USB_TRANCEVIBRATOR is not set
+ # CONFIG_USB_IOWARRIOR is not set
+-CONFIG_USB_TEST=y
++# CONFIG_USB_TEST is not set
+ # CONFIG_USB_ISIGHTFW is not set
+ # CONFIG_USB_VST is not set
+ CONFIG_USB_GADGET=y
+@@ -1081,19 +1182,22 @@ CONFIG_USB_GADGET_SELECTED=y
+ # CONFIG_USB_GADGET_OMAP is not set
+ # CONFIG_USB_GADGET_PXA25X is not set
+ # CONFIG_USB_GADGET_PXA27X is not set
+-# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_S3C_HSOTG is not set
+ # CONFIG_USB_GADGET_IMX is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
+ # CONFIG_USB_GADGET_M66592 is not set
+ # CONFIG_USB_GADGET_AMD5536UDC is not set
+ # CONFIG_USB_GADGET_FSL_QE is not set
+ # CONFIG_USB_GADGET_CI13XXX is not set
+ # CONFIG_USB_GADGET_NET2280 is not set
+ # CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LANGWELL is not set
+ # CONFIG_USB_GADGET_DUMMY_HCD is not set
+ CONFIG_USB_GADGET_DUALSPEED=y
+-CONFIG_USB_ZERO=m
+-# CONFIG_USB_ZERO_HNPTEST is not set
+-# CONFIG_USB_ETH is not set
++# CONFIG_USB_ZERO is not set
++# CONFIG_USB_AUDIO is not set
++CONFIG_USB_ETH=y
++CONFIG_USB_ETH_RNDIS=y
+ # CONFIG_USB_GADGETFS is not set
+ # CONFIG_USB_FILE_STORAGE is not set
+ # CONFIG_USB_G_SERIAL is not set
+@@ -1108,7 +1212,7 @@ CONFIG_USB_OTG_UTILS=y
+ # CONFIG_USB_GPIO_VBUS is not set
+ # CONFIG_ISP1301_OMAP is not set
+ # CONFIG_TWL4030_USB is not set
+-# CONFIG_NOP_USB_XCEIV is not set
++CONFIG_NOP_USB_XCEIV=y
+ CONFIG_MMC=y
+ # CONFIG_MMC_DEBUG is not set
+ # CONFIG_MMC_UNSAFE_RESUME is not set
+@@ -1125,7 +1229,6 @@ CONFIG_MMC_BLOCK_BOUNCE=y
+ # MMC/SD/SDIO Host Controller Drivers
+ #
+ # CONFIG_MMC_SDHCI is not set
+-# CONFIG_MMC_OMAP is not set
+ CONFIG_MMC_OMAP_HS=m
+ # CONFIG_MMC_SPI is not set
+ # CONFIG_MEMSTICK is not set
+@@ -1139,12 +1242,20 @@ CONFIG_REGULATOR=y
+ # CONFIG_REGULATOR_DEBUG is not set
+ # CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+ # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
++# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+ # CONFIG_REGULATOR_BQ24022 is not set
++# CONFIG_REGULATOR_MAX1586 is not set
+ CONFIG_REGULATOR_TWL4030=y
++# CONFIG_REGULATOR_LP3971 is not set
+ # CONFIG_UIO is not set
+ # CONFIG_STAGING is not set
+
+ #
++# CBUS support
++#
++# CONFIG_CBUS is not set
++
++#
+ # File systems
+ #
+ CONFIG_EXT2_FS=y
+@@ -1158,10 +1269,12 @@ CONFIG_JBD=y
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+-CONFIG_FILE_LOCKING=y
+ # CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_BTRFS_FS is not set
++CONFIG_FILE_LOCKING=y
++CONFIG_FSNOTIFY=y
+ CONFIG_DNOTIFY=y
+ CONFIG_INOTIFY=y
+ CONFIG_INOTIFY_USER=y
+@@ -1247,6 +1360,7 @@ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+ CONFIG_NFS_V4=y
++# CONFIG_NFS_V4_1 is not set
+ CONFIG_ROOT_NFS=y
+ # CONFIG_NFSD is not set
+ CONFIG_LOCKD=y
+@@ -1349,6 +1463,7 @@ CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+ # CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_OBJECTS is not set
+ # CONFIG_DEBUG_SLAB is not set
++# CONFIG_DEBUG_KMEMLEAK is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+@@ -1377,17 +1492,15 @@ CONFIG_DEBUG_INFO=y
+ # CONFIG_PAGE_POISONING is not set
+ CONFIG_HAVE_FUNCTION_TRACER=y
+ CONFIG_TRACING_SUPPORT=y
+-
+-#
+-# Tracers
+-#
++CONFIG_FTRACE=y
+ # CONFIG_FUNCTION_TRACER is not set
+ # CONFIG_IRQSOFF_TRACER is not set
+ # CONFIG_SCHED_TRACER is not set
+-# CONFIG_CONTEXT_SWITCH_TRACER is not set
+-# CONFIG_EVENT_TRACER is not set
++# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+ # CONFIG_BOOT_TRACER is not set
+-# CONFIG_TRACE_BRANCH_PROFILING is not set
++CONFIG_BRANCH_PROFILE_NONE=y
++# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
++# CONFIG_PROFILE_ALL_BRANCHES is not set
+ # CONFIG_STACK_TRACER is not set
+ # CONFIG_KMEMTRACE is not set
+ # CONFIG_WORKQUEUE_TRACER is not set
+--
+1.6.2.4
+
file://defconfig"
SRC_URI_append = " \
- file://ehci-phy-reset.patch;patch=1 \
file://ehci.patch;patch=1 \
file://0001-implement-TIF_RESTORE_SIGMASK-support-and-enable-the.patch;patch=1 \
file://cache/l1cache-shift.patch;patch=1 \
file://madc/madc-driver.patch;patch=1 \
file://madc/madc.patch;patch=1 \
file://arch-has-holes.diff;patch=1 \
+ file://usb/0001-musb-fix-put_device-call-sequence.patch;patch=1 \
+ file://usb/0002-ehci-fix-ehci-pin-mux-init.patch;patch=1 \
+ file://usb/0003-ehci-adding-mux-pin-for-EHCI-phy-reset-line.patch;patch=1 \
+ file://usb/0004-ehci-correct-EHCI-init-parameters-on-OMAP3EVM.patch;patch=1 \
+ file://usb/0005-ehci-fix-phy_reset-init-in-ehci-probe.patch;patch=1 \
+ file://usb/0006-ehci-increase-timeout-to-fix-ehci-failure.patch;patch=1 \
+ file://usb/0007-ehci-portwise-configurations.patch;patch=1 \
+ file://usb/0008-omap3-Add-CHIP_GE_OMAP3430ES3-for-HSUSB.patch;patch=1 \
+ file://usb/0009-ehci-Support-for-ES3.x.patch;patch=1 \
+ file://usb/0010-ehci-update-driver-with-generic-change.patch;patch=1 \
+ file://usb/0011-musb-fix-musb-gadget_driver-NULL-bug.patch;patch=1 \
+ file://usb/0012-musb-Add-back-old-musb-procfs-file.patch;patch=1 \
+ file://usb/0013-musb-Remove-USB_SUSPEND-auto-select-with-OTG.patch;patch=1 \
+ file://usb/0014-musb-disable-PING-on-status-phase-of-control-transf.patch;patch=1 \
+ file://usb/0015-musb-Add-context-save-and-restore-support.patch;patch=1 \
+ file://usb/0016-usb-update-defconfig.patch;patch=1 \
"
SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \
git.openpandora.org / openembedded.git / commitdiff