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ASoC: WM8804: Power down the PLL correctly
authorDimitris Papastamos <dp@opensource.wolfsonmicro.com>
Mon, 4 Oct 2010 08:37:48 +0000 (09:37 +0100)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Mon, 4 Oct 2010 15:03:11 +0000 (08:03 -0700)
The PLL is disabled when the corresponding bit is set not the other
way around.  This commit depends on my other commit with Subject
"ASoC: WM8804: Refactor set_pll code to avoid GCC warnings".

Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

No differences found
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