clk: sunxi: Rework MMC phase clocks
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Sun, 7 Dec 2014 16:43:04 +0000 (17:43 +0100)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 14 Jan 2015 09:39:16 +0000 (10:39 +0100)
Instead of having three different clocks for the main MMC clock and the two
phase sub-clocks, which involved having three different drivers sharing the
same register, rework it to have the same single driver registering three
different clocks.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Mike Turquette <mturquette@linaro.org>

No differences found