xen/PMU: Intercept PMU-related MSR and APIC accesses

Provide interfaces for recognizing accesses to PMU-related MSRs and
LVTPC APIC and process these accesses in Xen PMU code.

(The interrupt handler performs XENPMU_flush right away in the beginning
since no PMU emulation is available. It will be added with a later patch).

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>

diff --git a/arch/x86/xen/apic.c b/arch/x86/xen/apic.c
index d03ebfa..acda713 100644 (file)
--- a/arch/x86/xen/apic.c
+++ b/arch/x86/xen/apic.c
@@ -7,6 +7,7 @@
 #include <xen/xen.h>
 #include <xen/interface/physdev.h>
 #include "xen-ops.h"
+#include "pmu.h"
 #include "smp.h"
 
 static unsigned int xen_io_apic_read(unsigned apic, unsigned reg)
@@ -72,8 +73,10 @@ static u32 xen_apic_read(u32 reg)
 
 static void xen_apic_write(u32 reg, u32 val)
 {
-       if (reg == APIC_LVTPC)
+       if (reg == APIC_LVTPC) {
+               (void)pmu_apic_update(reg);
                return;
+       }
 
        /* Warn to see if there's any stray references */
        WARN(1,"register: %x, value: %x\n", reg, val);

diff --cc arch/x86/xen/enlighten.c
Simple merge

diff --cc arch/x86/xen/pmu.c
Simple merge

diff --cc arch/x86/xen/pmu.h
Simple merge

diff --cc include/xen/interface/xenpmu.h
Simple merge