clk: samsung: exynos5433: Add clocks for CMU_CAM0 domain
authorChanwoo Choi <cw00.choi@samsung.com>
Tue, 3 Feb 2015 00:13:55 +0000 (09:13 +0900)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 5 Feb 2015 18:31:07 +0000 (19:31 +0100)
This patch adds the mux/divider/gate clocks for CMU_CAM0 domain which
generates the clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

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