ARM: CSR: add rtc i/o bridge interface for SiRFprimaII
authorZhiwu Song <zhiwu.song@csr.com>
Wed, 31 Aug 2011 02:20:34 +0000 (19:20 -0700)
committerBarry Song <21cnbao@gmail.com>
Sun, 11 Sep 2011 01:17:53 +0000 (09:17 +0800)
The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.

Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

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