net: gem: ignore tx_clk if MII is used
authorMartin Kaistra <martin.kaistra@linutronix.de>
Tue, 15 Apr 2025 15:04:00 +0000 (17:04 +0200)
committerMichal Simek <michal.simek@amd.com>
Mon, 2 Jun 2025 07:13:49 +0000 (09:13 +0200)
If the MII interface is used, the PHY is the clock master, thus don't
set the clock rate. On Zynq-7000, this will prevent the following
error:
  zynq_gem ethernet@e000b000: failed to set tx clock rate 25000000

Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Link: https://lore.kernel.org/r/20250415150400.136723-1-martin.kaistra@linutronix.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
drivers/net/zynq_gem.c

index 461805a..703e224 100644 (file)
@@ -567,12 +567,14 @@ static int zynq_gem_init(struct udevice *dev)
        }
 #endif
 
-       ret = clk_get_rate(&priv->tx_clk);
-       if (ret != clk_rate) {
-               ret = clk_set_rate(&priv->tx_clk, clk_rate);
-               if (IS_ERR_VALUE(ret)) {
-                       dev_err(dev, "failed to set tx clock rate %ld\n", clk_rate);
-                       return ret;
+       if (priv->interface != PHY_INTERFACE_MODE_MII) {
+               ret = clk_get_rate(&priv->tx_clk);
+               if (ret != clk_rate) {
+                       ret = clk_set_rate(&priv->tx_clk, clk_rate);
+                       if (IS_ERR_VALUE(ret)) {
+                               dev_err(dev, "failed to set tx clock rate %ld\n", clk_rate);
+                               return ret;
+                       }
                }
        }