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drm/radeon: avivo chips have no separate int bit for display
authorDave Airlie <airlied@redhat.com>
Fri, 18 Sep 2009 04:31:48 +0000 (14:31 +1000)
committerDave Airlie <airlied@redhat.com>
Fri, 18 Sep 2009 04:34:06 +0000 (14:34 +1000)
display interrupts are not enabled via this register, the
DISPLAY_INT bit is a status only to show that other regs
need to be read.

Noticed by Alex Deucher

Signed-off-by: Dave Airlie <airlied@redhat.com>

No differences found
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