--- /dev/null
+LIBROOT=/home/notaz/dev/pnd/libroot/
+#CROSS_COMPILE ?= arm-none-linux-gnueabi-
+CC=$(CROSS_COMPILE)gcc
+CFLAGS += -Wall -ggdb
+ifndef DEBUG
+CFLAGS += -O2
+endif
+ifdef CROSS_COMPILE
+CFLAGS += -mcpu=cortex-a8 -mfpu=neon -mfloat-abi=softfp
+endif
+
+wlstat : LDFLAGS += -lrt
+
+memspeed : memspeed.c neoncpy.S
+ $(CC) $(CFLAGS) $^ -o $@
+
+%: %.c
+ $(CC) $(CFLAGS) $^ -o $@ $(LDFLAGS)
--- /dev/null
+/*
+ * $Id: evtest.c,v 1.23 2005/02/06 13:51:42 vojtech Exp $
+ *
+ * Copyright (c) 1999-2000 Vojtech Pavlik
+ *
+ * Event device test program
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Should you need to contact me, the author, you can do so either by
+ * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
+ * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic
+ */
+
+#include <stdint.h>
+
+#include <linux/input.h>
+
+#include <string.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <stdio.h>
+
+#ifndef EV_SYN
+#define EV_SYN 0
+#endif
+
+char *events[EV_MAX + 1] = {
+ [0 ... EV_MAX] = NULL,
+ [EV_SYN] = "Sync", [EV_KEY] = "Key",
+ [EV_REL] = "Relative", [EV_ABS] = "Absolute",
+ [EV_MSC] = "Misc", [EV_LED] = "LED",
+ [EV_SND] = "Sound", [EV_REP] = "Repeat",
+ [EV_FF] = "ForceFeedback", [EV_PWR] = "Power",
+ [EV_FF_STATUS] = "ForceFeedbackStatus", [EV_SW] = "Switch",
+};
+
+char *keys[KEY_MAX + 1] = {
+ [0 ... KEY_MAX] = NULL,
+ [KEY_RESERVED] = "Reserved", [KEY_ESC] = "Esc",
+ [KEY_1] = "1", [KEY_2] = "2",
+ [KEY_3] = "3", [KEY_4] = "4",
+ [KEY_5] = "5", [KEY_6] = "6",
+ [KEY_7] = "7", [KEY_8] = "8",
+ [KEY_9] = "9", [KEY_0] = "0",
+ [KEY_MINUS] = "Minus", [KEY_EQUAL] = "Equal",
+ [KEY_BACKSPACE] = "Backspace", [KEY_TAB] = "Tab",
+ [KEY_Q] = "Q", [KEY_W] = "W",
+ [KEY_E] = "E", [KEY_R] = "R",
+ [KEY_T] = "T", [KEY_Y] = "Y",
+ [KEY_U] = "U", [KEY_I] = "I",
+ [KEY_O] = "O", [KEY_P] = "P",
+ [KEY_LEFTBRACE] = "LeftBrace", [KEY_RIGHTBRACE] = "RightBrace",
+ [KEY_ENTER] = "Enter", [KEY_LEFTCTRL] = "LeftControl",
+ [KEY_A] = "A", [KEY_S] = "S",
+ [KEY_D] = "D", [KEY_F] = "F",
+ [KEY_G] = "G", [KEY_H] = "H",
+ [KEY_J] = "J", [KEY_K] = "K",
+ [KEY_L] = "L", [KEY_SEMICOLON] = "Semicolon",
+ [KEY_APOSTROPHE] = "Apostrophe", [KEY_GRAVE] = "Grave",
+ [KEY_LEFTSHIFT] = "LeftShift", [KEY_BACKSLASH] = "BackSlash",
+ [KEY_Z] = "Z", [KEY_X] = "X",
+ [KEY_C] = "C", [KEY_V] = "V",
+ [KEY_B] = "B", [KEY_N] = "N",
+ [KEY_M] = "M", [KEY_COMMA] = "Comma",
+ [KEY_DOT] = "Dot", [KEY_SLASH] = "Slash",
+ [KEY_RIGHTSHIFT] = "RightShift", [KEY_KPASTERISK] = "KPAsterisk",
+ [KEY_LEFTALT] = "LeftAlt", [KEY_SPACE] = "Space",
+ [KEY_CAPSLOCK] = "CapsLock", [KEY_F1] = "F1",
+ [KEY_F2] = "F2", [KEY_F3] = "F3",
+ [KEY_F4] = "F4", [KEY_F5] = "F5",
+ [KEY_F6] = "F6", [KEY_F7] = "F7",
+ [KEY_F8] = "F8", [KEY_F9] = "F9",
+ [KEY_F10] = "F10", [KEY_NUMLOCK] = "NumLock",
+ [KEY_SCROLLLOCK] = "ScrollLock", [KEY_KP7] = "KP7",
+ [KEY_KP8] = "KP8", [KEY_KP9] = "KP9",
+ [KEY_KPMINUS] = "KPMinus", [KEY_KP4] = "KP4",
+ [KEY_KP5] = "KP5", [KEY_KP6] = "KP6",
+ [KEY_KPPLUS] = "KPPlus", [KEY_KP1] = "KP1",
+ [KEY_KP2] = "KP2", [KEY_KP3] = "KP3",
+ [KEY_KP0] = "KP0", [KEY_KPDOT] = "KPDot",
+ [KEY_ZENKAKUHANKAKU] = "Zenkaku/Hankaku", [KEY_102ND] = "102nd",
+ [KEY_F11] = "F11", [KEY_F12] = "F12",
+ [KEY_RO] = "RO", [KEY_KATAKANA] = "Katakana",
+ [KEY_HIRAGANA] = "HIRAGANA", [KEY_HENKAN] = "Henkan",
+ [KEY_KATAKANAHIRAGANA] = "Katakana/Hiragana", [KEY_MUHENKAN] = "Muhenkan",
+ [KEY_KPJPCOMMA] = "KPJpComma", [KEY_KPENTER] = "KPEnter",
+ [KEY_RIGHTCTRL] = "RightCtrl", [KEY_KPSLASH] = "KPSlash",
+ [KEY_SYSRQ] = "SysRq", [KEY_RIGHTALT] = "RightAlt",
+ [KEY_LINEFEED] = "LineFeed", [KEY_HOME] = "Home",
+ [KEY_UP] = "Up", [KEY_PAGEUP] = "PageUp",
+ [KEY_LEFT] = "Left", [KEY_RIGHT] = "Right",
+ [KEY_END] = "End", [KEY_DOWN] = "Down",
+ [KEY_PAGEDOWN] = "PageDown", [KEY_INSERT] = "Insert",
+ [KEY_DELETE] = "Delete", [KEY_MACRO] = "Macro",
+ [KEY_MUTE] = "Mute", [KEY_VOLUMEDOWN] = "VolumeDown",
+ [KEY_VOLUMEUP] = "VolumeUp", [KEY_POWER] = "Power",
+ [KEY_KPEQUAL] = "KPEqual", [KEY_KPPLUSMINUS] = "KPPlusMinus",
+ [KEY_PAUSE] = "Pause", [KEY_KPCOMMA] = "KPComma",
+ [KEY_HANGUEL] = "Hanguel", [KEY_HANJA] = "Hanja",
+ [KEY_YEN] = "Yen", [KEY_LEFTMETA] = "LeftMeta",
+ [KEY_RIGHTMETA] = "RightMeta", [KEY_COMPOSE] = "Compose",
+ [KEY_STOP] = "Stop", [KEY_AGAIN] = "Again",
+ [KEY_PROPS] = "Props", [KEY_UNDO] = "Undo",
+ [KEY_FRONT] = "Front", [KEY_COPY] = "Copy",
+ [KEY_OPEN] = "Open", [KEY_PASTE] = "Paste",
+ [KEY_FIND] = "Find", [KEY_CUT] = "Cut",
+ [KEY_HELP] = "Help", [KEY_MENU] = "Menu",
+ [KEY_CALC] = "Calc", [KEY_SETUP] = "Setup",
+ [KEY_SLEEP] = "Sleep", [KEY_WAKEUP] = "WakeUp",
+ [KEY_FILE] = "File", [KEY_SENDFILE] = "SendFile",
+ [KEY_DELETEFILE] = "DeleteFile", [KEY_XFER] = "X-fer",
+ [KEY_PROG1] = "Prog1", [KEY_PROG2] = "Prog2",
+ [KEY_WWW] = "WWW", [KEY_MSDOS] = "MSDOS",
+ [KEY_COFFEE] = "Coffee", [KEY_DIRECTION] = "Direction",
+ [KEY_CYCLEWINDOWS] = "CycleWindows", [KEY_MAIL] = "Mail",
+ [KEY_BOOKMARKS] = "Bookmarks", [KEY_COMPUTER] = "Computer",
+ [KEY_BACK] = "Back", [KEY_FORWARD] = "Forward",
+ [KEY_CLOSECD] = "CloseCD", [KEY_EJECTCD] = "EjectCD",
+ [KEY_EJECTCLOSECD] = "EjectCloseCD", [KEY_NEXTSONG] = "NextSong",
+ [KEY_PLAYPAUSE] = "PlayPause", [KEY_PREVIOUSSONG] = "PreviousSong",
+ [KEY_STOPCD] = "StopCD", [KEY_RECORD] = "Record",
+ [KEY_REWIND] = "Rewind", [KEY_PHONE] = "Phone",
+ [KEY_ISO] = "ISOKey", [KEY_CONFIG] = "Config",
+ [KEY_HOMEPAGE] = "HomePage", [KEY_REFRESH] = "Refresh",
+ [KEY_EXIT] = "Exit", [KEY_MOVE] = "Move",
+ [KEY_EDIT] = "Edit", [KEY_SCROLLUP] = "ScrollUp",
+ [KEY_SCROLLDOWN] = "ScrollDown", [KEY_KPLEFTPAREN] = "KPLeftParenthesis",
+ [KEY_KPRIGHTPAREN] = "KPRightParenthesis", [KEY_F13] = "F13",
+ [KEY_F14] = "F14", [KEY_F15] = "F15",
+ [KEY_F16] = "F16", [KEY_F17] = "F17",
+ [KEY_F18] = "F18", [KEY_F19] = "F19",
+ [KEY_F20] = "F20", [KEY_F21] = "F21",
+ [KEY_F22] = "F22", [KEY_F23] = "F23",
+ [KEY_F24] = "F24", [KEY_PLAYCD] = "PlayCD",
+ [KEY_PAUSECD] = "PauseCD", [KEY_PROG3] = "Prog3",
+ [KEY_PROG4] = "Prog4", [KEY_SUSPEND] = "Suspend",
+ [KEY_CLOSE] = "Close", [KEY_PLAY] = "Play",
+ [KEY_FASTFORWARD] = "Fast Forward", [KEY_BASSBOOST] = "Bass Boost",
+ [KEY_PRINT] = "Print", [KEY_HP] = "HP",
+ [KEY_CAMERA] = "Camera", [KEY_SOUND] = "Sound",
+ [KEY_QUESTION] = "Question", [KEY_EMAIL] = "Email",
+ [KEY_CHAT] = "Chat", [KEY_SEARCH] = "Search",
+ [KEY_CONNECT] = "Connect", [KEY_FINANCE] = "Finance",
+ [KEY_SPORT] = "Sport", [KEY_SHOP] = "Shop",
+ [KEY_ALTERASE] = "Alternate Erase", [KEY_CANCEL] = "Cancel",
+ [KEY_BRIGHTNESSDOWN] = "Brightness down", [KEY_BRIGHTNESSUP] = "Brightness up",
+ [KEY_MEDIA] = "Media", [KEY_UNKNOWN] = "Unknown",
+ [BTN_0] = "Btn0", [BTN_1] = "Btn1",
+ [BTN_2] = "Btn2", [BTN_3] = "Btn3",
+ [BTN_4] = "Btn4", [BTN_5] = "Btn5",
+ [BTN_6] = "Btn6", [BTN_7] = "Btn7",
+ [BTN_8] = "Btn8", [BTN_9] = "Btn9",
+ [BTN_LEFT] = "LeftBtn", [BTN_RIGHT] = "RightBtn",
+ [BTN_MIDDLE] = "MiddleBtn", [BTN_SIDE] = "SideBtn",
+ [BTN_EXTRA] = "ExtraBtn", [BTN_FORWARD] = "ForwardBtn",
+ [BTN_BACK] = "BackBtn", [BTN_TASK] = "TaskBtn",
+ [BTN_TRIGGER] = "Trigger", [BTN_THUMB] = "ThumbBtn",
+ [BTN_THUMB2] = "ThumbBtn2", [BTN_TOP] = "TopBtn",
+ [BTN_TOP2] = "TopBtn2", [BTN_PINKIE] = "PinkieBtn",
+ [BTN_BASE] = "BaseBtn", [BTN_BASE2] = "BaseBtn2",
+ [BTN_BASE3] = "BaseBtn3", [BTN_BASE4] = "BaseBtn4",
+ [BTN_BASE5] = "BaseBtn5", [BTN_BASE6] = "BaseBtn6",
+ [BTN_DEAD] = "BtnDead", [BTN_A] = "BtnA",
+ [BTN_B] = "BtnB", [BTN_C] = "BtnC",
+ [BTN_X] = "BtnX", [BTN_Y] = "BtnY",
+ [BTN_Z] = "BtnZ", [BTN_TL] = "BtnTL",
+ [BTN_TR] = "BtnTR", [BTN_TL2] = "BtnTL2",
+ [BTN_TR2] = "BtnTR2", [BTN_SELECT] = "BtnSelect",
+ [BTN_START] = "BtnStart", [BTN_MODE] = "BtnMode",
+ [BTN_THUMBL] = "BtnThumbL", [BTN_THUMBR] = "BtnThumbR",
+ [BTN_TOOL_PEN] = "ToolPen", [BTN_TOOL_RUBBER] = "ToolRubber",
+ [BTN_TOOL_BRUSH] = "ToolBrush", [BTN_TOOL_PENCIL] = "ToolPencil",
+ [BTN_TOOL_AIRBRUSH] = "ToolAirbrush", [BTN_TOOL_FINGER] = "ToolFinger",
+ [BTN_TOOL_MOUSE] = "ToolMouse", [BTN_TOOL_LENS] = "ToolLens",
+ [BTN_TOUCH] = "Touch", [BTN_STYLUS] = "Stylus",
+ [BTN_STYLUS2] = "Stylus2", [BTN_TOOL_DOUBLETAP] = "Tool Doubletap",
+ [BTN_TOOL_TRIPLETAP] = "Tool Tripletap", [BTN_GEAR_DOWN] = "WheelBtn",
+ [BTN_GEAR_UP] = "Gear up", [KEY_OK] = "Ok",
+ [KEY_SELECT] = "Select", [KEY_GOTO] = "Goto",
+ [KEY_CLEAR] = "Clear", [KEY_POWER2] = "Power2",
+ [KEY_OPTION] = "Option", [KEY_INFO] = "Info",
+ [KEY_TIME] = "Time", [KEY_VENDOR] = "Vendor",
+ [KEY_ARCHIVE] = "Archive", [KEY_PROGRAM] = "Program",
+ [KEY_CHANNEL] = "Channel", [KEY_FAVORITES] = "Favorites",
+ [KEY_EPG] = "EPG", [KEY_PVR] = "PVR",
+ [KEY_MHP] = "MHP", [KEY_LANGUAGE] = "Language",
+ [KEY_TITLE] = "Title", [KEY_SUBTITLE] = "Subtitle",
+ [KEY_ANGLE] = "Angle", [KEY_ZOOM] = "Zoom",
+ [KEY_MODE] = "Mode", [KEY_KEYBOARD] = "Keyboard",
+ [KEY_SCREEN] = "Screen", [KEY_PC] = "PC",
+ [KEY_TV] = "TV", [KEY_TV2] = "TV2",
+ [KEY_VCR] = "VCR", [KEY_VCR2] = "VCR2",
+ [KEY_SAT] = "Sat", [KEY_SAT2] = "Sat2",
+ [KEY_CD] = "CD", [KEY_TAPE] = "Tape",
+ [KEY_RADIO] = "Radio", [KEY_TUNER] = "Tuner",
+ [KEY_PLAYER] = "Player", [KEY_TEXT] = "Text",
+ [KEY_DVD] = "DVD", [KEY_AUX] = "Aux",
+ [KEY_MP3] = "MP3", [KEY_AUDIO] = "Audio",
+ [KEY_VIDEO] = "Video", [KEY_DIRECTORY] = "Directory",
+ [KEY_LIST] = "List", [KEY_MEMO] = "Memo",
+ [KEY_CALENDAR] = "Calendar", [KEY_RED] = "Red",
+ [KEY_GREEN] = "Green", [KEY_YELLOW] = "Yellow",
+ [KEY_BLUE] = "Blue", [KEY_CHANNELUP] = "ChannelUp",
+ [KEY_CHANNELDOWN] = "ChannelDown", [KEY_FIRST] = "First",
+ [KEY_LAST] = "Last", [KEY_AB] = "AB",
+ [KEY_NEXT] = "Next", [KEY_RESTART] = "Restart",
+ [KEY_SLOW] = "Slow", [KEY_SHUFFLE] = "Shuffle",
+ [KEY_BREAK] = "Break", [KEY_PREVIOUS] = "Previous",
+ [KEY_DIGITS] = "Digits", [KEY_TEEN] = "TEEN",
+ [KEY_TWEN] = "TWEN", [KEY_DEL_EOL] = "Delete EOL",
+ [KEY_DEL_EOS] = "Delete EOS", [KEY_INS_LINE] = "Insert line",
+ [KEY_DEL_LINE] = "Delete line",
+};
+
+char *absval[5] = { "Value", "Min ", "Max ", "Fuzz ", "Flat " };
+
+char *relatives[REL_MAX + 1] = {
+ [0 ... REL_MAX] = NULL,
+ [REL_X] = "X", [REL_Y] = "Y",
+ [REL_Z] = "Z", [REL_HWHEEL] = "HWheel",
+ [REL_DIAL] = "Dial", [REL_WHEEL] = "Wheel",
+ [REL_MISC] = "Misc",
+};
+
+char *absolutes[ABS_MAX + 1] = {
+ [0 ... ABS_MAX] = NULL,
+ [ABS_X] = "X", [ABS_Y] = "Y",
+ [ABS_Z] = "Z", [ABS_RX] = "Rx",
+ [ABS_RY] = "Ry", [ABS_RZ] = "Rz",
+ [ABS_THROTTLE] = "Throttle", [ABS_RUDDER] = "Rudder",
+ [ABS_WHEEL] = "Wheel", [ABS_GAS] = "Gas",
+ [ABS_BRAKE] = "Brake", [ABS_HAT0X] = "Hat0X",
+ [ABS_HAT0Y] = "Hat0Y", [ABS_HAT1X] = "Hat1X",
+ [ABS_HAT1Y] = "Hat1Y", [ABS_HAT2X] = "Hat2X",
+ [ABS_HAT2Y] = "Hat2Y", [ABS_HAT3X] = "Hat3X",
+ [ABS_HAT3Y] = "Hat 3Y", [ABS_PRESSURE] = "Pressure",
+ [ABS_DISTANCE] = "Distance", [ABS_TILT_X] = "XTilt",
+ [ABS_TILT_Y] = "YTilt", [ABS_TOOL_WIDTH] = "Tool Width",
+ [ABS_VOLUME] = "Volume", [ABS_MISC] = "Misc",
+};
+
+char *misc[MSC_MAX + 1] = {
+ [ 0 ... MSC_MAX] = NULL,
+ [MSC_SERIAL] = "Serial", [MSC_PULSELED] = "Pulseled",
+ [MSC_GESTURE] = "Gesture", [MSC_RAW] = "RawData",
+ [MSC_SCAN] = "ScanCode",
+};
+
+char *leds[LED_MAX + 1] = {
+ [0 ... LED_MAX] = NULL,
+ [LED_NUML] = "NumLock", [LED_CAPSL] = "CapsLock",
+ [LED_SCROLLL] = "ScrollLock", [LED_COMPOSE] = "Compose",
+ [LED_KANA] = "Kana", [LED_SLEEP] = "Sleep",
+ [LED_SUSPEND] = "Suspend", [LED_MUTE] = "Mute",
+ [LED_MISC] = "Misc",
+};
+
+char *switch_[SW_MAX + 1] = {
+ [0 ... SW_MAX] = NULL,
+ [SW_LID] = "LidShut", [SW_TABLET_MODE] = "TabletMode",
+ [SW_HEADPHONE_INSERT] = "HeadphoneInsert", [SW_RADIO] = "RadioEnabled",
+};
+
+char *repeats[REP_MAX + 1] = {
+ [0 ... REP_MAX] = NULL,
+ [REP_DELAY] = "Delay", [REP_PERIOD] = "Period"
+};
+
+char *sounds[SND_MAX + 1] = {
+ [0 ... SND_MAX] = NULL,
+ [SND_CLICK] = "Click", [SND_BELL] = "Bell",
+ [SND_TONE] = "Tone"
+};
+
+char **names[EV_MAX + 1] = {
+ [0 ... EV_MAX] = NULL,
+ [EV_SYN] = events, [EV_KEY] = keys,
+ [EV_REL] = relatives, [EV_ABS] = absolutes,
+ [EV_MSC] = misc, [EV_LED] = leds,
+ [EV_SND] = sounds, [EV_REP] = repeats,
+ [EV_SW] = switch_,
+};
+
+#define BITS_PER_LONG (sizeof(long) * 8)
+#define NBITS(x) ((((x)-1)/BITS_PER_LONG)+1)
+#define OFF(x) ((x)%BITS_PER_LONG)
+#define BIT(x) (1UL<<OFF(x))
+#define LONG(x) ((x)/BITS_PER_LONG)
+#define test_bit(bit, array) ((array[LONG(bit)] >> OFF(bit)) & 1)
+
+int main (int argc, char **argv)
+{
+ int fd, rd, i, j, k;
+ struct input_event ev[64];
+ int version;
+ unsigned short id[4];
+ unsigned long bit[EV_MAX][NBITS(KEY_MAX)];
+ char name[256] = "Unknown";
+ int abs[5];
+
+ if (argc < 2) {
+ printf("Usage: evtest /dev/input/eventX\n");
+ printf("Where X = input device number\n");
+ return 1;
+ }
+
+ if ((fd = open(argv[argc - 1], O_RDONLY)) < 0) {
+ perror("evtest");
+ return 1;
+ }
+
+ if (ioctl(fd, EVIOCGVERSION, &version)) {
+ perror("evtest: can't get version");
+ return 1;
+ }
+
+ printf("Input driver version is %d.%d.%d\n",
+ version >> 16, (version >> 8) & 0xff, version & 0xff);
+
+ ioctl(fd, EVIOCGID, id);
+ printf("Input device ID: bus 0x%x vendor 0x%x product 0x%x version 0x%x\n",
+ id[ID_BUS], id[ID_VENDOR], id[ID_PRODUCT], id[ID_VERSION]);
+
+ ioctl(fd, EVIOCGNAME(sizeof(name)), name);
+ printf("Input device name: \"%s\"\n", name);
+
+ memset(bit, 0, sizeof(bit));
+ ioctl(fd, EVIOCGBIT(0, EV_MAX), bit[0]);
+ printf("Supported events:\n");
+
+ for (i = 0; i < EV_MAX; i++)
+ if (test_bit(i, bit[0])) {
+ printf(" Event type %d (%s)\n", i, events[i] ? events[i] : "?");
+ if (!i) continue;
+ ioctl(fd, EVIOCGBIT(i, KEY_MAX), bit[i]);
+ for (j = 0; j < KEY_MAX; j++)
+ if (test_bit(j, bit[i])) {
+ printf(" Event code %d (%s)\n", j, names[i] ? (names[i][j] ? names[i][j] : "?") : "?");
+ if (i == EV_ABS) {
+ ioctl(fd, EVIOCGABS(j), abs);
+ for (k = 0; k < 5; k++)
+ if ((k < 3) || abs[k])
+ printf(" %s %6d\n", absval[k], abs[k]);
+ }
+ }
+ }
+
+
+ printf("Testing ... (interrupt to exit)\n");
+
+ while (1) {
+ rd = read(fd, ev, sizeof(struct input_event) * 64);
+
+ if (rd < (int) sizeof(struct input_event)) {
+ perror("\nevtest: error reading");
+ return 1;
+ }
+
+ for (i = 0; i < rd / sizeof(struct input_event); i++)
+
+ if (ev[i].type == EV_SYN) {
+ printf("Event: time %ld.%06ld, -------------- %s ------------\n",
+ ev[i].time.tv_sec, ev[i].time.tv_usec, ev[i].code ? "Config Sync" : "Report Sync" );
+ } else if (ev[i].type == EV_MSC && (ev[i].code == MSC_RAW || ev[i].code == MSC_SCAN)) {
+ printf("Event: time %ld.%06ld, type %d (%s), code %d (%s), value %02x\n",
+ ev[i].time.tv_sec, ev[i].time.tv_usec, ev[i].type,
+ events[ev[i].type] ? events[ev[i].type] : "?",
+ ev[i].code,
+ names[ev[i].type] ? (names[ev[i].type][ev[i].code] ? names[ev[i].type][ev[i].code] : "?") : "?",
+ ev[i].value);
+ } else {
+ printf("Event: time %ld.%06ld, type %d (%s), code %d (%s), value %d\n",
+ ev[i].time.tv_sec, ev[i].time.tv_usec, ev[i].type,
+ events[ev[i].type] ? events[ev[i].type] : "?",
+ ev[i].code,
+ names[ev[i].type] ? (names[ev[i].type][ev[i].code] ? names[ev[i].type][ev[i].code] : "?") : "?",
+ ev[i].value);
+ }
+ fflush(stdout);
+ }
+}
+
+
--- /dev/null
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <unistd.h>
+
+#define DO_SYNTH
+
+/* McBSP Register Offsets. */
+#define MCBSP_DRR_OFFSET 0x00
+#define MCBSP_DXR_OFFSET 0x08
+#define MCBSP_SPCR2_OFFSET 0x10
+#define MCBSP_SPCR1_OFFSET 0x14
+#define MCBSP_RCR2_OFFSET 0x18
+#define MCBSP_RCR1_OFFSET 0x1C
+#define MCBSP_XCR2_OFFSET 0x20
+#define MCBSP_XCR1_OFFSET 0x24
+#define MCBSP_SRGR2_OFFSET 0x28
+#define MCBSP_SRGR1_OFFSET 0x2C
+#define MCBSP_MCR2_OFFSET 0x30
+#define MCBSP_MCR1_OFFSET 0x34
+#define MCBSP_RCERA_OFFSET 0x38
+#define MCBSP_RCERB_OFFSET 0x3C
+#define MCBSP_XCERA_OFFSET 0x40
+#define MCBSP_XCERB_OFFSET 0x44
+#define MCBSP_PCR0_OFFSET 0x48
+
+#define MCBSP_REV_OFFSET 0x7C
+#define MCBSP_RINTCLR_OFFSET 0x80
+#define MCBSP_XINTCLR_OFFSET 0x84
+#define MCBSP_ROVFLCLR_OFFSET 0x88
+#define MCBSP_SYSCONFIG_OFFSET 0x8C
+#define MCBSP_THRSH2_OFFSET 0x90
+#define MCBSP_THRSH1_OFFSET 0x94
+#define MCBSP_IRQSTATUS_OFFSET 0xA0
+
+#define MCBSP_IRQSTATUS_OFFSET 0xA0
+#define MCBSP_IRQENABLE_OFFSET 0xA4
+#define MCBSP_WAKEUPEN_OFFSET 0xA8
+#define MCBSP_XCCR_OFFSET 0xAC
+#define MCBSP_RCCR_OFFSET 0xB0
+#define MCBSP_XBUFFSTAT_OFFSET 0xB4
+#define MCBSP_RBUFFSTAT_OFFSET 0xB8
+
+#define BITSPERSAMPLE 16
+
+typedef unsigned int U32;
+#define out_regl(a,d) *((volatile unsigned int *)(a)) = d
+
+
+/* Reset the McBSP. */
+static void reset_mcbsp (U32 mcbsp_base_addr, U32 enable)
+{
+ /*
+ ** Checking whether McBSP is providing the clock (Word and bit CLK)
+ ** or McBSP is master.
+ */
+ if (((*(volatile U32 *)(mcbsp_base_addr + MCBSP_PCR0_OFFSET)) & 0x0F00)
+ != 0x0F00)
+ {
+ /*
+ ** If McBSP is not master, then TX/RX/SCG are not enabled
+ ** and disabled between each call to the macbsp_write/read functions.
+ */
+ return;
+ }
+ else
+ {
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_DXR_OFFSET))= 0x0;
+ if (enable)
+ {
+ /* The serial port transmitter is enabled. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) |= 0x0001;
+
+ /* The serial port receiver is enabled. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR1_OFFSET)) |= 0x0001;
+
+ /*
+ ** Sample rate generator is pulled out of reset.
+ ** Frame counters are loaded with their programmed values.
+ */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) |= 0x00C0;
+ }
+ else
+ {
+ /*
+ ** The serial port transmitter is disabled and in reset state.
+ ** Frame-synchronization logic is reset.
+ */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET))
+ &= ~(0x00C1);
+
+ /* The serial port receiver is disabled and in reset state. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR1_OFFSET))
+ &= ~(0x0001);
+ }
+ }
+}
+
+
+/* Writes TX data register by polling method. */
+static int write_data_mcbsp(U32 mcbsp_base_addr, U32 data)
+{
+ U32 ret_status = 0;
+ U32 attempts;
+
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_DXR_OFFSET)) = data;
+
+ /* If frame sync error - clear the error. */
+ if (*((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) & 0x08)
+ {
+ printf("Frame sync error.\n");
+ /* Clear error. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) &= ~(0x08);
+ }
+
+ /* Wait for transmit confirmation. */
+ attempts = 0;
+ while ((*((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) & 0x2)
+ != 0x2)
+ {
+ if (attempts++ > 1000)
+ {
+ /* The attempt failed, so reset the Tx. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) &= ~(0x1);
+
+ /* Enable Tx. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) |= 0x1;
+
+ printf("McBSP write failed.\n");
+ return -1;
+ }
+ }
+
+ return ret_status;
+}
+
+int main(int argc, char *argv[])
+{
+ volatile unsigned int *regs;
+ unsigned int mcbsp_base_addr, sample;
+ int ret, memdev;
+#ifdef DO_SYNTH
+ int count = 0;
+#else
+ FILE *f;
+
+ f = fopen(argv[1], "rb");
+ if (f == NULL)
+ {
+ printf("no file.\n");
+ return 0;
+ }
+#endif
+
+ memdev = open("/dev/mem", O_RDWR|O_SYNC);
+ if (memdev == -1)
+ {
+ printf("no memdev\n");
+ return 1;
+ }
+
+ // 0x480022D8 ~ CONTROL_DEVCONF1
+ // 0x49024000 ~ McBSP3
+ regs = mmap(0, 0x10000, PROT_WRITE|PROT_READ, MAP_SHARED, memdev, 0x48000000);
+ if (regs == MAP_FAILED)
+ {
+ printf("mmap failed\n");
+ return 1;
+ }
+
+ mcbsp_base_addr = (unsigned int)mmap(0, 0x2000, PROT_WRITE|PROT_READ, MAP_SHARED, memdev, 0x49024000);
+ if ((int)mcbsp_base_addr == (int)MAP_FAILED)
+ {
+ printf("mmap failed\n");
+ return 1;
+ }
+
+ /* ----- clocks ----- */
+
+ /*
+ ** Configure the CLKS input to 96M functional clk from PRCM
+ ** and not MCBSP.CLKS pin.(this is for McBSP2)
+ ** CONTROL_DEVCONF0 ,set bit 6 to zero.
+ */
+ regs[0x2274>>2] &= 0xFFFFFFBF;
+
+ // CONTROL_DEVCONF1 For McBSP3 we want to use the MCBSP.CLKS pin
+ regs[0x22D8>>2] |= 1;
+
+ /* CM_CLKSEL1_PLL 96 Mhz selected. */
+ regs[0x4d40>>2] &= 0xFFFFFFF7;
+
+ /* CM_FCLKEN_PER Enable the functional clock of McBSP3. */
+ regs[0x5000>>2] |= 0x00000002;
+
+ /* CM_ICLKEN_PER Enable the Interface clock of McBSP3 */
+ regs[0x5010>>2] |= 0x00000002;
+
+ /* McBSP3 selected. */
+ regs[0x5030>>2] |= 0x00000002;
+
+ /* ----- McBSP ----- */
+
+ /* Make all registers to zero to start with. */
+ out_regl((mcbsp_base_addr + MCBSP_SPCR2_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_SPCR1_OFFSET), 0);
+// out_regl((mcbsp_base_addr + MCBSP_PCR0_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_XCR1_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_RCR1_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_XCR2_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_RCR2_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_SRGR1_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_SRGR2_OFFSET), 0);
+
+ /* Disable TX and RX DMA. */
+ out_regl((mcbsp_base_addr + MCBSP_XCCR_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_RCCR_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_THRSH2_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_THRSH1_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_IRQENABLE_OFFSET), 0);
+ out_regl((mcbsp_base_addr + MCBSP_IRQSTATUS_OFFSET), 0x7fbf); // clear IRQs
+
+ /* Set the audio configuration. */
+
+ /*
+ ** Codec is slave McBSP is master
+ ** Enable the following bits FSXM, FSRM, CLKXM, CLKRM, CLKXP, CLKRP.
+ */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_PCR0_OFFSET)) = 0x0f0C;//0x0f00; //0x0f03;
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR1_OFFSET)) |= 0x0008;
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) |= 0x0008;
+
+ /* Tx word len1= 16bits, 1 word per frame. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_XCR1_OFFSET)) |= 0x40;
+
+ /*
+ ** Dual phase frame
+ ** Tx word len2 = 16 bits, 1 word per frame.
+ ** No companding data starts with MSB first
+ ** Transmit frame-synchronization pulses after the first are ignored.
+ ** Tx Data delay - 1bit.
+ */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_XCR2_OFFSET)) |= 0x8041;
+
+ /* Rx word len1 = 16bits, 1 word per frame. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_RCR1_OFFSET)) |= 0x40;
+
+ /*
+ ** Dual phase frame
+ ** Rx word len2=16 bits ,1 word per frame.
+ ** No companding data starts with MSB first
+ ** Rx Data delay- 1bit.
+ */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_RCR2_OFFSET)) |= 0x8041;
+
+ /* Configure the sample generator. */
+
+ /*
+ ** McBSP sample rate generator register 1
+ ** Frame pulse width is 16 clk periods
+ ** Sample rate generator clock divider - 70
+ ** 44.1Khz
+ */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SRGR1_OFFSET))
+ = ((BITSPERSAMPLE - 1) << 8) | (8 - 1); // BCLK = 32fs
+
+ /* Next frame-sync signal becomes active after 32 clock periods. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SRGR2_OFFSET)) =
+// 0x2000 |
+ 0x1000 | ((BITSPERSAMPLE * 2) - 1);
+
+ /* Enable the sample rate generator. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) |= 0x00C0;
+
+ /* Enable the Tx, Rx. */
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR1_OFFSET)) |= 1;
+ *((volatile U32 *)(mcbsp_base_addr + MCBSP_SPCR2_OFFSET)) |= 1;
+
+ usleep(1000);
+
+ /* Reset the device. */
+ reset_mcbsp(mcbsp_base_addr, 1);
+
+ /* must restore ?DMAEN bits to defaults */
+ out_regl((mcbsp_base_addr + MCBSP_XCCR_OFFSET), 8);
+ out_regl((mcbsp_base_addr + MCBSP_RCCR_OFFSET), 8);
+
+ usleep(1000);
+
+ /* write */
+ sample = 0;
+ while (1)
+ {
+#ifndef DO_SYNTH
+ ret = fread(&sample, 1, 2, f);
+ if (ret != 2) break;
+#else
+ sample = (count & 0x80) ? 65536-10000 : 10000;
+ count++;
+ if (count > 200*1024) break;
+#endif
+
+ ret = write_data_mcbsp(mcbsp_base_addr, sample);
+ if (ret != 0) break;
+ }
+
+ /* Reset the device. */
+ reset_mcbsp(mcbsp_base_addr, 0);
+
+ munmap((void *)regs, 0x10000);
+ munmap((void *)mcbsp_base_addr, 0x2000);
+ close(memdev);
+#ifndef DO_SYNTH
+ fclose(f);
+#endif
+
+ return 0;
+}
+
--- /dev/null
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <unistd.h>
+
+struct {
+ char *name;
+ int offset;
+}
+noffs[] = {
+ { "MCBSPLP_DRR_REG", 0x00 },
+ { "MCBSPLP_DXR_REG", 0x08 },
+ { "MCBSPLP_SPCR2_REG", 0x10 },
+ { "MCBSPLP_SPCR1_REG", 0x14 },
+ { "MCBSPLP_RCR2_REG", 0x18 },
+ { "MCBSPLP_RCR1_REG", 0x1C },
+ { "MCBSPLP_XCR2_REG", 0x20 },
+ { "MCBSPLP_XCR1_REG", 0x24 },
+ { "MCBSPLP_SRGR2_REG", 0x28 },
+ { "MCBSPLP_SRGR1_REG", 0x2C },
+ { "MCBSPLP_MCR2_REG", 0x30 },
+ { "MCBSPLP_MCR1_REG", 0x34 },
+ { "MCBSPLP_RCERA_REG", 0x38 },
+ { "MCBSPLP_RCERB_REG", 0x3C },
+ { "MCBSPLP_XCERA_REG", 0x40 },
+ { "MCBSPLP_XCERB_REG", 0x44 },
+ { "MCBSPLP_PCR_REG", 0x48 },
+ { "MCBSPLP_RCERC_REG", 0x4C },
+ { "MCBSPLP_RCERD_REG", 0x50 },
+ { "MCBSPLP_XCERC_REG", 0x54 },
+ { "MCBSPLP_XCERD_REG", 0x58 },
+ { "MCBSPLP_RCERE_REG", 0x5C },
+ { "MCBSPLP_RCERF_REG", 0x60 },
+ { "MCBSPLP_XCERE_REG", 0x64 },
+ { "MCBSPLP_XCERF_REG", 0x68 },
+ { "MCBSPLP_RCERG_REG", 0x6C },
+ { "MCBSPLP_RCERH_REG", 0x70 },
+ { "MCBSPLP_XCERG_REG", 0x74 },
+ { "MCBSPLP_XCERH_REG", 0x78 },
+ { "MCBSPLP_RINTCLR_REG", 0x80 },
+ { "MCBSPLP_XINTCLR_REG", 0x84 },
+ { "MCBSPLP_ROVFLCLR_REG", 0x88 },
+ { "MCBSPLP_SYSCONFIG_REG", 0x8C },
+ { "MCBSPLP_THRSH2_REG", 0x90 },
+ { "MCBSPLP_THRSH1_REG", 0x94 },
+ { "MCBSPLP_IRQSTATUS_REG", 0xA0 },
+ { "MCBSPLP_IRQENABLE_REG", 0xA4 },
+ { "MCBSPLP_WAKEUPEN_REG", 0xA8 },
+ { "MCBSPLP_XCCR_REG", 0xAC },
+ { "MCBSPLP_RCCR_REG", 0xB0 },
+ { "MCBSPLP_XBUFFSTAT_REG", 0xB4 },
+ { "MCBSPLP_RBUFFSTAT_REG", 0xB8 },
+ { "MCBSPLP_SSELCR_REG", 0xBC },
+ { "MCBSPLP_STATUS_REG", 0xC0 },
+};
+
+
+void *checked_mmap(int memdev, unsigned int addr, unsigned int len)
+{
+ void *regs = mmap(0, len, PROT_WRITE|PROT_READ, MAP_SHARED, memdev, addr);
+ if (regs == MAP_FAILED)
+ {
+ char err[64];
+ sprintf(err, "mmap 0x%08x", addr);
+ perror(err);
+ exit(1);
+ }
+
+ return regs;
+}
+
+int main(int argc, char *argv[])
+{
+ volatile unsigned int *regs;
+ int memdev, i, u;
+
+ memdev = open("/dev/mem", O_RDWR|O_SYNC);
+ if (memdev == -1)
+ {
+ printf("no memdev\n");
+ return 1;
+ }
+
+ /* ----- clocks ----- */
+
+ regs = checked_mmap(memdev, 0x48000000, 0x10000);
+
+ printf("48002274 %08x CONTROL_DEVCONF0\n", regs[0x2274>>2]);
+ printf("480022D8 %08x CONTROL_DEVCONF1\n", regs[0x22D8>>2]);
+ printf("48004d40 %08x CM_CLKSEL1_PLL\n", regs[0x4d40>>2]);
+ printf("48005000 %08x CM_FCLKEN_PER\n", regs[0x5000>>2]);
+ printf("48005010 %08x CM_ICLKEN_PER\n", regs[0x5010>>2]);
+ printf("48005020 %08x CM_IDLEST_PER - idle status\n", regs[0x5020>>2]);
+ printf("48005030 %08x CM_AUTOIDLE_PER\n", regs[0x5030>>2]);
+ printf("480022A4 %08x CONTROL_MSUSPENDMUX_5x\n", regs[0x22a4>>2]);
+ printf("4800216c %08x PADCONF_MCBSP3_DX\n", regs[0x216c>>2]);
+ printf("48002170 %08x PADCONF_MCBSP3_CLKX\n", regs[0x2170>>2]);
+
+ munmap((void *)regs, 0x10000);
+
+ /* ----- PRCM ----- */
+
+ regs = checked_mmap(memdev, 0x48300000, 0x10000);
+
+ printf("483070a4 %08x PM_MPUGRPSEL_PER\n", regs[0x70a4>>2]);
+ printf("483070a8 %08x PM_IVA2GRPSEL_PER\n", regs[0x70a8>>2]);
+ printf("483070b0 %08x PM_WKST_PER\n", regs[0x70b0>>2]);
+
+ munmap((void *)regs, 0x10000);
+
+ /* ----- SSELCR ----- */
+
+ regs = checked_mmap(memdev, 0x49020000, 0x10000);
+
+ printf("4902a02c %08x ST_SSELCR_REG\n", regs[0xa02c>>2]);
+
+ munmap((void *)regs, 0x10000);
+
+ /* ----- IRQs ----- */
+
+ regs = checked_mmap(memdev, 0x48200000, 0x10000);
+
+ // 22 ~ MCBSP3_IRQ, 89 ~ MCBSP3_IRQ_TX, 90 ~ MCBSP3_IRQ_RX
+ printf("IRQs: %i, TX %i, RX %i\n", !(regs[0x0084>>2] & (1<<22)),
+ !(regs[0x008c>>2] & (1<<(89-64))), !(regs[0x008c>>2] & (1<<(90-64))));
+
+ munmap((void *)regs, 0x10000);
+
+ /* ----- McBSP ----- */
+
+ regs = checked_mmap(memdev, 0x49024000, 0x2000);
+
+ printf("\n");
+ for (i = 0; i < 0xC4; i+= 4)
+ {
+ printf("%02x %8x ", i, regs[i>>2]);
+ for (u = 0; u < sizeof(noffs) / sizeof(noffs[0]); u++)
+ {
+ if (i == noffs[u].offset) {
+ printf("%s", noffs[u].name);
+ break;
+ }
+ }
+ printf("\n");
+ }
+
+ munmap((void *)regs, 0x2000);
+ close(memdev);
+
+ return 0;
+}
+
--- /dev/null
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <malloc.h>
+#include <sys/time.h>
+
+extern void *memcpy_neon(void *dst, const void *src, size_t size);
+
+#define BUFSIZE (8*1024*1024)
+#define ITER 128
+
+static unsigned
+tv_diff(struct timeval *tv1, struct timeval *tv2)
+{
+ return (tv2->tv_sec - tv1->tv_sec) * 1000000 +
+ (tv2->tv_usec - tv1->tv_usec);
+}
+
+static void do_test(const char *name, void *p1, void *p2, size_t size,
+ void *(*cpy)(void *, const void *, size_t))
+{
+ struct timeval t1, t2;
+ int i;
+
+ gettimeofday(&t1, NULL);
+ for (i = 0; i < ITER; i++)
+ cpy(p1, p2, size);
+ gettimeofday(&t2, NULL);
+
+ printf("%-8s %llu B/s\n", name,
+ (uint64_t)size * ITER * 1000000 / tv_diff(&t1, &t2));
+}
+
+static void *int32_cpy(void *dst, const void *src, size_t size)
+{
+ const uint32_t *s = src;
+ uint32_t *d = dst;
+ int i;
+
+ size /= 4;
+
+ for (i = 0; i < size; i++)
+ d[i] = s[i];
+
+ return dst;
+}
+
+static void *vec_cpy(void *dst, const void *src, size_t size)
+{
+ typedef int v4si __attribute__ ((vector_size(16)));
+ const v4si *s = src;
+ v4si *d = dst;
+
+ size /= 16;
+
+ while (size--)
+ *d++ = *s++;
+
+ return dst;
+}
+
+int main(int argc, char **argv)
+{
+ void *buf1, *buf2;
+
+ buf1 = memalign(64, BUFSIZE);
+ buf2 = memalign(64, BUFSIZE);
+
+ memset(buf2, 0, BUFSIZE);
+
+ do_test("memcpy", buf1, buf2, BUFSIZE, memcpy);
+ do_test("INT32", buf1, buf2, BUFSIZE, int32_cpy);
+ do_test("C SIMD", buf1, buf2, BUFSIZE, vec_cpy);
+ do_test("ASM SIMD", buf1, buf2, BUFSIZE, memcpy_neon);
+
+ free(buf1);
+ free(buf2);
+
+ return 0;
+}
--- /dev/null
+ifdef CROSS_COMPILE
+BASE ?= $(HOME)/dev/pnd/kernel/pandora-kernel-tip
+else
+RELEASE = $(shell uname -r)
+BASE = /lib/modules/$(RELEASE)/build
+endif
+
+obj-m += cmatest.o
+cmatest-objs += cma_test.o
+
+
+all:
+ make -C $(BASE) M=$(PWD) modules
+
+clean:
+ make -C $(BASE) M=$(PWD) clean
+ $(RM) modules.order
+
--- /dev/null
+#include <linux/kernel.h>\r
+#include <linux/module.h>\r
+#include <linux/platform_device.h>\r
+#include <linux/dma-mapping.h>\r
+\r
+static dma_addr_t dma_addr_4m;\r
+static void *dma_virt_4m;\r
+static dma_addr_t dma_addr_16m;\r
+static void *dma_virt_16m;\r
+\r
+static int __devinit c64_tools_probe(struct platform_device *pdev)\r
+{\r
+ dev_info(&pdev->dev, "in probe..\n");\r
+\r
+ dev_info(&pdev->dev, "allocating our 4M..\n");\r
+\r
+ dma_virt_4m = dma_alloc_coherent(&pdev->dev, 4 * SZ_1M,\r
+ &dma_addr_4m, GFP_KERNEL);\r
+ if (dma_virt_4m == NULL) {\r
+ dev_err(&pdev->dev, "no 4M buffer!\n");\r
+ return -ENOMEM;\r
+ }\r
+ dev_info(&pdev->dev, "4M buffer ptr %p, phys %08x\n",\r
+ dma_virt_4m, dma_addr_4m);\r
+\r
+ if (dma_addr_4m == 0x86000000)\r
+ dev_info(&pdev->dev, "phys location correct, yay!\n");\r
+ else {\r
+ dev_err(&pdev->dev, "phys location bad, boo!\n");\r
+ goto err;\r
+ }\r
+\r
+ dev_info(&pdev->dev, "testing 4m buf..\n");\r
+ memset(dma_virt_4m, 1, 4 * SZ_1M);\r
+ dev_info(&pdev->dev, "works, yay!\n");\r
+\r
+\r
+ dma_virt_16m = dma_alloc_coherent(NULL, 16 * SZ_1M,\r
+ &dma_addr_16m, GFP_KERNEL);\r
+ if (dma_virt_16m == NULL) {\r
+ dev_err(&pdev->dev, "no 16M buffer!\n");\r
+ goto err;\r
+ }\r
+ dev_info(&pdev->dev, "16M buffer ptr %p, phys %08x\n",\r
+ dma_virt_16m, dma_addr_16m);\r
+\r
+ dev_info(&pdev->dev, "testing 16m buf..\n");\r
+ memset(dma_virt_16m, 1, 16 * SZ_1M);\r
+ dev_info(&pdev->dev, "works, yay!\n");\r
+\r
+ return 0;\r
+\r
+err:\r
+ dma_free_coherent(&pdev->dev, 4 * SZ_1M, dma_virt_4m, dma_addr_4m);\r
+ return -ENOMEM;\r
+}\r
+\r
+static int __devexit c64_tools_remove(struct platform_device *pdev)\r
+{\r
+ dev_info(&pdev->dev, "freeing 4m buf..\n");\r
+ dma_free_coherent(&pdev->dev, 4 * SZ_1M, dma_virt_4m, dma_addr_4m);\r
+\r
+ dev_info(&pdev->dev, "freeing 16m buf..\n");\r
+ dma_free_coherent(NULL, 16 * SZ_1M, dma_virt_16m, dma_addr_16m);\r
+\r
+ return 0;\r
+}\r
+\r
+static struct platform_driver c64_tools_driver = {\r
+ .probe = c64_tools_probe,\r
+ .remove = c64_tools_remove,\r
+ .driver = {\r
+ .name = "c64_tools",\r
+ .owner = THIS_MODULE,\r
+ },\r
+};\r
+\r
+static int init_my_module(void)\r
+{\r
+ printk(KERN_INFO "random test module loaded\n");\r
+\r
+ return platform_driver_register(&c64_tools_driver);\r
+}\r
+\r
+\r
+static void cleanup_my_module(void)\r
+{\r
+ platform_driver_unregister(&c64_tools_driver);\r
+\r
+ printk("random test module unloaded\n");\r
+}\r
+\r
+module_init(init_my_module);\r
+module_exit(cleanup_my_module);\r
+\r
+MODULE_AUTHOR("notaz");\r
+MODULE_LICENSE("GPL");\r
+MODULE_DESCRIPTION("module test");\r
--- /dev/null
+ifdef CROSS_COMPILE
+BASE ?= /home/notaz/dev/pnd/kernel/pandora-kernel
+modtest-objs += mod_test2.o
+else
+RELEASE = $(shell uname -r)
+BASE = /lib/modules/$(RELEASE)/build
+endif
+
+obj-m += modtest.o
+modtest-objs += mod_test.o
+
+
+all:
+ make -C $(BASE) M=$(PWD) modules
+
+clean:
+ make -C $(BASE) M=$(PWD) clean
+ $(RM) modules.order
+
--- /dev/null
+#include <linux/module.h>\r
+#include <linux/kernel.h>\r
+\r
+extern void enable(void);\r
+\r
+static int init_my_module(void)\r
+{\r
+ enable();\r
+ printk(KERN_INFO "enabled\n");\r
+ return -1;\r
+}\r
+\r
+\r
+static void cleanup_my_module(void)\r
+{\r
+}\r
+\r
+\r
+module_init(init_my_module);\r
+module_exit(cleanup_my_module);\r
+\r
+MODULE_AUTHOR("notaz");\r
+MODULE_LICENSE("GPL");\r
+MODULE_DESCRIPTION("module test");\r
+\r
--- /dev/null
+/*
+.data
+
+msg:
+.ascii "v: %08x\n"
+
+.text
+.align 2
+
+.global main
+main:
+ mrc p15, 0, r1, c9, c14, 0
+ ldr r0,=msg
+ bl printf
+ bl exit
+*/
+.global enable
+enable:
+ @ user access
+ mov r0, #1
+ mcr p15, 0, r0, c9, c14, 0
+
+ @ all counters
+ mrc p15, 0, r0, c9, c12, 0
+ orr r0, #1
+ mcr p15, 0, r0, c9, c12, 0
+
+ @ cycle counter
+ mov r0, #1<<31
+ mcr p15, 0, r0, c9, c12, 1
+
+ bx lr
--- /dev/null
+ifdef CROSS_COMPILE
+BASE ?= /home/notaz/dev/pnd/kernel/pandora-kernel
+modtest-objs += mod_test2.o
+else
+RELEASE = $(shell uname -r)
+BASE = /lib/modules/$(RELEASE)/build
+endif
+
+obj-m += modtest.o
+modtest-objs += mod_test.o
+
+
+all:
+ make -C $(BASE) M=$(PWD) modules
+
+clean:
+ make -C $(BASE) M=$(PWD) clean
+ $(RM) modules.order
+
--- /dev/null
+#include <linux/module.h>\r
+#include <linux/kernel.h>\r
+#include <linux/proc_fs.h>\r
+#include <linux/uaccess.h>\r
+\r
+int get_fpscr(void);\r
+void set_fpscr(int val);\r
+\r
+static int proc_read(char *page, char **start, off_t off, int count,\r
+ int *eof, void *data)\r
+{\r
+ char *p = page;\r
+ int len;\r
+\r
+ p += sprintf(p, "%08x\n", get_fpscr());\r
+\r
+ len = (p - page) - off;\r
+ if (len < 0)\r
+ len = 0;\r
+\r
+ *eof = (len <= count) ? 1 : 0;\r
+ *start = page + off;\r
+\r
+ return len;\r
+}\r
+\r
+static int proc_write(struct file *file, const char __user *buffer,\r
+ unsigned long count, void *data)\r
+{\r
+ char buff[32];\r
+ unsigned long val;\r
+ int ret;\r
+\r
+ count = strncpy_from_user(buff, buffer,\r
+ count < sizeof(buff) ? count : sizeof(buff) - 1);\r
+ buff[count] = 0;\r
+\r
+ ret = strict_strtoul(buff, 0, &val);\r
+ if (ret < 0) {\r
+ printk(KERN_ERR "error %i parsing %s\n", ret, buff);\r
+ return ret;\r
+ }\r
+\r
+ set_fpscr(val);\r
+\r
+ return count;\r
+}\r
+\r
+//#include <linux/clk.h>\r
+static int init_my_module(void)\r
+{\r
+ struct proc_dir_entry *pret;\r
+/*\r
+ struct clk *xclk = clk_get(NULL, "dss1_alwon_fck");\r
+ clk_enable(xclk);\r
+ printk("dss1_fck: %p %i\n", xclk, clk_get_rate(xclk));\r
+ clk_disable(xclk);\r
+ clk_put(xclk);\r
+ return 0;\r
+*/\r
+ printk(KERN_INFO "random test module loaded\n");\r
+\r
+ pret = create_proc_entry("test",\r
+ S_IWUSR | S_IRUGO, NULL);\r
+ if (pret == NULL) {\r
+ printk(KERN_ERR "can't create proc\n");\r
+ return -1;\r
+ }\r
+\r
+ pret->read_proc = proc_read;\r
+ pret->write_proc = proc_write;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+static void cleanup_my_module(void)\r
+{\r
+ remove_proc_entry("test", NULL);\r
+ printk("random test module unloaded\n");\r
+}\r
+\r
+\r
+module_init(init_my_module);\r
+module_exit(cleanup_my_module);\r
+\r
+MODULE_AUTHOR("notaz");\r
+MODULE_LICENSE("GPL");\r
+MODULE_DESCRIPTION("module test");\r
+\r
--- /dev/null
+@ vim:filetype=armasm
+
+.global get_fpscr
+.global set_fpscr
+
+/*
+get_fpscr:
+ fmrx r0, FPSCR
+ bx lr
+
+
+set_fpscr:
+ fmxr FPSCR, r0
+ mov r0, #0
+ fmxr FPEXC, r0
+ mov r0, #0x40000000
+ fmxr FPEXC, r0
+ bx lr
+*/
+
+get_fpscr:
+ mrc p15, 1, r0, c9, c0, 2
+ bx lr
+
+set_fpscr:
+ mcr p15, 1, r0, c9, c0, 2
+ bx lr
+
--- /dev/null
+ifdef CROSS_COMPILE
+KDIR ?= /home/notaz/dev/pnd/kernel/pandora-kernel-tip
+else
+RELEASE = $(shell uname -r)
+KDIR = /lib/modules/$(RELEASE)/build
+endif
+
+obj-m += tlbtest.o
+tlbtest-objs += main.o
+
+
+all:
+ make -C $(KDIR) M=$(PWD) modules
+
+clean:
+ make -C $(KDIR) M=$(PWD) clean
+ $(RM) modules.order
+
--- /dev/null
+#include <linux/module.h>\r
+#include <linux/kernel.h>\r
+#include <linux/proc_fs.h>\r
+#include <linux/uaccess.h>\r
+\r
+static u32 test_addr;\r
+\r
+#define CTL_TEX_REMAP (1 << 28)\r
+\r
+// struct mm_struct *mm = vma->vm_mm;\r
+// pgd_t *pgd = pgd_offset(mm, addr);\r
+\r
+// input: v = TEX[4:2] | C[1] | B[0]\r
+// S is shareable bit from TLB, can be remapped\r
+// on Cortex-A8 it just disables cache (what about buffer?)\r
+static char *parse_tex_cb(char *p, u32 v, int s)\r
+{\r
+ static const char *cache_attrs4[4] = { "non-cacheable", "WB-WA", "WT-noWA", "WB-noWA" };\r
+ u32 prrr, nmrr = 0;\r
+ u32 control = 0;\r
+ int type;\r
+\r
+ asm ("mrc p15, 0, %0, c1, c0, 0" : "=r"(control));\r
+ // remap registers\r
+ asm ("mrc p15, 0, %0, c10, c2, 0" : "=r"(prrr)); // primary region RR\r
+ asm ("mrc p15, 0, %0, c10, c2, 1" : "=r"(nmrr)); // normal memory RR\r
+\r
+ if (control & CTL_TEX_REMAP) {\r
+ // S (shareable) bit remapping\r
+ char s_normal[2] = { (prrr >> 18) & 1, (prrr >> 19) & 1 };\r
+ char s_device[2] = { (prrr >> 16) & 1, (prrr >> 17) & 1 };\r
+\r
+ v &= 7;\r
+ type = (prrr >> v * 2) & 3;\r
+ switch (type) {\r
+ case 0:\r
+ p += sprintf(p, "strongly-ordered ");\r
+ break;\r
+ case 1:\r
+ p += sprintf(p, "device ");\r
+ s = s_device[s];\r
+ break;\r
+ case 3:\r
+ p += sprintf(p, "reserved/normal ");\r
+ case 2:\r
+ s = s_normal[s];\r
+ p += sprintf(p, "inner-%s-outer-%s ",\r
+ cache_attrs4[(nmrr >> v * 2) & 3],\r
+ cache_attrs4[(nmrr >> (v * 2 + 16)) & 3]);\r
+ }\r
+ }\r
+ else if (v & 0x10) { // TEX[2] set\r
+ p += sprintf(p, "inner-%s-outer-%s ",\r
+ cache_attrs4[v & 3], cache_attrs4[(v >> 2) & 3]);\r
+ }\r
+ else {\r
+ switch (v) {\r
+ case 0x00: p += sprintf(p, "strongly-ordered "); s = 1; break;\r
+ case 0x01: p += sprintf(p, "shareable-device "); s = 1; break;\r
+ case 0x02: p += sprintf(p, "inner-outer-WT-noWA "); break;\r
+ case 0x03: p += sprintf(p, "inner-outer-WB-noWA "); break;\r
+ case 0x04: p += sprintf(p, "inner-outer-non-cacheable "); break;\r
+ case 0x06: p += sprintf(p, "implementation-defined "); break;\r
+ case 0x07: p += sprintf(p, "inner-outer-WB-WA "); break;\r
+ case 0x08: p += sprintf(p, "non-shareable-device "); s = 0; break;\r
+ default: p += sprintf(p, "reserved "); break;\r
+ }\r
+ }\r
+\r
+ if (s)\r
+ p += sprintf(p, "shareable");\r
+\r
+ return p + sprintf(p, "\n");\r
+}\r
+\r
+static int proc_read(char *page, char **start, off_t off, int count,\r
+ int *eof, void *data)\r
+{\r
+ int verbose = test_addr & 1;\r
+ u32 ttb0 = 0, ttb1 = 0, ttbc = 0;\r
+ u32 desc1, desc2;\r
+ u32 *pgtable, *cpt;\r
+ u32 tex_cb = 0;\r
+ u32 phys;\r
+ char *p = page;\r
+ int len;\r
+\r
+ asm ("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb0)); // TLB base\r
+ asm ("mrc p15, 0, %0, c2, c0, 1" : "=r"(ttb1));\r
+ asm ("mrc p15, 0, %0, c2, c0, 2" : "=r"(ttbc)); // TLB control\r
+\r
+ p += sprintf(p, "%08x: ", test_addr);\r
+ if (verbose) {\r
+ p += sprintf(p, "\n");\r
+ p += sprintf(p, "TLB: %08x %08x %08x\n", ttb0, ttb1, ttbc);\r
+ }\r
+\r
+ pgtable = __va(ttb0 & 0xffffc000);\r
+ desc1 = pgtable[test_addr >> 20];\r
+\r
+ if (verbose)\r
+ p += sprintf(p, "l1: %08x ", desc1);\r
+ switch (desc1 & 3) {\r
+ case 0:\r
+ p += sprintf(p, "l1_fault\n");\r
+ goto out;\r
+ case 1:\r
+ if (verbose)\r
+ p += sprintf(p, "page\n");\r
+ break;\r
+ case 2:\r
+ if (verbose)\r
+ p += sprintf(p, "%ssection\n", desc1 & (1<<18) ? "super" : "");\r
+ if (desc1 & (1<<18))\r
+ phys = (desc1 & 0xff000000) | (test_addr & 0x00ffffff);\r
+ else\r
+ phys = (desc1 & 0xfff00000) | (test_addr & 0x000fffff);\r
+ p += sprintf(p, "%08x ", phys);\r
+ tex_cb = ((desc1 >> 2) & 0x03) | ((desc1 >> 10) & 0x1c);\r
+ p = parse_tex_cb(p, tex_cb, (desc1 >> 16) & 1);\r
+ goto out;\r
+ case 3:\r
+ p += sprintf(p, "reserved\n");\r
+ goto out;\r
+ }\r
+\r
+ cpt = __va(desc1 & 0xfffffc00);\r
+ desc2 = cpt[(test_addr >> 12) & 0xff];\r
+\r
+ // level2\r
+ if (verbose)\r
+ p += sprintf(p, "l2: %08x ", desc2);\r
+ switch (desc2 & 3) {\r
+ case 0:\r
+ p += sprintf(p, "l2_fault\n");\r
+ break;\r
+ case 1:\r
+ if (verbose)\r
+ p += sprintf(p, "large_page\n");\r
+ phys = (desc2 & 0xffff0000) | (test_addr & 0x0000ffff);\r
+ p += sprintf(p, "%08x ", phys);\r
+ tex_cb = ((desc2 >> 2) & 0x03) | ((desc2 >> 10) & 0x1c);\r
+ p = parse_tex_cb(p, tex_cb, (desc2 >> 10) & 1);\r
+ break;\r
+ case 2:\r
+ case 3:\r
+ if (verbose)\r
+ p += sprintf(p, "small_page\n");\r
+ phys = (desc2 & 0xfffff000) | (test_addr & 0x00000fff);\r
+ p += sprintf(p, "%08x ", phys);\r
+ tex_cb = ((desc2 >> 2) & 0x03) | ((desc2 >> 4) & 0x1c);\r
+ p = parse_tex_cb(p, tex_cb, (desc2 >> 10) & 1);\r
+ break;\r
+ }\r
+\r
+out:\r
+ len = (p - page) - off;\r
+ if (len < 0)\r
+ len = 0;\r
+\r
+ *eof = (len <= count) ? 1 : 0;\r
+ *start = page + off;\r
+\r
+ return len;\r
+}\r
+\r
+static int proc_write(struct file *file, const char __user *buffer,\r
+ unsigned long count, void *data)\r
+{\r
+ char buff[32];\r
+ unsigned long val;\r
+ int ret;\r
+\r
+ count = strncpy_from_user(buff, buffer,\r
+ count < sizeof(buff) ? count : sizeof(buff) - 1);\r
+ buff[count] = 0;\r
+\r
+ ret = strict_strtoul(buff, 0, &val);\r
+ if (ret < 0) {\r
+ printk(KERN_ERR "error %i parsing %s\n", ret, buff);\r
+ return ret;\r
+ }\r
+\r
+ test_addr = val;\r
+\r
+ return count;\r
+}\r
+\r
+static int init_my_module(void)\r
+{\r
+ struct proc_dir_entry *pret;\r
+ u32 control = 0, l2_aux = 0;\r
+ u32 prrr = 0, nmrr = 0;\r
+\r
+ printk(KERN_INFO "tlbtest loaded.\n");\r
+\r
+ asm ("mrc p15, 0, %0, c1, c0, 0" : "=r"(control));\r
+ asm ("mrc p15, 1, %0, c9, c0, 2" : "=r"(l2_aux));\r
+ asm ("mrc p15, 0, %0, c10, c2, 0" : "=r"(prrr)); // primary region RR\r
+ asm ("mrc p15, 0, %0, c10, c2, 1" : "=r"(nmrr)); // normal memory RR\r
+ printk(KERN_INFO "TEX remap is %s.\n",\r
+ (control & CTL_TEX_REMAP) ? "enabled" : "disabled");\r
+ printk(KERN_INFO "L2 cache uses %s attributes.\n",\r
+ (l2_aux & (1 << 16)) ? "inner" : "outer");\r
+ // 000a81a8, 40e040e0\r
+ printk(KERN_INFO "PRRR: %08x, NMRR: %08x\n", prrr, nmrr);\r
+\r
+ pret = create_proc_entry("tlbtest",\r
+ S_IWUSR | S_IRUGO, NULL);\r
+ if (pret == NULL) {\r
+ printk(KERN_ERR "can't create proc\n");\r
+ return -1;\r
+ }\r
+\r
+ pret->read_proc = proc_read;\r
+ pret->write_proc = proc_write;\r
+\r
+ return 0;\r
+}\r
+\r
+\r
+static void cleanup_my_module(void)\r
+{\r
+ remove_proc_entry("tlbtest", NULL);\r
+ printk("tlbtest unloaded.\n");\r
+}\r
+\r
+\r
+module_init(init_my_module);\r
+module_exit(cleanup_my_module);\r
+\r
+MODULE_AUTHOR("notaz");\r
+MODULE_LICENSE("GPL");\r
+MODULE_DESCRIPTION("TLB test");\r
+\r
--- /dev/null
+ .fpu neon
+ .text
+
+ .global memcpy_neon
+ .func memcpy_neon
+memcpy_neon:
+ push {r4-r11}
+ mov r3, r0
+1: pld [r1, #192]
+ pld [r1, #256]
+ vld1.64 {d0-d3}, [r1,:128]!
+ vld1.64 {d4-d7}, [r1,:128]!
+ vld1.64 {d16-d19}, [r1,:128]!
+ ldm r1!, {r4-r11}
+ subs r2, r2, #128
+ vst1.64 {d0-d3}, [r3,:128]!
+ vst1.64 {d4-d7}, [r3,:128]!
+ vst1.64 {d16-d19}, [r3,:128]!
+ stm r3!, {r4-r11}
+ bgt 1b
+ pop {r4-r11}
+ bx lr
+ .endfunc
--- /dev/null
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <sys/ioctl.h>
+#include <linux/soundcard.h>
+
+#define SYNTH
+
+int main(int argc, char *argv[])
+{
+ short buff[1024];
+ int i, l, oss_dev, rate = 44100;
+ int sv = 0, ss = 1;
+
+#ifndef SYNTH
+ FILE *f;
+ f = fopen(argv[1], "rb");
+ if (f == NULL)
+ {
+ perror("fopen");
+ return 1;
+ }
+#endif
+ oss_dev = open("/dev/dsp", O_WRONLY);
+ if (oss_dev == -1)
+ {
+ perror("open /dev/dsp");
+ return 1;
+ }
+
+ if (argc > 2)
+ {
+ int stereo = 1, bits = 16, frags = (11<<16) | 8;
+ rate = atoi(argv[2]);
+ ioctl(oss_dev, SNDCTL_DSP_STEREO, &stereo);
+ ioctl(oss_dev, SNDCTL_DSP_SETFMT, &bits);
+ ioctl(oss_dev, SNDCTL_DSP_SPEED, &rate);
+ ioctl(oss_dev, SNDCTL_DSP_SETFRAGMENT, &frags);
+ }
+
+ for (l = 0; l < 200; l++)
+ {
+#ifndef SYNTH
+ i = fread(buff, 1, sizeof(buff), f);
+ if (i <= 0)
+ {
+ break;
+ }
+#else
+ for (i = 0; i < sizeof(buff)/sizeof(buff[0]); i++) {
+ sv += ss * 16000;
+ if (sv == 64000 || sv == -64000)
+ ss *= -1;
+ buff[i] = sv;
+ }
+ i *= 2;
+#endif
+
+ write(oss_dev, buff, i);
+ }
+
+ close(oss_dev);
+#ifndef SYNTH
+ fclose(f);
+#endif
+ return 0;
+}
+
--- /dev/null
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <unistd.h>
+
+int main(int argc, char *argv[])
+{
+ volatile unsigned int *regs;
+ unsigned int nreg, val;
+ int memdev;
+ char *p;
+
+ if (argc < 2)
+ {
+ printf("%s <reg> [val]\n", argv[0]);
+ return 1;
+ }
+
+ nreg = strtoul(argv[1], &p, 0);
+ if (*p != 0)
+ {
+ printf("bad arg 1\n");
+ return 1;
+ }
+
+ memdev = open("/dev/mem", O_RDWR|O_SYNC);
+ if (memdev == -1)
+ {
+ perror("open /dev/mem");
+ return 1;
+ }
+
+ regs = mmap(0, 0x1000, PROT_WRITE|PROT_READ, MAP_SHARED, memdev, nreg & ~0xfff);
+ if (regs == MAP_FAILED)
+ {
+ close(memdev);
+ perror("mmap");
+ return 1;
+ }
+
+ printf(" = 0x%08x\n", regs[(nreg&0xfff)>>2]);
+
+ if (argc == 3)
+ {
+ val = strtoul(argv[2], &p, 0);
+ if (*p != 0)
+ {
+ printf("bad arg 2\n");
+ return 1;
+ }
+
+ regs[(nreg&0xfff)>>2] = val;
+ printf("val set.\n");
+ }
+
+ munmap((void *)regs, 0x1000);
+ close(memdev);
+
+ return 0;
+}
+
--- /dev/null
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/time.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <sys/ioctl.h>
+#include <unistd.h>
+#include <errno.h>
+#include <linux/fb.h>
+#include <time.h>
+
+
+int devopen(const char *path)
+{
+ int dev;
+
+ dev = open(path, O_RDWR|O_SYNC);
+ if (dev == -1)
+ {
+ printf("open(\"%s\") failed with %i\n", path, errno);
+ exit(1);
+ }
+
+ return dev;
+}
+
+
+volatile void *xmmap(int dev, int addr, int size)
+{
+ volatile void *ret;
+ ret = mmap(0, size, PROT_READ|PROT_WRITE, MAP_SHARED, dev, addr);
+ //printf("memregs are @ %p\n", memregs);
+ if (ret == MAP_FAILED)
+ {
+ perror("mmap(memregs) failed");
+ exit(1);
+ }
+ return ret;
+}
+
+static unsigned int get_us(void)
+{
+ struct timeval tv;
+
+ gettimeofday(&tv, NULL);
+ return tv.tv_sec * 1000000 + tv.tv_usec;
+}
+
+#define LOG_BUF 16
+
+int main(int argc, char *argv[])
+{
+ volatile unsigned int *memregs;
+ unsigned int val1 = 0, us, prev_us;
+ int reads = 0;
+ int memdev;
+ struct {
+ unsigned int val_old, val, time, rcount;
+ } log[LOG_BUF];
+ int i, lp = 0;
+
+
+ if (argv[1] == NULL) {
+ fprintf(stderr, "usage:\n%s <gpio_bank_base>\n", argv[0]);
+ return 1;
+ }
+
+ memdev = devopen("/dev/mem");
+
+ memregs = xmmap(memdev, strtoul(argv[1], NULL, 0), 0x1000);
+
+ //memregs[0x5403c] = 0;
+ //memregs[0x54090] = 0xffffffff;
+
+ printf("SYSCONFIG: %08x\n", memregs[0x010>>2]);
+ printf("OE: %08x\n", memregs[0x034>>2]);
+// printf("LEVELDET0: %08x\n", memregs[0x040>>2]);
+// printf("LEVELDET1: %08x\n", memregs[0x044>>2]);
+ printf("DEBOUNCEN: %08x\n", memregs[0x050>>2]);
+
+// memregs[0x54040>>2] = 0xff00;
+// memregs[0x54044>>2] = 0xff00;
+ //memregs[0x54010>>2] = 0x0c; // no idle, wakeup enable
+ //while (val == memregs[0x54038>>2]);
+
+ prev_us = get_us();
+
+ while (1)
+ {
+ unsigned int v1 = memregs[0x038>>2];
+ reads++;
+
+ if (v1 != val1) {
+ us = get_us();
+ log[lp].val_old = val1;
+ log[lp].val = v1;
+ log[lp].time = us - prev_us;
+ log[lp].rcount = reads;
+ val1 = v1;
+ reads = 0;
+ prev_us = us;
+
+ lp++;
+ if (lp == LOG_BUF) {
+ for (i = 0; i < LOG_BUF; i++)
+ printf("%08x -> %08x [%7u %d]\n",
+ log[i].val_old, log[i].val,
+ log[i].time, log[i].rcount);
+ lp = 0;
+ if (LOG_BUF > 1)
+ printf("-\n");
+ }
+ }
+ //usleep(1);
+ }
+
+ return 0;
+}
+
--- /dev/null
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <sys/ioctl.h>
+#include <unistd.h>
+#include <errno.h>
+#include <linux/fb.h>
+#include <time.h>
+
+
+int devopen(const char *path)
+{
+ int dev;
+
+ dev = open(path, O_RDWR|O_SYNC);
+ if (dev == -1)
+ {
+ fprintf(stderr, "open(\"%s\") failed: %s\n", path, strerror(errno));
+ exit(1);
+ }
+
+ return dev;
+}
+
+volatile void *xmmap(int dev, int addr, int size)
+{
+ volatile void *ret;
+ ret = mmap(0, size, PROT_READ|PROT_WRITE, MAP_SHARED, dev, addr);
+ //printf("memregs are @ %p\n", memregs);
+ if (ret == MAP_FAILED)
+ {
+ perror("mmap(memregs) failed");
+ exit(1);
+ }
+ return ret;
+}
+
+int main(int argc, char *argv[])
+{
+ volatile unsigned int *memregs;
+ int memdev, sd, retval;
+
+ if (argc != 2) {
+ fprintf(stderr, "usage: %s <1|2>\n", argv[0]);
+ return 1;
+ }
+
+ sd = atoi(argv[1]);
+ if (sd != 1 && sd != 2) {
+ fprintf(stderr, "error: please specify 1 or 2 (for SD1 and SD2)\n");
+ return 1;
+ }
+
+ memdev = devopen("/dev/mem");
+ memregs = xmmap(memdev, 0x49054000, 0x1000);
+
+ retval = 0;
+ if (memregs[0x0038>>2] & (1 << (30+sd-1))) {
+ fprintf(stderr, "card on SD%d write protected, or pin broken\n", sd);
+ retval = 1;
+ }
+
+ munmap((void *)memregs, 0x1000);
+ close(memdev);
+
+ return retval;
+}
+
+
--- /dev/null
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <sys/poll.h>
+#include <sys/socket.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include <linux/types.h>
+#include <linux/netlink.h>
+
+void die(char *s)
+{
+ perror(s);
+ exit(1);
+}
+
+int main(int argc, char *argv[])
+{
+ struct sockaddr_nl nls;
+ struct pollfd pfd;
+ char buf[512];
+
+ // Open hotplug event netlink socket
+
+ memset(&nls,0,sizeof(struct sockaddr_nl));
+ nls.nl_family = AF_NETLINK;
+ nls.nl_pid = getpid();
+ nls.nl_groups = -1;
+
+ pfd.events = POLLIN;
+ pfd.fd = socket(PF_NETLINK, SOCK_DGRAM, NETLINK_KOBJECT_UEVENT);
+ if (pfd.fd == -1)
+ die("socket");
+
+ // Listen to netlink socket
+
+ if (bind(pfd.fd, (void *)&nls, sizeof(struct sockaddr_nl)))
+ die("bind");
+
+ while (-1 != poll(&pfd, 1, -1)) {
+ struct sockaddr_nl snl;
+ struct iovec iov = { buf, sizeof(buf) };
+ //char cred_msg[CMSG_SPACE(sizeof(struct ucred))];
+ //struct msghdr hdr = { &snl, sizeof(snl), &iov, 1, cred_msg, sizeof(cred_msg), 0 };
+ struct msghdr hdr = { &snl, sizeof(snl), &iov, 1, NULL, 0, 0 };
+ int i, len;
+
+ len = recvmsg(pfd.fd, &hdr, MSG_DONTWAIT);
+ if (len == -1)
+ die("recvmsg");
+
+ // Print the data to stdout.
+ printf("=== nl_groups %d, nl_pid %d\n", snl.nl_groups, snl.nl_pid);
+ i = 0;
+ while (i<len) {
+ printf("%s\n", buf+i);
+ i += strlen(buf+i)+1;
+ }
+ }
+ die("poll\n");
+
+ return 0;
+}
--- /dev/null
+#include <stdio.h>
+#include <string.h>
+#include <pthread.h>
+#include <time.h>
+
+#define ts_add_nsec(ts, ns) { \
+ ts.tv_nsec += ns; \
+ if (ts.tv_nsec >= 1000000000) { \
+ ts.tv_sec++; \
+ ts.tv_nsec -= 1000000000; \
+ } \
+}
+
+static FILE *open_wl_stats(void)
+{
+ char buf[256];
+ FILE *f;
+ int i;
+
+ for (i = 0; i < 100; i++) {
+ snprintf(buf, sizeof(buf),
+ "/sys/class/ieee80211/phy%d/device/wl_stats", i);
+ f = fopen(buf, "r");
+ if (f != NULL)
+ break;
+ }
+
+ if (f == NULL)
+ perror("open wl_stats");
+
+ return f;
+}
+
+#define VALS 8
+static const char *names[VALS] = {
+ "fcs_err", "plcp_er", "seq_err", " valid",
+ " retry", " touts", "oth_err", " reqs"
+};
+static const unsigned char need_diff[VALS] = { 0, 0, 1, 0, 1, 1, 1, 1 };
+
+static int get_vals(FILE *f, unsigned int *vals)
+{
+ return fscanf(f, "%u %u %u %u %u %u %u %u\n",
+ &vals[0], &vals[1], &vals[2], &vals[3],
+ &vals[4], &vals[5], &vals[6], &vals[7]);
+}
+
+int main(int argc, char *argv[])
+{
+ pthread_mutex_t dummy_mutex = PTHREAD_MUTEX_INITIALIZER;
+ pthread_cond_t dummy_cond = PTHREAD_COND_INITIALIZER;
+ unsigned int vals[VALS], vals_old[VALS];
+ struct timespec ts;
+ int l, i, ret;
+ FILE *f;
+
+ f = open_wl_stats();
+ if (f == NULL)
+ return 1;
+
+ // initial read
+ get_vals(f, vals_old);
+
+ clock_gettime(CLOCK_REALTIME, &ts);
+
+ for (l = 0; ; l++)
+ {
+ rewind(f);
+ ret = get_vals(f, vals);
+ if (ret != VALS) {
+ fprintf(stderr, "scan error (%d)\n", ret);
+ return 1;
+ }
+
+ if (l % 25 == 0) {
+ // printf("------------- rx ------------- ------------ tx -------------\n");
+ for (i = 0; i < VALS; i++)
+ printf("%s ", names[i]);
+ printf("\n");
+ }
+
+ for (i = 0; i < VALS; i++)
+ printf("%7u ", need_diff[i] ? (vals[i] - vals_old[i]) : vals[i]);
+ printf("\n");
+ fflush(stdout);
+
+ memcpy(vals_old, vals, sizeof(vals_old));
+
+ ts_add_nsec(ts, 1000000000);
+ pthread_mutex_lock(&dummy_mutex);
+ pthread_cond_timedwait(&dummy_cond, &dummy_mutex, &ts);
+ pthread_mutex_unlock(&dummy_mutex);
+ }
+
+ fclose(f);
+ return 0;
+}
+
--- /dev/null
+CFLAGS += -Wall
+LDFLAGS += -lX11
+CC = $(CROSS_COMPILE)gcc
--- /dev/null
+#include <stdio.h>
+#include <X11/Xlib.h>
+
+int main()
+{
+ int accel_numerator, accel_denominator, threshold;
+ Display *display;
+ int ret;
+
+ display = XOpenDisplay(NULL);
+ if (display == NULL) {
+ fprintf(stderr, "cannot connect to X server\n");
+ return 1;
+ }
+
+ ret = XGetPointerControl(display, &accel_numerator, &accel_denominator, &threshold);
+ printf("%d %d %d %d\n", ret, accel_numerator, accel_denominator, threshold);
+ XCloseDisplay(display);
+
+ return 0;
+}