arm: pinctrl: Define .mux_mask field for NXP's SoC

The commit e8a9521e649f
("vf500/vf610: synchronise device trees with linux")
has synchronized U-Boot's DTS with v5.19 Linux kernel.
It turned out that in Linux's upstream iomuxc node description the
'fsl,mux_mask' was missing, so the U-Boot's pinctrl driver for NXP's
Vybrid SoC was not working properly.

As by default the mux mask was set to 0, for example the vf610 based
boards (like BK4) were bricked, due to misconfiguration of gpio at
early boot stage.

The fix for all NXP eligible boards is to define .mux_mask field for
soc specific *pinctrl_soc_info structure and use it directly in pinctrl
MMIO driver, without the need to read the "fsl,mux_mask" property from
device tree.

This change brings the NXP's pinctrl driver in U-Boot closer to Linux
upstream one.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com> #for i.MX8ULP

diff --git a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi
index f67fe16..845fe20 100644 (file)
--- a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi
@@ -28,7 +28,6 @@
 
 &iomuxc1 {
        bootph-pre-ram;
-       fsl,mux_mask = <0xf00>;
 };
 
 &pinctrl_lpuart5 {

diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi
index 13511eb..336aeed 100644 (file)
--- a/arch/arm/dts/imxrt1020.dtsi
+++ b/arch/arm/dts/imxrt1020.dtsi
@@ -64,7 +64,6 @@
                iomuxc: iomuxc@401f8000 {
                        compatible = "fsl,imxrt-iomuxc";
                        reg = <0x401f8000 0x4000>;
-                       fsl,mux_mask = <0x7>;
                };
 
                anatop: anatop@400d8000 {

diff --git a/arch/arm/dts/imxrt1170.dtsi b/arch/arm/dts/imxrt1170.dtsi
index 08665ea..7566402 100644 (file)
--- a/arch/arm/dts/imxrt1170.dtsi
+++ b/arch/arm/dts/imxrt1170.dtsi
@@ -77,7 +77,6 @@
                iomuxc: iomuxc@400e8000 {
                        compatible = "fsl,imxrt-iomuxc";
                        reg = <0x400e8000 0x4000>;
-                       fsl,mux_mask = <0x7>;
                };
 
                anatop: anatop@40c84000 {

diff --git a/drivers/pinctrl/nxp/pinctrl-imx-mmio.c b/drivers/pinctrl/nxp/pinctrl-imx-mmio.c
index 6ee108a..2f4228a 100644 (file)
--- a/drivers/pinctrl/nxp/pinctrl-imx-mmio.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx-mmio.c
@@ -187,7 +187,6 @@ int imx_pinctrl_probe_mmio(struct udevice *dev)
                return -ENOMEM;
        priv->info = info;
 
-       info->mux_mask = ofnode_read_u32_default(node, "fsl,mux_mask", 0);
        /*
         * Refer to linux documentation for details:
         * Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt

diff --git a/drivers/pinctrl/nxp/pinctrl-imx8ulp.c b/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
index 2df6362..3e8c080 100644 (file)
--- a/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
@@ -11,10 +11,12 @@
 
 static struct imx_pinctrl_soc_info imx8ulp_pinctrl_soc_info0 = {
        .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CFG_IBE_OBE,
+       .mux_mask = 0xf00,
 };
 
 static struct imx_pinctrl_soc_info imx8ulp_pinctrl_soc_info1 = {
        .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CFG_IBE_OBE,
+       .mux_mask = 0xf00,
 };
 
 static const struct udevice_id imx8ulp_pinctrl_match[] = {

diff --git a/drivers/pinctrl/nxp/pinctrl-imxrt.c b/drivers/pinctrl/nxp/pinctrl-imxrt.c
index 39000ce..7e55d59 100644 (file)
--- a/drivers/pinctrl/nxp/pinctrl-imxrt.c
+++ b/drivers/pinctrl/nxp/pinctrl-imxrt.c
@@ -11,6 +11,7 @@
 
 static struct imx_pinctrl_soc_info imxrt_pinctrl_soc_info = {
        .flags = ZERO_OFFSET_VALID,
+       .mux_mask = 0x7,
 };
 
 static const struct udevice_id imxrt_pinctrl_match[] = {

diff --git a/drivers/pinctrl/nxp/pinctrl-vf610.c b/drivers/pinctrl/nxp/pinctrl-vf610.c
index cbff8dc..7d1b95e 100644 (file)
--- a/drivers/pinctrl/nxp/pinctrl-vf610.c
+++ b/drivers/pinctrl/nxp/pinctrl-vf610.c
@@ -11,6 +11,7 @@
 
 static struct imx_pinctrl_soc_info vf610_pinctrl_soc_info = {
        .flags = SHARE_MUX_CONF_REG | ZERO_OFFSET_VALID,
+       .mux_mask = 0x700000,
 };
 
 static const struct udevice_id vf610_pinctrl_match[] = {