xilinx: mbv: Fix dt properties in interrupt controller node

Properties didn't match dt binding that's why should be fixed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

diff --git a/arch/riscv/dts/xilinx-mbv32.dts b/arch/riscv/dts/xilinx-mbv32.dts
index 96e4280..b426510 100644 (file)
--- a/arch/riscv/dts/xilinx-mbv32.dts
+++ b/arch/riscv/dts/xilinx-mbv32.dts
@@ -71,7 +71,8 @@
                        interrupt-controller;
                        interrupt-parent = <&cpu0_intc>;
                        #interrupt-cells = <2>;
-                       kind-of-intr = <0>;
+                       xlnx,num-intr-inputs = <2>;
+                       xlnx,kind-of-intr = <0>;
                };
 
                xlnx_timer0: timer@41c00000 {

diff --git a/arch/riscv/dts/xilinx-mbv64.dts b/arch/riscv/dts/xilinx-mbv64.dts
index 5a989c1..3762def 100644 (file)
--- a/arch/riscv/dts/xilinx-mbv64.dts
+++ b/arch/riscv/dts/xilinx-mbv64.dts
@@ -71,7 +71,8 @@
                        interrupt-controller;
                        interrupt-parent = <&cpu0_intc>;
                        #interrupt-cells = <2>;
-                       kind-of-intr = <0>;
+                       xlnx,num-intr-inputs = <2>;
+                       xlnx,kind-of-intr = <0>;
                };
 
                xlnx_timer0: timer@41c00000 {