drm/radeon: apply more strict limits for PLL params v2
authorChristian König <christian.koenig@amd.com>
Fri, 4 Apr 2014 11:45:42 +0000 (13:45 +0200)
committerChristian König <christian.koenig@amd.com>
Thu, 17 Apr 2014 11:59:46 +0000 (13:59 +0200)
Letting post and refernce divider get to big is bad for signal stability.

v2: increase the limit to 210

Signed-off-by: Christian König <christian.koenig@amd.com>

No differences found